JPS5091269A - - Google Patents
Info
- Publication number
- JPS5091269A JPS5091269A JP48139002A JP13900273A JPS5091269A JP S5091269 A JPS5091269 A JP S5091269A JP 48139002 A JP48139002 A JP 48139002A JP 13900273 A JP13900273 A JP 13900273A JP S5091269 A JPS5091269 A JP S5091269A
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
Landscapes
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP48139002A JPS5091269A (ja) | 1973-12-12 | 1973-12-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP48139002A JPS5091269A (ja) | 1973-12-12 | 1973-12-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5091269A true JPS5091269A (ja) | 1975-07-21 |
Family
ID=15235167
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP48139002A Pending JPS5091269A (ja) | 1973-12-12 | 1973-12-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5091269A (ja) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57108350U (ja) * | 1980-12-25 | 1982-07-03 | ||
| JPS595650A (ja) * | 1982-06-25 | 1984-01-12 | アメリカ合衆国 | ハイブリツドソリツドステ−ト電子デバイス等のための気密封止パツケ−ジ |
| JPS61251047A (ja) * | 1985-04-26 | 1986-11-08 | エツセジ−エツセ ミクロエレツトロニカソチエタ ペル アノニマ | 半導体デバイスパッケージ及びその製造方法 |
-
1973
- 1973-12-12 JP JP48139002A patent/JPS5091269A/ja active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57108350U (ja) * | 1980-12-25 | 1982-07-03 | ||
| JPS595650A (ja) * | 1982-06-25 | 1984-01-12 | アメリカ合衆国 | ハイブリツドソリツドステ−ト電子デバイス等のための気密封止パツケ−ジ |
| JPS6220700B2 (ja) * | 1982-06-25 | 1987-05-08 | Us Energy | |
| JPS61251047A (ja) * | 1985-04-26 | 1986-11-08 | エツセジ−エツセ ミクロエレツトロニカソチエタ ペル アノニマ | 半導体デバイスパッケージ及びその製造方法 |