JPS504530B1 - - Google Patents

Info

Publication number
JPS504530B1
JPS504530B1 JP45109657A JP10965770A JPS504530B1 JP S504530 B1 JPS504530 B1 JP S504530B1 JP 45109657 A JP45109657 A JP 45109657A JP 10965770 A JP10965770 A JP 10965770A JP S504530 B1 JPS504530 B1 JP S504530B1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP45109657A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS504530B1 publication Critical patent/JPS504530B1/ja
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0855Overlapped cache accessing, e.g. pipeline
    • G06F12/0857Overlapped cache accessing, e.g. pipeline by multiple requestors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Multi Processors (AREA)
JP45109657A 1969-12-23 1970-12-11 Pending JPS504530B1 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US88746969A 1969-12-23 1969-12-23

Publications (1)

Publication Number Publication Date
JPS504530B1 true JPS504530B1 (ja) 1975-02-20

Family

ID=25391207

Family Applications (1)

Application Number Title Priority Date Filing Date
JP45109657A Pending JPS504530B1 (ja) 1969-12-23 1970-12-11

Country Status (5)

Country Link
US (1) US3670309A (ja)
JP (1) JPS504530B1 (ja)
DE (1) DE2061576A1 (ja)
FR (1) FR2143504B1 (ja)
GB (1) GB1313528A (ja)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3878513A (en) * 1972-02-08 1975-04-15 Burroughs Corp Data processing method and apparatus using occupancy indications to reserve storage space for a stack
US3839704A (en) * 1972-12-06 1974-10-01 Ibm Control for channel access to storage hierarchy system
US3868644A (en) * 1973-06-26 1975-02-25 Ibm Stack mechanism for a data processor
US3928857A (en) * 1973-08-30 1975-12-23 Ibm Instruction fetch apparatus with combined look-ahead and look-behind capability
GB1499184A (en) * 1974-04-13 1978-01-25 Mathematik & Datenverarbeitung Circuit arrangement for monitoring the state of memory segments
US3967247A (en) * 1974-11-11 1976-06-29 Sperry Rand Corporation Storage interface unit
US3964054A (en) * 1975-06-23 1976-06-15 International Business Machines Corporation Hierarchy response priority adjustment mechanism
US4075686A (en) * 1976-12-30 1978-02-21 Honeywell Information Systems Inc. Input/output cache system including bypass capability
US4169284A (en) * 1978-03-07 1979-09-25 International Business Machines Corporation Cache control for concurrent access
GB2037039B (en) * 1978-12-11 1983-08-17 Honeywell Inf Systems Cache memory system
US4208716A (en) * 1978-12-11 1980-06-17 Honeywell Information Systems Inc. Cache arrangement for performing simultaneous read/write operations
JPH048824B2 (ja) * 1979-01-09 1992-02-18
US4707781A (en) * 1979-01-09 1987-11-17 Chopp Computer Corp. Shared memory computer method and apparatus
US4484262A (en) * 1979-01-09 1984-11-20 Sullivan Herbert W Shared memory computer method and apparatus
US4317168A (en) * 1979-11-23 1982-02-23 International Business Machines Corporation Cache organization enabling concurrent line castout and line fetch transfers with main storage
US4381541A (en) * 1980-08-28 1983-04-26 Sperry Corporation Buffer memory referencing system for two data words
US4458316A (en) * 1981-03-06 1984-07-03 International Business Machines Corporation Queuing commands in a peripheral data storage system
US4489378A (en) * 1981-06-05 1984-12-18 International Business Machines Corporation Automatic adjustment of the quantity of prefetch data in a disk cache operation
CA1187198A (en) * 1981-06-15 1985-05-14 Takashi Chiba System for controlling access to channel buffers
US4430701A (en) * 1981-08-03 1984-02-07 International Business Machines Corporation Method and apparatus for a hierarchical paging storage system
US4571674A (en) * 1982-09-27 1986-02-18 International Business Machines Corporation Peripheral storage system having multiple data transfer rates
JPS59188879A (ja) * 1982-12-17 1984-10-26 シンボリツクス・インコ−ポレ−テツド デ−タプロセツサ
US4887235A (en) * 1982-12-17 1989-12-12 Symbolics, Inc. Symbolic language data processing system
US4527238A (en) * 1983-02-28 1985-07-02 Honeywell Information Systems Inc. Cache with independent addressable data and directory arrays
CA2072178A1 (en) * 1991-06-24 1992-12-25 Said S. Saadeh Innate bus monitor for computer system manager
US5832499A (en) * 1996-07-10 1998-11-03 Survivors Of The Shoah Visual History Foundation Digital library system
US6353831B1 (en) 1998-11-02 2002-03-05 Survivors Of The Shoah Visual History Foundation Digital library system
GB2378277B (en) * 2001-07-31 2003-06-25 Sun Microsystems Inc Multiple address translations

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB979633A (en) * 1960-04-20 1965-01-06 Nat Res Dev Improvements in or relating to electronic digital computing machines
US3368207A (en) * 1965-05-12 1968-02-06 Ibm File protection to i/o storage
US3398405A (en) * 1965-06-07 1968-08-20 Burroughs Corp Digital computer with memory lock operation
US3469239A (en) * 1965-12-02 1969-09-23 Hughes Aircraft Co Interlocking means for a multi-processor system
US3473159A (en) * 1966-07-07 1969-10-14 Gen Electric Data processing system including means for protecting predetermined areas of memory
US3461433A (en) * 1967-01-27 1969-08-12 Sperry Rand Corp Relative addressing system for memories

Also Published As

Publication number Publication date
US3670309A (en) 1972-06-13
GB1313528A (en) 1973-04-11
FR2143504A1 (ja) 1973-02-09
DE2061576A1 (de) 1971-07-01
FR2143504B1 (ja) 1974-10-11

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