JPS50140255A - - Google Patents
Info
- Publication number
- JPS50140255A JPS50140255A JP4763974A JP4763974A JPS50140255A JP S50140255 A JPS50140255 A JP S50140255A JP 4763974 A JP4763974 A JP 4763974A JP 4763974 A JP4763974 A JP 4763974A JP S50140255 A JPS50140255 A JP S50140255A
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Logic Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4763974A JPS50140255A (ko) | 1974-04-30 | 1974-04-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4763974A JPS50140255A (ko) | 1974-04-30 | 1974-04-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS50140255A true JPS50140255A (ko) | 1975-11-10 |
Family
ID=12780796
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4763974A Pending JPS50140255A (ko) | 1974-04-30 | 1974-04-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS50140255A (ko) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5219058A (en) * | 1975-08-04 | 1977-01-14 | Nippon Telegr & Teleph Corp <Ntt> | Exclusive logical sum circuit |
| JPS5726925A (en) * | 1981-06-18 | 1982-02-13 | Toshiba Corp | Pulse generating circuit |
| JPH02203621A (ja) * | 1989-02-02 | 1990-08-13 | Matsushita Electric Ind Co Ltd | エクスクルーシブノア回路 |
| WO1993012525A1 (en) * | 1991-12-09 | 1993-06-24 | Fujitsu Limited | Flash memory improved in erasing characteristic, and circuit therefor |
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1974
- 1974-04-30 JP JP4763974A patent/JPS50140255A/ja active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5219058A (en) * | 1975-08-04 | 1977-01-14 | Nippon Telegr & Teleph Corp <Ntt> | Exclusive logical sum circuit |
| JPS5726925A (en) * | 1981-06-18 | 1982-02-13 | Toshiba Corp | Pulse generating circuit |
| JPH0321997B2 (ko) * | 1981-06-18 | 1991-03-25 | Tokyo Shibaura Electric Co | |
| JPH02203621A (ja) * | 1989-02-02 | 1990-08-13 | Matsushita Electric Ind Co Ltd | エクスクルーシブノア回路 |
| WO1993012525A1 (en) * | 1991-12-09 | 1993-06-24 | Fujitsu Limited | Flash memory improved in erasing characteristic, and circuit therefor |
| US5608670A (en) * | 1991-12-09 | 1997-03-04 | Fujitsu Limited | Flash memory with improved erasability and its circuitry |
| US5640123A (en) * | 1991-12-09 | 1997-06-17 | Fujitsu Limited | Substrate voltage control circuit for a flash memory |
| US5770963A (en) * | 1991-12-09 | 1998-06-23 | Fujitsu Limited | Flash memory with improved erasability and its circuitry |