JPS50115458A - - Google Patents

Info

Publication number
JPS50115458A
JPS50115458A JP49145849A JP14584974A JPS50115458A JP S50115458 A JPS50115458 A JP S50115458A JP 49145849 A JP49145849 A JP 49145849A JP 14584974 A JP14584974 A JP 14584974A JP S50115458 A JPS50115458 A JP S50115458A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP49145849A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS50115458A publication Critical patent/JPS50115458A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/0807Details of the phase-locked loop concerning mainly a recovery circuit for the reference signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/14Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/191Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using at least two different signals from the frequency divider or the counter for determining the time difference
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/18Temporarily disabling, deactivating or stopping the frequency counter or divider
JP49145849A 1973-12-20 1974-12-20 Pending JPS50115458A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CH1788973A CH566089A5 (ja) 1973-12-20 1973-12-20

Publications (1)

Publication Number Publication Date
JPS50115458A true JPS50115458A (ja) 1975-09-10

Family

ID=4428858

Family Applications (1)

Application Number Title Priority Date Filing Date
JP49145849A Pending JPS50115458A (ja) 1973-12-20 1974-12-20

Country Status (7)

Country Link
JP (1) JPS50115458A (ja)
CH (1) CH566089A5 (ja)
DE (1) DE2456742A1 (ja)
GB (1) GB1452559A (ja)
IT (1) IT1032558B (ja)
NL (1) NL7416281A (ja)
SE (1) SE398423B (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60148441A (ja) * 1974-09-24 1985-08-05 ア−/エス・ハウストルツプ・プラステイ−ク 容器

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4290028A (en) * 1979-07-30 1981-09-15 International Telephone And Telegraph Corporation High speed phase locked loop frequency synthesizer
JPS5720052A (en) 1980-07-11 1982-02-02 Toshiba Corp Input data synchronizing circuit
JPS6051312B2 (ja) * 1981-03-20 1985-11-13 日本ビクター株式会社 水平走査周波数逓倍回路
US4389622A (en) * 1981-09-28 1983-06-21 Honeywell Inc. System for preventing transient induced errors in phase locked loop
JPS58191573A (ja) * 1982-05-06 1983-11-08 Victor Co Of Japan Ltd 水平走査周波数逓倍回路
GB2132042B (en) * 1982-12-15 1986-09-24 British Broadcasting Corp Frequency and timing sources
FR2710806B1 (fr) * 1993-09-28 1995-11-10 France Telecom Dispositif d'asservissement de fréquence.
US5410368A (en) * 1993-12-29 1995-04-25 Zenith Electronics Corp. Carrier acquisition by applying substitute pilot to a synchronous demodulator during a start up interval
IT1278538B1 (it) * 1995-12-20 1997-11-24 Sits Soc It Telecom Siemens Procedimento per il mantenimento dell'aggancio in un pll digitale durante eventuali interruzioni transitorie del segnale sincronizzante
WO1999013582A1 (en) * 1997-09-09 1999-03-18 Advanced Fibre Communications, Inc. Perturbation tolerant digital phase-locked loop employing phase-frequency detector
EP2158677B1 (en) 2007-06-14 2018-05-30 NXP USA, Inc. Circuit arrangement for filtering unwanted signals from a clock signal, processing system and method of filtering unwanted signals from a clock signal
US8552764B2 (en) 2009-01-05 2013-10-08 Freescale Semiconductor, Inc. Clock glitch detection circuit
WO2010112969A1 (en) 2009-03-31 2010-10-07 Freescale Semiconductor, Inc. Clock glitch detection

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60148441A (ja) * 1974-09-24 1985-08-05 ア−/エス・ハウストルツプ・プラステイ−ク 容器
JPS62193938A (ja) * 1974-09-24 1987-08-26 ア−/エス・ハウストルツプ・プラステイ−ク 容器
JPH036061B2 (ja) * 1974-09-24 1991-01-29 Haustrup Plastic As
JPH0413216B2 (ja) * 1974-09-24 1992-03-09 Haustrup Plastic As

Also Published As

Publication number Publication date
IT1032558B (it) 1979-06-20
DE2456742A1 (de) 1975-06-26
CH566089A5 (ja) 1975-08-29
GB1452559A (en) 1976-10-13
SE398423B (sv) 1977-12-19
NL7416281A (nl) 1975-06-24
SE7415990L (ja) 1975-06-23

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