JPS4989157A - - Google Patents
Info
- Publication number
- JPS4989157A JPS4989157A JP48173A JP48173A JPS4989157A JP S4989157 A JPS4989157 A JP S4989157A JP 48173 A JP48173 A JP 48173A JP 48173 A JP48173 A JP 48173A JP S4989157 A JPS4989157 A JP S4989157A
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/15165—Monolayer substrate
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP48173A JPS4989157A (en, 2012) | 1972-12-29 | 1972-12-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP48173A JPS4989157A (en, 2012) | 1972-12-29 | 1972-12-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS4989157A true JPS4989157A (en, 2012) | 1974-08-26 |
Family
ID=11474955
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP48173A Pending JPS4989157A (en, 2012) | 1972-12-29 | 1972-12-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS4989157A (en, 2012) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54161270A (en) * | 1978-06-09 | 1979-12-20 | Nec Corp | Lead frame for integrated-circuit device |
| JPH0227758A (ja) * | 1988-07-15 | 1990-01-30 | Nec Ic Microcomput Syst Ltd | 集積回路装置 |
| JPH02125653A (ja) * | 1988-11-04 | 1990-05-14 | Nec Corp | 混成集積回路装置 |
| JP2008141084A (ja) * | 2006-12-05 | 2008-06-19 | Nec Electronics Corp | 半導体装置 |
| JP2014140022A (ja) * | 2012-12-20 | 2014-07-31 | Intel Corp | 高密度有機ブリッジデバイスおよび方法 |
-
1972
- 1972-12-29 JP JP48173A patent/JPS4989157A/ja active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54161270A (en) * | 1978-06-09 | 1979-12-20 | Nec Corp | Lead frame for integrated-circuit device |
| JPH0227758A (ja) * | 1988-07-15 | 1990-01-30 | Nec Ic Microcomput Syst Ltd | 集積回路装置 |
| JPH02125653A (ja) * | 1988-11-04 | 1990-05-14 | Nec Corp | 混成集積回路装置 |
| JP2008141084A (ja) * | 2006-12-05 | 2008-06-19 | Nec Electronics Corp | 半導体装置 |
| JP2014140022A (ja) * | 2012-12-20 | 2014-07-31 | Intel Corp | 高密度有機ブリッジデバイスおよび方法 |
| JP2016105484A (ja) * | 2012-12-20 | 2016-06-09 | インテル・コーポレーション | 高密度有機ブリッジデバイスおよび方法 |
| JP2018129528A (ja) * | 2012-12-20 | 2018-08-16 | インテル・コーポレーション | 高密度有機ブリッジデバイスおよび方法 |
| US10103105B2 (en) | 2012-12-20 | 2018-10-16 | Intel Corporation | High density organic bridge device and method |
| US10672713B2 (en) | 2012-12-20 | 2020-06-02 | Intel Corporation | High density organic bridge device and method |
| US12002762B2 (en) | 2012-12-20 | 2024-06-04 | Intel Corporation | High density organic bridge device and method |