JPS496465A - - Google Patents

Info

Publication number
JPS496465A
JPS496465A JP1703972A JP1703972A JPS496465A JP S496465 A JPS496465 A JP S496465A JP 1703972 A JP1703972 A JP 1703972A JP 1703972 A JP1703972 A JP 1703972A JP S496465 A JPS496465 A JP S496465A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1703972A
Other languages
Japanese (ja)
Other versions
JPS5537118B2 (en:Method
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1703972A priority Critical patent/JPS5537118B2/ja
Publication of JPS496465A publication Critical patent/JPS496465A/ja
Publication of JPS5537118B2 publication Critical patent/JPS5537118B2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
JP1703972A 1972-02-18 1972-02-18 Expired JPS5537118B2 (en:Method)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1703972A JPS5537118B2 (en:Method) 1972-02-18 1972-02-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1703972A JPS5537118B2 (en:Method) 1972-02-18 1972-02-18

Publications (2)

Publication Number Publication Date
JPS496465A true JPS496465A (en:Method) 1974-01-21
JPS5537118B2 JPS5537118B2 (en:Method) 1980-09-25

Family

ID=11932843

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1703972A Expired JPS5537118B2 (en:Method) 1972-02-18 1972-02-18

Country Status (1)

Country Link
JP (1) JPS5537118B2 (en:Method)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55141794A (en) * 1979-04-20 1980-11-05 Alps Electric Co Ltd Method of mounting chip component
JPS61271898A (ja) * 1985-05-27 1986-12-02 ロ−ム株式会社 スル−ホ−ルの半田付け方法
JPS6376396A (ja) * 1986-09-15 1988-04-06 インタ−ナショナル・ビジネス・マシ−ンズ・コ−ポレ−ション 回路素子の装着方法
JPS63155689A (ja) * 1986-12-18 1988-06-28 富士通株式会社 プリント基板の半田コ−テイング方法
JP5003839B1 (ja) * 2011-09-21 2012-08-15 富士ゼロックス株式会社 プリント配線基板装置の製造方法

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55141794A (en) * 1979-04-20 1980-11-05 Alps Electric Co Ltd Method of mounting chip component
JPS61271898A (ja) * 1985-05-27 1986-12-02 ロ−ム株式会社 スル−ホ−ルの半田付け方法
JPS6376396A (ja) * 1986-09-15 1988-04-06 インタ−ナショナル・ビジネス・マシ−ンズ・コ−ポレ−ション 回路素子の装着方法
JPS63155689A (ja) * 1986-12-18 1988-06-28 富士通株式会社 プリント基板の半田コ−テイング方法
JP5003839B1 (ja) * 2011-09-21 2012-08-15 富士ゼロックス株式会社 プリント配線基板装置の製造方法
CN103025078A (zh) * 2011-09-21 2013-04-03 富士施乐株式会社 印刷配线基板装置的制造方法

Also Published As

Publication number Publication date
JPS5537118B2 (en:Method) 1980-09-25

Similar Documents

Publication Publication Date Title
JPS4963775A (en:Method)
DE2213604A1 (en:Method)
JPS5537118B2 (en:Method)
CS156922B1 (en:Method)
JPS4920199U (en:Method)
JPS4970398U (en:Method)
CS154024B1 (en:Method)
CS156588B1 (en:Method)
JPS4968405U (en:Method)
CS155028B1 (en:Method)
CS154184B1 (en:Method)
JPS4938732U (en:Method)
CS153936B1 (en:Method)
CS156987B1 (en:Method)
CS159448B1 (en:Method)
CS156383B1 (en:Method)
CS154081B1 (en:Method)
JPS4898730U (en:Method)
CS160339B1 (en:Method)
CH575128A5 (en:Method)
BG18637A1 (en:Method)
CH560847A5 (en:Method)
CH568085A5 (en:Method)
BG18223A1 (en:Method)
CH566534A5 (en:Method)