JPS4928211A - - Google Patents
Info
- Publication number
- JPS4928211A JPS4928211A JP47068549A JP6854972A JPS4928211A JP S4928211 A JPS4928211 A JP S4928211A JP 47068549 A JP47068549 A JP 47068549A JP 6854972 A JP6854972 A JP 6854972A JP S4928211 A JPS4928211 A JP S4928211A
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Amplifiers (AREA)
- Dc Digital Transmission (AREA)
- Monitoring And Testing Of Transmission In General (AREA)
- Testing Electric Properties And Detecting Electric Faults (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6854972A JPS5623345B2 (en:Method) | 1972-07-08 | 1972-07-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6854972A JPS5623345B2 (en:Method) | 1972-07-08 | 1972-07-08 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS4928211A true JPS4928211A (en:Method) | 1974-03-13 |
| JPS5623345B2 JPS5623345B2 (en:Method) | 1981-05-30 |
Family
ID=13376935
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6854972A Expired JPS5623345B2 (en:Method) | 1972-07-08 | 1972-07-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5623345B2 (en:Method) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5142437A (en:Method) * | 1974-10-08 | 1976-04-10 | Omron Tateisi Electronics Co | |
| JPS5256887A (en) * | 1975-11-05 | 1977-05-10 | Nippon Telegr & Teleph Corp <Ntt> | Radar reception signal simulator system |
| JPS5897751A (ja) * | 1981-12-04 | 1983-06-10 | Matsushita Electric Ind Co Ltd | マルチプロセツサ−システム |
| JPS59132052A (ja) * | 1982-09-20 | 1984-07-30 | Hitachi Ltd | 多重化演算処理装置 |
| JPH01154242A (ja) * | 1987-09-04 | 1989-06-16 | Digital Equip Corp <Dec> | 二重ゾーンの耐欠陥コンピュータシステム |
| JPH02110742A (ja) * | 1988-10-20 | 1990-04-23 | Pfu Ltd | マルチプロセッサの誤り検出・同期方式 |
-
1972
- 1972-07-08 JP JP6854972A patent/JPS5623345B2/ja not_active Expired
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5142437A (en:Method) * | 1974-10-08 | 1976-04-10 | Omron Tateisi Electronics Co | |
| JPS5256887A (en) * | 1975-11-05 | 1977-05-10 | Nippon Telegr & Teleph Corp <Ntt> | Radar reception signal simulator system |
| JPS5897751A (ja) * | 1981-12-04 | 1983-06-10 | Matsushita Electric Ind Co Ltd | マルチプロセツサ−システム |
| JPS59132052A (ja) * | 1982-09-20 | 1984-07-30 | Hitachi Ltd | 多重化演算処理装置 |
| JPH01154242A (ja) * | 1987-09-04 | 1989-06-16 | Digital Equip Corp <Dec> | 二重ゾーンの耐欠陥コンピュータシステム |
| JPH02110742A (ja) * | 1988-10-20 | 1990-04-23 | Pfu Ltd | マルチプロセッサの誤り検出・同期方式 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5623345B2 (en:Method) | 1981-05-30 |