JPS49119159A - - Google Patents

Info

Publication number
JPS49119159A
JPS49119159A JP3232273A JP3232273A JPS49119159A JP S49119159 A JPS49119159 A JP S49119159A JP 3232273 A JP3232273 A JP 3232273A JP 3232273 A JP3232273 A JP 3232273A JP S49119159 A JPS49119159 A JP S49119159A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3232273A
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3232273A priority Critical patent/JPS49119159A/ja
Publication of JPS49119159A publication Critical patent/JPS49119159A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
JP3232273A 1973-03-20 1973-03-20 Pending JPS49119159A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3232273A JPS49119159A (en) 1973-03-20 1973-03-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3232273A JPS49119159A (en) 1973-03-20 1973-03-20

Publications (1)

Publication Number Publication Date
JPS49119159A true JPS49119159A (en) 1974-11-14

Family

ID=12355689

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3232273A Pending JPS49119159A (en) 1973-03-20 1973-03-20

Country Status (1)

Country Link
JP (1) JPS49119159A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5540543U (en) * 1978-09-08 1980-03-15
JPS63254788A (en) * 1987-04-10 1988-10-21 松下電器産業株式会社 Printed wiring board
JPS63261778A (en) * 1987-04-20 1988-10-28 松下電器産業株式会社 Printed wiring board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5540543U (en) * 1978-09-08 1980-03-15
JPS63254788A (en) * 1987-04-10 1988-10-21 松下電器産業株式会社 Printed wiring board
JPS63261778A (en) * 1987-04-20 1988-10-28 松下電器産業株式会社 Printed wiring board

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