JPS4846255A - - Google Patents

Info

Publication number
JPS4846255A
JPS4846255A JP47091356A JP9135672A JPS4846255A JP S4846255 A JPS4846255 A JP S4846255A JP 47091356 A JP47091356 A JP 47091356A JP 9135672 A JP9135672 A JP 9135672A JP S4846255 A JPS4846255 A JP S4846255A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP47091356A
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS4846255A publication Critical patent/JPS4846255A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP47091356A 1971-10-05 1972-09-13 Pending JPS4846255A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB4617771 1971-10-05

Publications (1)

Publication Number Publication Date
JPS4846255A true JPS4846255A (fr) 1973-07-02

Family

ID=10440179

Family Applications (1)

Application Number Title Priority Date Filing Date
JP47091356A Pending JPS4846255A (fr) 1971-10-05 1972-09-13

Country Status (4)

Country Link
JP (1) JPS4846255A (fr)
DE (1) DE2247793A1 (fr)
FR (1) FR2155546A5 (fr)
GB (1) GB1310219A (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55108022A (en) * 1979-02-13 1980-08-19 Hitachi Ltd Data processor
JPS6449314A (en) * 1987-08-19 1989-02-23 Mitsubishi Chem Ind Correcting method for out of synchronism of signal

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55108022A (en) * 1979-02-13 1980-08-19 Hitachi Ltd Data processor
JPS6449314A (en) * 1987-08-19 1989-02-23 Mitsubishi Chem Ind Correcting method for out of synchronism of signal

Also Published As

Publication number Publication date
DE2247793A1 (de) 1973-04-19
GB1310219A (en) 1973-03-14
FR2155546A5 (fr) 1973-05-18

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