JPS475708A - - Google Patents

Info

Publication number
JPS475708A
JPS475708A JP6333071A JP6333071A JPS475708A JP S475708 A JPS475708 A JP S475708A JP 6333071 A JP6333071 A JP 6333071A JP 6333071 A JP6333071 A JP 6333071A JP S475708 A JPS475708 A JP S475708A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6333071A
Other versions
JPS5435052B1 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS475708A publication Critical patent/JPS475708A/ja
Publication of JPS5435052B1 publication Critical patent/JPS5435052B1/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/4067—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the bipolar type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01806—Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01806—Interface arrangements
    • H03K19/01812—Interface arrangements with at least one differential stage

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
JP6333071A 1970-08-19 1971-08-19 Pending JPS5435052B1 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US65225A US3684897A (en) 1970-08-19 1970-08-19 Dynamic mos memory array timing system

Publications (2)

Publication Number Publication Date
JPS475708A true JPS475708A (ja) 1973-03-27
JPS5435052B1 JPS5435052B1 (ja) 1979-10-31

Family

ID=22061193

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6333071A Pending JPS5435052B1 (ja) 1970-08-19 1971-08-19

Country Status (4)

Country Link
US (1) US3684897A (ja)
JP (1) JPS5435052B1 (ja)
DE (1) DE2141680C3 (ja)
NL (1) NL7111445A (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56118123A (en) * 1980-02-25 1981-09-17 Matsushita Electric Ind Co Ltd Microcomputer circuit
JPS56125427U (ja) * 1980-02-21 1981-09-24
JPS59187970U (ja) * 1983-06-02 1984-12-13 柏口　雅彦 釣針
JPS62176625A (ja) * 1986-01-28 1987-08-03 Toyoji Kamimura 微小釣針製造方法

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3728552A (en) * 1971-03-30 1973-04-17 Siemens Ag Control device for a selective matrix of a data memory with selective access
US3786437A (en) * 1972-01-03 1974-01-15 Honeywell Inf Systems Random access memory system utilizing an inverting cell concept
US3737879A (en) * 1972-01-05 1973-06-05 Mos Technology Inc Self-refreshing memory
US3769522A (en) * 1972-01-18 1973-10-30 Honeywell Inf Systems Apparatus and method for converting mos circuit signals to ttl circuit signals
US3790961A (en) * 1972-06-09 1974-02-05 Advanced Memory Syst Inc Random access dynamic semiconductor memory system
US3866061A (en) * 1973-08-27 1975-02-11 Burroughs Corp Overlap timing control circuit for conditioning signals in a semiconductor memory
US4045690A (en) * 1976-02-17 1977-08-30 Burroughs Corporation High speed differential to ttl converter
JPS55132593A (en) * 1979-04-02 1980-10-15 Fujitsu Ltd Refresh control method for memory unit
EP0060250A1 (en) * 1980-09-10 1982-09-22 Mostek Corporation Clocking system for a self-refreshed dynamic memory
US4360903A (en) * 1980-09-10 1982-11-23 Mostek Corporation Clocking system for a self-refreshed dynamic memory
JPS585029A (ja) * 1981-06-30 1983-01-12 Fujitsu Ltd レベル変換回路
US4631701A (en) * 1983-10-31 1986-12-23 Ncr Corporation Dynamic random access memory refresh control system
DE3671675D1 (de) * 1985-09-30 1990-07-05 Siemens Ag Verfahren zum auffrischen von daten in einer dynamischen ram-speichereinheit, und steuereinheit zur durchfuehrung dieses verfahrens.
US4973863A (en) * 1989-12-28 1990-11-27 Eastman Kodak Company TTL-ECL interface circuit

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3343130A (en) * 1964-08-27 1967-09-19 Fabri Tek Inc Selection matrix line capacitance recharge system
US3518635A (en) * 1967-08-22 1970-06-30 Bunker Ramo Digital memory apparatus
US3535699A (en) * 1968-01-15 1970-10-20 Ibm Complenmentary transistor memory cell using leakage current to sustain quiescent condition
US3736572A (en) * 1970-08-19 1973-05-29 Cogar Corp Bipolar driver for dynamic mos memory array chip

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56125427U (ja) * 1980-02-21 1981-09-24
JPS56118123A (en) * 1980-02-25 1981-09-17 Matsushita Electric Ind Co Ltd Microcomputer circuit
JPS59187970U (ja) * 1983-06-02 1984-12-13 柏口　雅彦 釣針
JPS62176625A (ja) * 1986-01-28 1987-08-03 Toyoji Kamimura 微小釣針製造方法

Also Published As

Publication number Publication date
US3684897A (en) 1972-08-15
NL7111445A (ja) 1972-02-22
DE2141680B2 (de) 1980-08-28
DE2141680A1 (de) 1972-02-24
JPS5435052B1 (ja) 1979-10-31
DE2141680C3 (de) 1981-04-09

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