JPH1168541A - Identification circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform concurrently a light/electricity conversion and an identification operation for an optical input signal and, at the same time, to enable high- speed operation. SOLUTION: Series circuits of resonance tunnel diodes 1 and 2 are connected to a power source via a resistor 3, which a first photodiode 4 for an optical data signal light reception is connected in parallel to the resonance tunnel diode 2, and the second photodiode 5 for an optical clock signal light reception is connected in parallel to the serial circuits of the resonance tunnel diodes 1 and 2. An output signal is taken out of a common connection point of the resonance tunnel diodes 1 and 2.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an identification circuit for identifying optical data input to a semiconductor integrated circuit by an optical clock signal.

[0002]

2. Description of the Related Art Conventionally, a circuit as shown in FIG. 10 has been known as an identification circuit using a tunnel diode (references: Koichi Maezawa, Hideaki Matsuzaki, Kunihiro Arai, Tomoyuki Akiyoshi, Jiro Osaka, Taiichi Otsuji) Masafumi Yamamoto, "High-speed and low-power-consumption flip-flop circuit using resonant tunneling diode logic gate MOBILE," IEICE 1997 Society Conference.

In the drawing, reference numerals 11 and 12 denote a resonant tunneling diode (RTD) constituting a bistable circuit, 13 denotes a field effect transistor (FET), 14 denotes a data input terminal, 15 denotes a clock (Vck) input terminal, and 16 denotes data. Output terminal,
17 is a ground. Resonant tunnel diode 11 is for switching (for driver), resonant tunnel diode 1
2 is used as a load element. Field effect transistor 13
Are used for current modulation of the resonant tunneling diode 12 as a load. Note that a bistable circuit is a circuit having two possible operating points under a certain supply voltage.

FIG. 11 is a diagram for explaining the operation of the identification circuit shown in FIG. Resonant tunnel diode 12 and transistor 13
Is a load, the load curve Y has a symmetrical shape of the voltage-current characteristic X of the resonant tunneling diode 11. The intersection of the load curve Y and the voltage axis is the clock voltage Vck. Therefore, the clock voltage Vck changes from low to high.
With the transition to, the load curve Y of the resonant tunneling diode 12 also moves from left to right as shown in FIG.

During the movement of the load curve Y, if the voltage of the data input terminal 14 is High (the transistor 13 is turned on), the current of the load curve Y moves as shown in FIG. Accordingly, the operating point Z (the point at which the two curves X and Y intersect, the voltage at which
Is the voltage Vout with respect to the ground. ) Transitions to the high voltage side. When the voltage of the data input terminal 14 is Low (the transistor 13 is off), the current value of the load curve Y moves without change, and the operating point Z remains on the low voltage side. Subsequently, as the clock voltage Vck transitions from High to Low, the load curve Y moves from right to left, and the operating point Z always returns to the low voltage side.

FIG. 12 is a waveform diagram of the circuit operation of the conventional example. Here, the state of the data when the clock signal rises is identified, and the identification state is held while the clock signal is High. When the clock signal goes low, the output signal always goes low. Therefore, the output signal is RZ
(Return To Zero) signal.

[0007]

When integration is performed in a conventional identification circuit using a tunnel diode, signal transmission and distribution to the identification circuit are performed by electric signals. However, electric signals have a delay due to charge / discharge of the wiring parasitic capacitance, which hinders high-speed operation. In particular, since the clock signal is distributed to each circuit, if the wiring length is long, the problem of signal delay becomes significant.

Therefore, in order to avoid this signal delay,
It is conceivable to replace the transmission signal with an optical signal without charge and discharge. However, an optical / electrical interface circuit is required to input an optical signal to a conventional identification circuit, which causes a problem that the circuit scale is increased.

In the conventional identification circuit using the resonant tunneling diode shown in FIG. 10, a data signal leaks through the gate-source capacitance of the transistor 13 used for current modulation during high-frequency operation, and an output waveform is generated. There was a problem that was disturbed.

The present invention has been made in view of the above points, and an object of the present invention is to provide an identification circuit which does not increase the circuit scale while using an optical signal and which can operate at high speed. It is to be.

[0011]

According to a first aspect of the present invention, one end of a load and the anode of a first photodiode are commonly connected to the other end of a tunnel diode having one end grounded. The other end of the load and the cathode of the first photodiode are commonly connected to one end of a resistor having one end connected to a DC power supply, and the second photodiode has its cathode connected to the other end of the resistor and an anode. , And an optical data signal is input to the first photodiode, an optical clock signal is input to the second photodiode, and an electrical output signal is connected to a common connection between the other end of the tunnel diode and the load. It was configured to be taken out from a point. In a second aspect based on the first aspect, the load is another tunnel diode. Third
In the invention of the first aspect, the load is a resistor. In a fourth aspect based on the first aspect, the load is a transistor in which a gate and a source or a base and an emitter are short-circuited.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION

[First Embodiment] FIG. 1 is a diagram showing a first embodiment of the present invention. In the figure, 1 is a resonant tunneling diode (TRD) as a driver, 2 is a resonant tunneling diode as a load, 3 is a resistor, 4 is an optical data input receiving unit O
A first photodiode for receiving the optical data signal from D, a second photodiode for receiving the optical clock signal from the optical clock input receiving unit OC, a data output terminal for 6, a voltage Vdd for 7 The power supply terminal 8 is a ground.

As shown, the resonant tunnel diodes 1, 2 and the resistor 3 are connected in series between the power supply terminal 7 and the ground 8, and the first photodiode 4 is connected in parallel to the resonant tunnel diode 1 as a load. Have been. The second photodiode 5 is connected in parallel to the series-connected resonant tunneling diodes 1 and 2. Output data signal Vou
t is obtained between the data output terminal 6 and the ground 8. The resonant tunneling diodes 1 and 2 form a bistable circuit, and the voltage supplied to the bistable circuit is the voltage Vo at the common connection point between the resistor 3 and the resonant tunneling diode 2.

FIGS. 2A and 2B are explanatory diagrams of the operation of the identification circuit. In the figure, A is a resonant tunnel diode 1
Is a voltage-current characteristic curve having a negative resistance portion, and B is a load curve combining the voltage-current characteristic curve having a negative resistance portion of the resonance tunnel diode 2 and the characteristics of the photodiode 4. Is a load, the curve B is symmetric with the curve A. The voltage at the intersection of the load curve B and the voltage axis is equal to the supply voltage Vo to the bistable circuit.

The voltage Vo changes according to an optical clock signal applied to the second photodiode 5. That is, when the optical clock signal is irradiated (on), the voltage Vo is low and low, and when not irradiated (off), the voltage Vo is high.

As the voltage Vo transitions from low to high, the load curve B moves from left to right in FIGS. 2A and 2B, that is, toward the high voltage side. Conversely, when the voltage Vo is H
When transitioning from "high" to "Low", the image moves from right to left.

During the movement of the load curve B, the first photodiode 4 is irradiated with the optical data signal (Data
= High), as shown in FIG. 2B, the load curve B moves in a state where the current value is increased, and accordingly, the operating point C (the point where the two curves A and B intersect, The voltage here is the voltage Vou with respect to the ground of the data output terminal 6.
t. ) Transitions to the high voltage side. Conversely, when the optical data signal is not irradiated (Data = Low),
As shown in FIG. 2A, the current value of the load curve B moves without change, the transition of the operating point C stays on the low voltage side, and finally always returns to Low.

FIG. 3 is a signal waveform diagram showing the operation of the identification circuit. As shown in the figure, the state of the optical data signal at the time of the falling edge of the optical clock signal is identified and output to the data output terminal 6 as an electric signal. I do. When the optical clock signal is High (irradiation), the output data signal is always Low without depending on the state of the input optical data signal. As a result, the waveform of the output voltage Vout becomes the RZ signal.

FIG. 4 shows an output waveform of an identification operation simulation in which the optical input data is 50 Gbit / s, which is folded every 100 ps and overwritten. In this FIG.
This is not a so-called “eye pattern” (a waveform in which each of Low and High exists as a straight line, and the transition level is inserted between them in an X-shape), because the output is an RZ signal. Since the RZ signal always returns to Low before moving to the next data signal after High or Low data, High continuity is not seen as usual. It can be confirmed that the identification operation has been performed.

As described above, in the identification circuit of this embodiment, the bistable circuit of the resonance tunnel diodes 1 and 2 performing the identification operation is directly connected to the first photodiode 4 that receives the optical data signal. This eliminates the need for an optical / electrical conversion interface circuit for input data. Also, since the second photodiode 5 is used for the input clock, an interface circuit for optical / electrical conversion is not required. Further, since the photodiode 4 having a smaller parasitic capacitance than the transistor is used for load current modulation, it is possible to prevent a data signal from leaking to the output terminal 6, and to operate at a higher speed than a conventional identification circuit using a transistor. Become.

[Second Embodiment] FIG. 5 is a diagram showing an identification circuit according to a second embodiment. 1 are given the same reference numerals. The difference from the configuration of FIG. 1 is that the resonant tunnel diode 2 as a load is replaced with a resistor 9. The bistable circuit includes a resonant tunnel diode 1 and a resistor 9. This is the supply voltage Vo to the bistable circuit.

FIG. 6 is an explanatory diagram of the operation of the identification circuit.
Since the load has been changed to the resistor 9, the load curve combining the characteristics of the load resistor 9 and the first photodiode 4 is a straight line D. When an optical data signal is emitted, a current flows through the first photodiode 4,
The current value of the load curve D increases. Therefore, when light is irradiated at the time of the rise of the voltage Vo, the operating point C becomes the position shown in FIG.
It moves to the high voltage side as shown in FIG. Conversely, when the optical data signal is not irradiated, the load curve D moves without changing the current value, so that the operating point C remains on the low voltage side as shown in FIG.

FIG. 7 shows the identification circuit of the second embodiment in which the output waveform of the identification operation simulation in which the optical input data is 50 Gbit / s is folded every 100 ps and overwritten. Here, it can be confirmed that the identification operation has been performed.

[Third Embodiment] FIG. 8 is a diagram showing an identification circuit according to a third embodiment. 1 are given the same reference numerals. The difference from the configuration of FIG. 1 is that the resonant tunnel diode 3 as a load is
Is replaced by This transistor 10
Is a transistor in which the gate and the source or the base and the emitter are short-circuited. The bistable circuit includes a resonant tunnel diode 1 and a transistor 10. The supply voltage to this bistable circuit is Vo.

FIG. 9 is a diagram for explaining the operation of this identification circuit.
Since the load is changed to the transistor 10, the load curve is E. When the optical data signal is emitted, the photocurrent flows, so that the current value of the load curve E increases. Therefore, when the optical data signal is emitted when the voltage Vo rises, the operating point C moves to the high voltage side as shown in FIG. Conversely, when the optical data signal is not emitted, the load curve E moves without changing the current value, so that the operating point C remains on the low voltage side as shown in FIG.

[Other Embodiments] In the above description, the resonant tunnel diodes 1 and 2 are used, but these can be replaced with ordinary tunnel diodes.

[0027]

As described above, according to the present invention, an optical data signal is received by connecting a first photodiode to a bistable circuit using a tunnel diode, and the supply voltage of the bistable circuit is changed to a second photodiode. Since the control is performed by the optical clock signal received by the transistor, the optical / electrical signal conversion and the identification operation can be performed at the same time, and high-speed operation can be realized without increasing the circuit scale.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an identification circuit according to a first embodiment of the present invention.

FIG. 2 is an explanatory diagram of an operation of the identification circuit.

FIG. 3 is an operation waveform diagram of the identification circuit.

FIG. 4 is an output waveform diagram of the identification circuit.

FIG. 5 is a circuit diagram of an identification circuit according to a second embodiment.

FIG. 6 is an explanatory diagram of the operation of the identification circuit.

FIG. 7 is an output waveform diagram of the identification circuit.

FIG. 8 is a circuit diagram of an identification circuit according to a third embodiment.

FIG. 9 is a diagram illustrating the operation of the identification circuit.

FIG. 10 is a circuit diagram of a conventional identification circuit.

FIG. 11 is an explanatory diagram of the operation of the identification circuit.

FIG. 12 is an operation waveform diagram of the identification circuit.

[Explanation of symbols]

1, 2: resonant tunnel diode, 3: resistance, 4: first
, A photodiode of 5: a second photodiode,
6: output terminal, 7: power supply terminal, 8: ground, 9: resistance, 1
0: Transistor, 11, 12: Resonant tunnel diode, 13: Transistor, 14: Data input terminal, 1
5: Clock supply terminal, 16: Data output terminal.

Claims (4)

[Claims] An end of a load and the anode of a first photodiode are commonly connected to the other end of a tunnel diode having one end grounded, and the other end of the load and a cathode of the first photodiode are connected to one another by a direct current. Commonly connected to the other end of a resistor connected to a power supply, a second photodiode having its cathode connected to the other end of the resistor and an anode grounded, and an optical data signal input to the first photodiode. An identification circuit, wherein an optical clock signal is input to the second photodiode, and an electric output signal is extracted from a common connection point between the other end of the tunnel diode and the load. 2. The identification circuit according to claim 1, wherein said load is another tunnel diode. 3. The identification circuit according to claim 1, wherein said load is a resistor. 4. The identification circuit according to claim 1, wherein said load is a transistor whose gate and source or base and emitter are short-circuited.