JPH1168111A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the introduction of metallic element from becoming incomplete, in the case of introducing them, using the metallic elements for accelerating the crystallization of silicon by forming the end of a slit-shaped opening in such a form that the slit width becomes large. SOLUTION: A shape of an opening 204 for introducing nickel is devised. That is, it is made in such a form that the slit width becomes wide at the end of the opening 204 so that the solution is easy to penetrate this section. By so doing, the area of a section 209 where nickel acetate solution does not reach can be made small. Or the section 209 where the solution does not reach can be made in such a condition that there substantially is no problem even if it is made. That is, even if this section 209 is produced, this can prevent the effects from extending to the crystalline property of an active layer 207 made at the endmost section of a lateral growth region. As a result this can prevent the introduction of metallic elements from becoming incomplete at the end of the opening of the metallic element for accelerating the crystallization of silicon.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD [0001] The invention disclosed in the present specification is:
The present invention relates to means for crystallizing an amorphous silicon film. The crystallized silicon film is used for a thin film transistor or the like.

[0002]

2. Description of the Related Art Thin film transistors (hereinafter, referred to as TFTs) using a thin film semiconductor as an active layer are known.

[0003] As a thin film semiconductor used for a TFT,
An amorphous silicon film formed by a CVD method is mainly used.

However, TF using an amorphous silicon film
T has a problem that its characteristics are low. Therefore, a TFT is formed by using a crystalline silicon film obtained by crystallizing an amorphous silicon film.
It has been studied to construct.

As a method of crystallizing an amorphous silicon film, (1) a method of irradiating a laser beam to the amorphous silicon film to crystallize it. (2) A method of crystallizing an amorphous silicon film by heating. Is mainly known.

In general, the heating method has the advantages that the reproducibility is excellent and that a large area can be handled. However, since the heating temperature is relatively high, there is a problem that a glass substrate cannot be used as a substrate or it is difficult to use a glass substrate.

[0007] The application field of the TFT is mainly a liquid crystal display device, and it is required to use a glass substrate as a substrate. Therefore, a technique for forming a crystalline silicon film on a glass substrate is needed.

As a means for solving this problem, there is a crystallization technique by the present applicant. This is a technique for crystallization of an amorphous silicon film by heating by using a metal element such as nickel, which promotes crystallization of silicon.

According to this technique, the heating temperature required for crystallization can be reduced. And higher crystallinity can be obtained.

In this method, a nickel element is held in contact with the surface of an amorphous silicon film, and then a heat treatment is applied to crystallize the amorphous silicon film.

[0011] The nickel element diffuses into the amorphous silicon film, and crystallization proceeds at that time.

In this method, a special crystal growth called lateral growth can be performed by selectively introducing the nickel element.

This is a crystal growth mode in which crystal growth proceeds from a region into which nickel element has been introduced toward another region.

When this crystal growth mode is used, a TFT having extremely high mobility can be selected by selecting a crystal growth direction and a carrier moving direction during the operation of the TFT.
Can be obtained.

The use of this lateral growth technique makes it possible to control the existence of grain boundaries in the active layer of a TFT, which has been difficult in the past.

FIG. 1 shows an example of the case where lateral growth is performed.
In FIG. 1, (A) shows a cross section and (B) shows a state viewed from above.

To perform lateral growth, first, an amorphous silicon film 102 is formed on a glass substrate by a plasma CVD method (or a low pressure thermal CVD method).

Next, a mask 103 made of a silicon oxide film is formed. An opening 104 is formed in the mask 103, and the amorphous silicon film 102 is exposed at this opening.
This opening becomes the nickel addition window.

The opening 104 has an elongated slit shape as shown in FIG. (A) is a cross-sectional view, and (B) is a top view.

After the formation of the mask 103, a nickel acetate solution is applied to obtain a state in which the nickel element is held in contact with the surface as indicated by 105.

The method using this solution is excellent in adjusting the amount of nickel introduced and in reproducibility. It is also excellent in that the process is simple.

When the application of the nickel acetate solution is completed,
Next, heat treatment is performed. By this heat treatment, crystal growth proceeds from a region of the amorphous silicon film where the nickel element is held in contact. That is, crystal growth proceeds from the nickel-added window region where the opening 104 is formed.

This crystal growth proceeds in a state shown by an arrow 106. This crystal growth is performed according to the diffusion of nickel, and the distance can be performed over 100 μm or more.

Reference numeral 108 in FIG. 1B shows a pattern of an active layer formed in a region laterally grown after crystallization. (An active layer is formed in the pattern of 108 later.)

This laterally grown region has high crystallinity. In addition, the crystal grain boundaries extend substantially parallel to the direction in which the crystal grains grow laterally. Then, a device having high characteristics can be manufactured by using this region.

[0026]

The technique using lateral growth shown in FIG. 1 is a technique capable of obtaining a TFT having high characteristics. However, on the other hand, when an integrated circuit is formed, the following problems occur.

In the case of forming an integrated circuit, a large number of active layer patterns are formed by using a lateral growth region from one nickel-added window (a region where the opening 104 is formed) as shown in FIG. Will be.

In this case, a region 110 in which the solution 109 does not spread is formed at the end of the opening 104.

This phenomenon is caused by the surface tension of the solution, the hydrophobicity of the amorphous silicon film or the silicon oxide film, the opening 104
It is considered to be related to the size of the like.

In such a state, the lateral growth in the vicinity of the end of the opening 104 becomes unsatisfactory.
Naturally, the active layer pattern 108 formed near the end of the opening 104 is configured using a region with incomplete crystallinity.

This tendency becomes more apparent when the degree of circuit integration is increased. This means that if you increase the degree of circuit integration,
This is because the width of the opening 104 becomes smaller and the active layer pattern is arranged near the end of the opening 104.

As a method for solving this problem, (1) the width of the opening 104 is increased. (2) Increase the distance indicated by 107. It is conceivable.

However, when these methods are adopted,
It is necessary to set the dimensions with a sufficient margin. This is not preferable when increasing the degree of integration of the circuit.

As a technical tendency, the degree of integration of circuits tends to increase. Therefore, it is not appropriate to adopt the method described above.

An object of the invention disclosed in this specification is to solve the above-described problem in the case where a metal element that promotes crystallization of silicon is selectively introduced using a solution.

[0036]

Means for Solving the Problems One of the inventions disclosed in the present specification is a step of arranging a mask having a slit-shaped opening on the surface of an amorphous silicon film; Selectively introducing a metal element that promotes crystallization of silicon on the surface of the amorphous silicon film, and the introduction of the metal element is performed using a solution containing the metal element,
An end of the slit-shaped opening has a shape in which a slit width is increased.

According to another aspect of the invention, a step of arranging a mask having a slit-shaped opening on the surface of an amorphous silicon film;
Selectively introducing a metal element that promotes crystallization of silicon on the surface of the amorphous silicon film using the mask;
The introduction of the metal element is performed using a solution containing the metal element, and at or near an end of the slit-shaped opening, a permeation part of the solution is formed. This is a manufacturing method of a semiconductor device which is a feature.

In the above structure, the structure of the permeation portion may be a structure having a large slit width.

In another aspect of the invention, a step of arranging a mask having a slit-shaped opening on the surface of the amorphous silicon film;
Selectively introducing a metal element that promotes crystallization of silicon on the surface of the amorphous silicon film using the mask;
Wherein the introduction of the metal element is performed using a solution containing the metal element, and the slit-shaped opening has a loop shape having no end. It is a manufacturing method.

As a metal element that promotes crystallization of silicon,
It is preferable to use nickel and use a nickel acetate solution as the solution containing nickel.

Generally, Fe, Co, Ni, Ru, Rh, Pd, Os, and I are metal elements that promote crystallization of silicon.
One or more selected from r, Pt, Cu, Au, Ge, Pd, and In can be used.

[0042]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the crystallization of an amorphous silicon film using a solution containing a metal element that promotes crystallization of silicon, a slit-shaped opening for selectively introducing a solution (addition window). Is a shape as shown by 204 in FIG.

In this method, a solution penetration portion is formed by partially increasing the slit width at the end of the opening. This makes it easier for the solution to penetrate that part. Then, the portion 110 shown in FIG. 1 where the solution does not permeate is prevented from being formed.

By forming the permeation part of the solution in this way, it is possible to suppress the problem of crystal growth that occurs when the permeation of the solution does not go well.

As the shape of the permeated portion, other than the shape shown in FIG. 2, the shapes shown by 403 and 404 in FIG. 4 can be adopted.

Further, as shown by 501 in FIG. 5, the slit-shaped opening may be closed in a loop so that the end of the opening does not exist.

In this case, since there is no end in the opening,
It is possible to prevent the formation of a portion that does not penetrate the solution as shown by 110 in FIG.

[0048]

【Example】

[Embodiment 1] In this embodiment, the problem shown in FIG. 1 is prevented by modifying the shape of the end of the region into which nickel is introduced.

FIG. 2 shows an outline of the present embodiment. 2A is a cross-sectional view, and FIG. 2B is a top view.

In this embodiment, as shown in FIG. 2, the shape of the end of the opening 204 for introducing nickel is devised.
That is, the end of the opening 204 has a shape in which the slit width is widened, and the solution easily penetrates in this portion.

By doing so, the area of the portion where the nickel acetate solution does not spread as shown by 209 can be reduced.

Alternatively, the portion where the solution does not spread can be formed in a state where there is substantially no problem even if it is formed.

That is, even if the portion indicated by 209 is generated,
The influence can be suppressed from affecting the crystallinity of the active layer 207 formed at the end portion of the lateral growth region.

The outline of the manufacturing process shown in FIG. 2 is shown below.
Further, a subsequent manufacturing process of the TFT will be described.

First, as shown in FIG. 2A, an amorphous silicon film 202 is formed on a glass substrate 201 to a thickness of 50 nm by a low pressure thermal CVD method.

Here, an example in which an amorphous silicon film is formed directly on a glass substrate will be described. However, a silicon oxide film or a silicon oxynitride film may be formed as a base film on a glass substrate. Good.

In addition to a glass substrate, a quartz substrate or a semiconductor substrate on which an insulating film is formed can be used.

After the amorphous silicon film 202 is formed, a 150 nm-thick silicon oxide film (not shown) is formed, and the film is patterned to form a mask pattern 203.

The mask pattern 203 has an opening indicated by 204. This opening 204 becomes a nickel addition window. This opening has an elongated longitudinal shape as shown in FIG.

The end of the opening 204 is shaped to have a large area, so that a solution to be applied later easily penetrates at the end.

After forming a mask made of a silicon oxide film, a nickel acetate solution adjusted to a nickel concentration of 10 ppm by weight is applied by spin coating.

As a result, a state in which the solution is held in contact with the surface as indicated by 205 is obtained. At the same time, a state in which the nickel element is held in contact with the surface is obtained.

At this time, at the end of the opening 204, 2
As shown by 09, a void is formed in which the nickel acetate solution does not spread.

However, since the end of the opening 204 is formed so as to have a large area, the large gap 110 as shown in FIG. 1 is not formed.

In general, it can be considered that the nickel element is mainly introduced into the region where the solution spreads. Therefore, in the case shown in FIG. 2, it can be said that a state in which the nickel element is introduced to the end of the opening is obtained.

Thus, the longitudinal direction of the longitudinal opening 204 can be fully utilized. This is a point greatly different from the case of FIG.

After the introduction of nickel using the solution,
A heat treatment is performed. This heat treatment is performed in a nitrogen atmosphere at 570 ° C. for 14 hours.

In this heat treatment, lateral growth as indicated by 206 progresses. At this time, disturbance of lateral growth in a region near the end of the opening 204 can be suppressed as compared with the case shown in FIG.

This is because, in this embodiment, the opening 204
This is because the nickel acetate solution enters up to the end.

Then, the positioning of the active layer formed at the end of the lateral growth region as indicated by 207 can be effectively performed.

That is, the distance indicated by a can be shortened as compared with the conventional case.

This is important when a higher degree of integration is required.

After the lateral growth indicated by 206 shown in FIG. 2 is performed, the mask 203 made of a silicon oxide film is removed. Then, the exposed silicon film is patterned, and 3 in FIG.
A pattern indicated by 02 is formed.

This pattern will later become the active layer of the TFT. Here, an example in which one TFT is manufactured is shown, but generally, a plurality of TFTs are manufactured simultaneously.

The pattern 302 constituting the active layer is formed by using the laterally grown region.

Next, a silicon oxide film 303 serving as a gate insulating film
Is formed to a thickness of 100 nm by a plasma CVD method. (FIG. 3 (A))

Further, an aluminum film is formed to a thickness of 400 nm by a sputtering method. Then, this aluminum film is patterned using the resist mask 300,
A pattern indicated by 304 is formed. This aluminum pattern 304 will be the original pattern that will later form the gate electrode. (FIG. 3 (A))

Next, an anodic oxide film 305 is formed by anodic oxidation.
To form This step is performed with the resist mask 300 remaining. Thus, an anodic oxide film is formed on the side surface of the aluminum pattern.

In this step, a 3% by volume aqueous solution of oxalic acid is used as an electrolytic solution, and in this solution, a current is passed between the two electrodes using the aluminum pattern 304 as an anode and platinum as a cathode. This anodic oxide film 305 has a porous shape (porous shape).

This anodic oxide film 305 is formed to a thickness of 400 nm. The control of the film thickness can be controlled by the anodic oxidation time.

Next, the resist mask 300 is removed, and anodic oxidation is performed again.

In this step, a solution obtained by neutralizing an ethylene glycol solution containing 3% by volume of tartaric acid with aqueous ammonia is used as an electrolytic solution.

Then, in the above solution, an anodic oxide film 306 is formed by passing a current between the two electrodes using the aluminum pattern as an anode and platinum as a cathode. This anodic oxide film 305 has crystals having dense film quality. (FIG. 3 (B))

The anodic oxide film 306 is formed around the finally remaining aluminum pattern 307 because the electrolytic solution penetrates into the porous anodic oxide film 305.

This anodic oxide film 306 is formed to a thickness of 70 nm. The control of the film thickness can be determined by the applied voltage.

Thus, the state shown in FIG. 3B is obtained. Here, the remaining aluminum pattern 307 becomes a gate electrode later.

After obtaining the state shown in FIG. 3B, doping of phosphorus is performed by a plasma doping method. In this step, the gate electrode 307 and the surrounding anodic oxide film 306 are formed.
And 305 on the side surface serve as a mask,
2 is selectively doped with phosphorus.

Thus, high concentration impurity regions (doped regions) 308 and 310 are formed. (FIG. 3 (B))

In this step, the region 309 is not doped.

Next, using the gate electrode 307, the anodic oxide film 306 on the surface thereof, and the side surface 305 as a mask, the exposed silicon oxide film 303 is removed by dry etching. Here, an RIE method having perpendicular anisotropy is used as an etching means.

Thus, the silicon oxide film 311 remains. This silicon oxide film 311 finally becomes a gate electrode.

Next, the porous anodic oxide film 305 is removed with a dedicated etchant solution. Thus, the state shown in FIG. 3C is obtained.

In this state, doping of phosphorus is performed again. In this step, doping is performed under the condition that the dose is lower by about one digit than that of the previous doping.

In this step, the regions 312 and 314 are lightly doped with phosphorus. The light doping means that the doping is performed with a lower dose compared to the doping for the regions 308 and 310.

In this step, regions 312 and 314 are doped with a low dose. Thus, low concentration impurity regions 312 and 314 are formed. (FIG. 3
(C))

It should be noted that 313 where doping was not performed was performed.
Region becomes a channel region.

Next, by irradiating a laser beam,
Anneal the doped region. This step may be performed by irradiation with infrared light.

Next, a silicon nitride film 315 is used as an interlayer insulating film.
Is formed to a thickness of 300 nm by a plasma CVD method. Further, an acrylic resin film 316 is formed by spin coating.

The thickness of the acrylic resin film 316 is set to 700 nm at the minimum. In addition, the acrylic resin film 316 is formed under a condition for flattening the surface.

Next, a contact hole is formed, and a source electrode 317 and a drain electrode 318 are formed.

The source electrode and the drain electrode are made of a 100 nm thick titanium film formed by a sputtering method and a 400 nm thick titanium film.
It is obtained by patterning a laminated film of a thick aluminum film and a 100 nm thick titanium film.

Thus, the TFT shown in FIG. 3D is completed.

[Embodiment 2] The present embodiment relates to a technique which can be used when a large number of TFTs are manufactured using lateral growth as shown in the first embodiment.

In the case of manufacturing a large number of TFTs, the problems described in the subject column occur at the ends of the nickel-added window.

This problem is explained at the end of the elongated nickel-added window as explained with reference to FIG.
This is because the solution containing nickel does not spread.

Therefore, in this embodiment, as shown in FIG.
And 404 as a circular shape.

In FIG. 4, the patterns indicated by 405 and 406 are the active layer patterns of the TFT. These active layer patterns are formed after crystallization is performed.

In this case, since the solution enters the nickel-added window portions indicated by 403 and 404, it is possible to suppress the above-mentioned problem from occurring.

This configuration can achieve the object of spreading the solution over the edge of the nickel addition window without significantly increasing the area occupied by the nickel addition window.

[Embodiment 3] In this embodiment, the nickel addition window is shaped as shown by 501 in FIG.

Here, what is indicated by 502 to 504 is a pattern which will later become an active layer of the TFT. (Active layer pattern is formed after crystallization)

The problem shown in FIG. 1 can be solved by forming the nickel-added window into a shape as shown by 501.

That is, by forming the nickel-added window into a shape having no end, it is possible to avoid a state in which the solution does not reach the end of the nickel-added window shown in FIG.

[Embodiment 4] This embodiment shows an example in which a channel doping technique is used. As a technique for controlling a threshold voltage of a TFT, a technique of doping an active layer or a channel region with an impurity imparting one conductivity type is known.

Generally, if it is desired to shift the threshold value to the plus side, an impurity imparting P-type is doped. If it is desired to shift the threshold value to the negative side, an impurity imparting N-type is doped.

The same applies to a P-channel TFT and an N-channel TFT.

This embodiment shows an example in which boron is doped in the N-channel TFT shown in FIG. 3 in order to shift the threshold value to the positive side.

In this case, boron doping is performed by using a plasma doping method after the gate insulating film 303 is formed. After completion of the doping, annealing by laser light irradiation is performed.

The amorphous silicon film to be formed first may be doped with boron. In this case, the reduced pressure heat C
When an amorphous silicon film is formed by a VD method or a plasma CVD method, B ₂ H ₆ (diborane) may be added to the atmosphere.

[Embodiment 5] This embodiment shows an example in which the invention disclosed in this specification is used for manufacturing a bottom gate type TFT.

First, as shown in FIG. 6A, a gate electrode 602 is formed on a glass substrate 601 by using an N-type silicon material.
To form

As the material of the gate electrode, various metals and various silicide materials can be used.

After the gate electrode 602 is formed, a silicon oxide film is formed as a gate insulating film 603 by a plasma CVD method.

Further, as shown in FIG. 2, FIG. 4, or FIG. 5, a mask 605 made of a silicon oxide film having an opening 606 serving as a nickel-added window is formed. (FIG. 6
(A))

In the opening 606, the amorphous silicon film 6
04 is exposed. (FIG. 6 (A))

Next, a nickel acetate solution is applied to obtain a state in which the nickel element is in contact with and held on the surface.

Then, a heat treatment is performed, and crystal growth (lateral growth) as shown by openings (nickel-added windows) 606 to 607 is performed. (FIG. 6 (A))

Next, the mask 605 made of a silicon oxide film is removed. Further, the silicon film that has been crystallized is patterned to form a pattern 608. This pattern becomes the active layer of the TFT. (FIG. 6 (B))

Next, a pattern 609 made of a silicon nitride film is formed. (FIG. 6 (C))

Then, a source region 613 and a drain region 614 are formed by forming an N-type microcrystalline silicon film and patterning the film. (FIG. 6 (D))

Thus, a bottom gate type TFT can be obtained.

[Embodiment 6] In this embodiment, examples of various devices manufactured by utilizing the present invention will be described. The invention disclosed in this specification can be used for various devices including a circuit in which an integrated circuit is formed using TFTs.

This embodiment shows an example in which an integrated circuit is constructed using TFTs. As the integrated circuit, a CPU circuit, a memory circuit, and the like can be given. FIG. 7 shows TF
An outline of an integrated circuit using T is shown.

FIG. 8A shows a portable information processing terminal. This information processing terminal includes an active matrix type liquid crystal display or an active matrix type EL display as a display device 2005 in a main body 2001, an integrated circuit 2006 therein, and a camera unit for taking in information from outside. 200
2 is provided.

In the camera section 2002, an image receiving section 2003 and operation switches 2004 are arranged.

It is considered that the information processing terminal will become thinner and lighter in order to improve its portability.

In such a configuration, it is preferable that the peripheral drive circuit, the arithmetic circuit, and the memory circuit on the substrate on which the active matrix type display 2005 is formed be integrated with TFTs.

FIG. 8B shows a head mounted display. This device includes an active matrix type liquid crystal display and an EL display 2102 in a main body 2101. The main body 2101 can be attached to the head with a band 2103.

FIG. 8C shows a car navigation system. This device has a main body 2201 provided with a liquid crystal display device 2202 and operation switches 2203, and an antenna 2
It has a function of displaying geographic information and the like according to the signal received at 204.

FIG. 8D shows a portable telephone.
This device includes an active matrix type liquid crystal display device 2304, operation switches 2305, a sound input portion 2303, a sound output portion 2302, and an antenna 2306 in a main body 2301.
It has.

In recent years, a configuration in which a portable information processing terminal shown in (A) and a mobile phone shown in (D) are combined has been commercialized. Even in such a configuration, a configuration in which an active matrix type display and other circuits are integrated with TFTs on the same substrate is useful.

FIG. 8E shows a portable video camera. This is because the main body 2401 has an image receiving unit 2406,
An audio input unit 2403, operation switches 2404, an active matrix liquid crystal display 2402, and a battery 2405 are provided.

FIG. 8F shows a projection type liquid crystal display device. In this configuration, a light source 2502 and an active matrix type liquid crystal display device 2
503, an optical system 2504, and a function of displaying an image on a screen 2505 arranged outside the apparatus.

Here, as the liquid crystal display device, either a transmission type or a reflection type can be used.

In the devices shown in FIGS. 8A to 8E, an active matrix type display using EL elements can be used instead of the liquid crystal display device.

[0146]

According to the invention disclosed in this specification, it is possible to solve a problem in a case where a method of selectively introducing a metal element for promoting crystallization of silicon using a solution is adopted. .

Specifically, it is possible to prevent incomplete introduction of the metal element at the end of the window for adding the metal element which promotes crystallization of silicon.

By adopting a shape that does not have a nickel-added window, it is possible to prevent the metal element from being incompletely introduced.

Thus, it is possible to suppress a problem that crystal growth becomes defective in some regions.

[Brief description of the drawings]

FIG. 1 is a schematic diagram showing a conventional technique.

FIG. 2 is a schematic diagram showing one embodiment of the present invention.

FIG. 3 illustrates a manufacturing process of a TFT.

FIG. 4 is a schematic view showing an embodiment of the present invention.

FIG. 5 is a schematic view showing an embodiment of the present invention.

FIG. 6 illustrates a manufacturing process of a TFT.

FIG. 7 is a diagram showing an example of an integrated circuit using a TFT.

FIG. 8 is a diagram showing examples of various devices using a TFT.

[Explanation of symbols]

Reference Signs List 101 glass substrate (or quartz substrate) 102 amorphous silicon film 103 mask made of silicon oxide film 104 opening (nickel addition window) 105 nickel acetate solution 106 crystal growth direction (nickel diffusion direction) 108 active layer pattern 109 nickel acetate A region where the solution has spread 110 A region where the nickel acetate solution has not spread 201 Glass substrate (or quartz substrate) 202 Amorphous silicon film 203 Mask made of silicon oxide film 204 Opening (Nickel-added window) 205 Nickel acetate solution 206 Crystal Growth direction (nickel diffusion direction) 207 Active layer pattern 208 Region where nickel acetate solution has spread 209 Region where nickel acetate solution has not spread 302 Active layer 303 Silicon oxide film (gate insulating film) 300 Resist mask 304 Aluminum pattern 305 Porous anodic oxide film 306 Anodized film having dense film quality 307 Gate electrode 308 Source region (high concentration impurity region) 309 Region not doped 310 Drain region (high concentration impurity region) 312 Low Concentration impurity region 313 Channel region 314 Low concentration impurity region 315 Interlayer insulating film (silicon nitride film) 316 Acrylic resin film 317 Source electrode 318 Drain electrode 401 Nickel-added window 402 Nickel-added window 403 End of nickel-added window 404 Nickel-added window Edge 405 Active layer pattern 406 Active layer pattern 501 Edge of nickel-doped window 502 Active layer pattern 503 Active layer pattern 504 Active layer pattern

Claims (5)

[Claims] 1. A step of arranging a mask having a slit-shaped opening on the surface of an amorphous silicon film; and a metal for promoting crystallization of silicon on the surface of the amorphous silicon film using the mask. Selectively introducing an element, and wherein the introduction of the metal element is performed using a solution containing the metal element, and the end of the slit-shaped opening has a large slit width. A method for manufacturing a semiconductor device, which has a shape. 2. A step of arranging a mask having a slit-shaped opening on the surface of an amorphous silicon film; and a metal for promoting crystallization of silicon on the surface of the amorphous silicon film using the mask. Selectively introducing an element, and wherein the introduction of the metal element is performed using a solution containing the metal element, and the solution is provided at or near an end of the slit-shaped opening. A method for manufacturing a semiconductor device, characterized in that a penetrated portion of the semiconductor device is formed. 3. A step of arranging a mask having a slit-shaped opening on the surface of the amorphous silicon film; and a metal for promoting crystallization of silicon on the surface of the amorphous silicon film using the mask. Selectively introducing an element, and wherein the introduction of the metal element is performed using a solution containing the metal element, and the slit-shaped opening has a loop shape having no end. A method for manufacturing a semiconductor device. 4. The method according to claim 1, wherein nickel is used as a metal element for promoting crystallization of silicon, and a nickel acetate solution is used as a solution containing the metal element. A method for manufacturing a semiconductor device. 5. The method according to claim 1, wherein the metal element for promoting crystallization of silicon is Fe, Co,
Ni, Ru, Rh, Pd, Os, Ir, Pt, Cu, A
A method for manufacturing a semiconductor device, wherein one or more types selected from u, Ge, Pd, and In are used.