JPH1167772A - Leveling method for protruding electrode of semiconductor element - Google Patents

Leveling method for protruding electrode of semiconductor element

Info

Publication number
JPH1167772A
JPH1167772A JP9217913A JP21791397A JPH1167772A JP H1167772 A JPH1167772 A JP H1167772A JP 9217913 A JP9217913 A JP 9217913A JP 21791397 A JP21791397 A JP 21791397A JP H1167772 A JPH1167772 A JP H1167772A
Authority
JP
Japan
Prior art keywords
semiconductor element
leveling
height
protruding
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9217913A
Other languages
Japanese (ja)
Other versions
JP3690903B2 (en
Inventor
Kazuji Azuma
和司 東
Akihiro Yamamoto
章博 山本
Koichi Yoshida
幸一 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP21791397A priority Critical patent/JP3690903B2/en
Publication of JPH1167772A publication Critical patent/JPH1167772A/en
Application granted granted Critical
Publication of JP3690903B2 publication Critical patent/JP3690903B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To make leveling height of protruding electrodes uniform with high precision by reducing the variance in leveling height of the protruding electrodes of a semiconductor element, when the height of a plurality of protruding electrodes formed on the semiconductor element is made uniform by sandwiching the semiconductor element between two plates and adding a load. SOLUTION: When the height of a plurality of protruding electrodes 1 formed on a semiconductor element 2 is made uniform by sandwiching a semiconductor element 2 between two plates 3 and 4 and adding a load, a material 5 that distorts elastically is inserted inbetween a surface 2a of the semiconductor element 2, on which the protruding electrode 1 is not formed and a leveling plate (on the lower side) 4, and under this condition, the tip of the protruding electrode 1 is squashed by adding the load, so that the height of the plurality of protruding electrodes 1 is leveled uniformly.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体素子の組立
プロセスにおける半導体素子の突起電極のレベリング方
法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for leveling bump electrodes of a semiconductor device in a process of assembling the semiconductor device.

【0002】[0002]

【従来の技術】近年、半導体素子の実装方法は高密度化
になり、最も高密度に実装が実現できるフリップチップ
実装工法が多く利用されている。
2. Description of the Related Art In recent years, the mounting methods of semiconductor elements have become higher in density, and flip-chip mounting methods capable of realizing the highest density mounting have been widely used.

【0003】半導体素子の突起電極と基板の配線電極等
とを直接に接続するフリップチップ実装工法の場合、半
導体素子の突起電極の高さが揃っていないと、基板の配
線電極に半導体素子の突起電極が接触していない部位が
発生し、接触不良等による問題が生じるため、従来から
半導体素子の突起電極の高さを高精度に揃える必要があ
る。
In the flip-chip mounting method of directly connecting the projecting electrodes of the semiconductor element and the wiring electrodes of the substrate, if the heights of the projecting electrodes of the semiconductor element are not uniform, the projecting electrodes of the semiconductor element are attached to the wiring electrodes of the substrate. Since a portion where the electrode is not in contact is generated and a problem such as poor contact occurs, it is conventionally necessary to align the heights of the protruding electrodes of the semiconductor element with high precision.

【0004】従来においての半導体素子の突起電極のレ
ベリング方法は、図7に示すように、平行により近く調
整された2枚のレベリングプレートの間に半導体素子2
の突起電極1を形成している面2bを上側にしてレベリ
ングプレート(下側)4上に載置して、レベリングプレ
ート(上側)3で半導体素子2の突起電極1を挟み込
み、荷重を加えることにより、突起電極1の先端をつぶ
して高さを均一化するものである。
As shown in FIG. 7, a conventional method for leveling a protruding electrode of a semiconductor device is such that a semiconductor device 2 is placed between two leveling plates which are adjusted closer to parallel.
Is placed on a leveling plate (lower side) 4 with the surface 2b on which the protruding electrode 1 is formed upward, and the protruding electrode 1 of the semiconductor element 2 is sandwiched by the leveling plate (upper side) 3 to apply a load. Thereby, the tip of the protruding electrode 1 is crushed to make the height uniform.

【0005】[0005]

【発明が解決しようとする課題】しかし従来の半導体素
子の突起電極のレベリング方法では、レベリングプレー
ト(上側)3および(下側)4との平行度の状態によっ
て、レベリングされる複数の突起電極1の高さの精度が
左右されている。具体的には、レベリングプレート(上
側)3とおよび(下側)4との平行度の調整は、約4μ
m程度までが限界であり、この平行度の状態で突起電極
1の高さをレベリングするため、前記の平行度のずれが
そのまま反映して、複数の突起電極1の高さのばらつき
は、約4μm程度となり、複数の突起電極1のレベリン
グ高さがばらつく問題がある。
However, in the conventional method of leveling the protruding electrodes of a semiconductor device, a plurality of protruding electrodes 1 to be leveled are determined depending on the parallelism with the leveling plates (upper) 3 and (lower) 4. The accuracy of the height is affected. Specifically, the adjustment of the parallelism between the leveling plates (upper) 3 and (lower) 4 is about 4 μm.
m is the limit, and the height of the protruding electrode 1 is leveled in the state of the parallelism. Therefore, the deviation of the parallelism is directly reflected, and the variation in the height of the plurality of protruding electrodes 1 is about As a result, there is a problem that the leveling height of the plurality of bump electrodes 1 varies.

【0006】また、半導体素子サイズが大きくなるにつ
れて、使用するレベリングプレートも大きくなり、レベ
リングプレートの加工精度が悪くなることにより、レベ
リングプレートの加工精度の悪さと前記レベリングプレ
ート3、4の平行度により複数の突起電極1のレベリン
グ高さがばらつく問題がある。
Further, as the size of the semiconductor element increases, the leveling plate used also increases, and the processing accuracy of the leveling plate deteriorates. Therefore, the processing accuracy of the leveling plate and the parallelism of the leveling plates 3 and 4 increase. There is a problem that the leveling height of the plurality of bump electrodes 1 varies.

【0007】また、半導体素子2下に異物等が存在する
場合は、異物等により半導体素子2が傾いた状態で半導
体素子2の突起電極1のレベリングを実施するため、複
数の突起電極1のレベリング高さがばらつく問題があ
る。
When a foreign substance or the like is present under the semiconductor element 2, the leveling of the projection electrode 1 of the semiconductor element 2 is performed in a state where the semiconductor element 2 is inclined by the foreign substance or the like. There is a problem that the height varies.

【0008】本発明は、半導体素子の突起電極のレベリ
ング高さを高精度に均一化する半導体素子の突起電極の
レベリング方法を提供することを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method of leveling a protruding electrode of a semiconductor device, which makes the leveling height of the protruding electrode of the semiconductor device uniform with high precision.

【0009】[0009]

【課題を解決するための手段】本発明の半導体素子の突
起電極のレベリング方法は、2枚のプレート間に半導体
素子を挟んで荷重を加えて前記半導体素子上に形成され
た複数の突起電極の高さを均一化するに際し、前記半導
体素子の突起電極を形成していない面と前記プレートの
うち一方のプレート間に弾性変形する材料を介装し、こ
の状態で前記荷重を加えて突起電極の高さをレベリング
するものである。
According to the present invention, there is provided a method for leveling a protruding electrode of a semiconductor device, the method comprising: applying a load with a semiconductor device sandwiched between two plates to apply a plurality of protruding electrodes formed on the semiconductor device. In making the height uniform, a material that is elastically deformed is interposed between the surface of the semiconductor element on which the protruding electrode is not formed and one of the plates, and in this state, the load is applied to the protruding electrode. Leveling the height.

【0010】この本発明の半導体素子の突起電極のレベ
リング方法によると、半導体素子の複数の突起電極のレ
ベリング高さを高精度に均一化することができる。
According to the method for leveling the protruding electrodes of the semiconductor device of the present invention, the leveling height of the plurality of protruding electrodes of the semiconductor device can be made uniform with high precision.

【0011】[0011]

【発明の実施の形態】本発明の請求項1に記載の方法
は、2枚のプレート間に半導体素子を挟んで荷重を加え
て前記半導体素子上に形成された複数の突起電極の高さ
を均一化するに際し、前記半導体素子の突起電極を形成
していない面と前記プレートのうち一方のプレート間に
弾性変形する材料を介装し、この状態で前記荷重を加え
て突起電極の高さをレベリングする半導体素子の突起電
極のレベリング方法としたものであり、半導体素子の突
起電極を形成していない面と前記プレートのうち一方の
プレート間に弾性変形する材料を介装したことにより、
半導体素子の突起電極を形成している面と前記面に接す
るプレートとがより平行になるように弾性変形する材料
によって平行度のずれを吸収して、複数の半導体素子の
突起電極のレベリング高さを高精度に均一化することが
できる。また、半導体素子下に異物等が存在して半導体
素子が傾いている場合でも、弾性変形する材料により半
導体素子の傾きを低減して、半導体素子の突起電極のレ
ベリング高さを高精度に均一化することができる。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In a method according to a first aspect of the present invention, the height of a plurality of projecting electrodes formed on a semiconductor element is increased by applying a load with a semiconductor element sandwiched between two plates. Upon uniforming, a material that is elastically deformed is interposed between the surface of the semiconductor element on which the protruding electrode is not formed and one of the plates, and the load is applied in this state to increase the height of the protruding electrode. The leveling method of the protruding electrode of the semiconductor element to be leveled, by interposing an elastically deformable material between the surface of the semiconductor element where the protruding electrode is not formed and one of the plates,
The leveling height of the projecting electrodes of a plurality of semiconductor elements is absorbed by a material that elastically deforms so that the surface on which the projecting electrodes of the semiconductor element are formed and the plate in contact with the surface are more parallel to each other. Can be uniformed with high precision. Even when the semiconductor element is tilted due to the presence of foreign matter or the like under the semiconductor element, the inclination of the semiconductor element is reduced by the elastically deformable material, and the leveling height of the protruding electrodes of the semiconductor element is made uniform with high precision. can do.

【0012】本発明の請求項2に記載の方法は、2枚の
プレート間に半導体素子を挟んで荷重を加えて前記半導
体素子上に形成された複数の突起電極の高さを均一化す
るに際し、前記プレート間を通過するテープ状の弾性変
形する材料の上に、複数の半導体素子を配列し、前記荷
重を加えて突起電極の高さのレベリングを実施する度に
前記半導体素子を移送して、次の半導体素子を前記プレ
ートの間に位置させて突起電極の高さをレベリングする
ことを繰り返す半導体素子の突起電極のレベリング方法
としたものであり、2つのプレート間を通過するテープ
状の弾性変形する材料の上に複数の半導体素子を配列し
て、荷重を加えて突起電極の高さのレベリングを複数の
半導体素子に対して順次実施するので、前記と同様の効
果を有するとともに、複数の半導体素子の突起電極の高
さのレベリングを効率よく実施することができる。
According to a second aspect of the present invention, a method is provided for applying a load with a semiconductor element sandwiched between two plates to equalize the heights of a plurality of protruding electrodes formed on the semiconductor element. A plurality of semiconductor elements are arranged on a tape-shaped elastically deformable material passing between the plates, and the semiconductor elements are transferred each time the load is applied and leveling of the height of the protruding electrode is performed. And a leveling method of the protruding electrode of the semiconductor element which repeats leveling the height of the protruding electrode by positioning the next semiconductor element between the plates, and a tape-like elasticity passing between the two plates. Since a plurality of semiconductor elements are arranged on a deformable material, and a level is applied to the plurality of semiconductor elements sequentially by applying a load, the same effect as described above is obtained. It can implement leveling of the height of the projecting electrodes of a plurality of semiconductor elements efficiently.

【0013】本発明の請求項3に記載の方法は、弾性変
形する材料を粘着性のある材料とした請求項1または請
求項2に記載の半導体素子の突起電極のレベリング方法
としたものであり、半導体素子の複数の突起電極の高さ
のレベリングするに際して、弾性変形する材料の粘着性
によって半導体素子をより固定することができ、半導体
素子の突起電極を形成している面と前記面に接するプレ
ートとがより平行になるように粘着性のある弾性変形す
る材料によって平行度のずれを吸収して、複数の半導体
素子の突起電極のレベリング高さを高精度に均一化する
ことができる。また、弾性変形する材料をテープ状にし
て複数の半導体素子を移送するに際して、弾性変形する
材料の粘着性によって半導体素子を固定した状態で移送
することができる。
According to a third aspect of the present invention, there is provided a method for leveling a protruding electrode of a semiconductor device according to the first or second aspect, wherein the elastically deformable material is a sticky material. When leveling the height of the plurality of bump electrodes of the semiconductor element, the semiconductor element can be more firmly fixed by the adhesiveness of the elastically deformable material, and comes into contact with the surface on which the bump electrode of the semiconductor element is formed and the surface. The deviation in parallelism is absorbed by an adhesive and elastically deformable material so that the plate becomes more parallel to the plate, and the leveling height of the projecting electrodes of the plurality of semiconductor elements can be made uniform with high precision. Further, when transferring a plurality of semiconductor elements by making the elastically deformable material into a tape shape, the semiconductor elements can be transferred in a fixed state by the adhesiveness of the elastically deformable material.

【0014】本発明の請求項4に記載の方法は、2枚の
プレート間に半導体素子を挟んで荷重を加えて前記半導
体素子上に形成された複数の突起電極の高さを均一化す
るに際し、下側のプレート上に設けた突起部が、前記複
数の突起電極間に前記荷重により発生する重心からの垂
線と前記半導体素子の突起電極を形成していない面との
交点またはその近接位置に当接するように載置し、この
状態で前記荷重を加えて突起電極の高さをレベリングす
る半導体素子の突起電極のレベリング方法としたもので
あり、下側のプレート上に設けた突起部が、前記の複数
の突起電極間に前記荷重により発生する重心からの垂線
と突起電極を形成していない面との交点またはその近接
位置に当接するように載置して荷重を加えることによ
り、半導体素子の突起電極を形成している面と前記面に
接するプレートとがより平行になるように半導体素子の
突起電極を形成している面が傾き、平行度のずれを吸収
して、半導体素子の複数の突起電極のレベリング高さを
高精度に均一化することができる。
According to a fourth aspect of the present invention, there is provided a method for equalizing the height of a plurality of protruding electrodes formed on a semiconductor element by applying a load with a semiconductor element sandwiched between two plates. A projection provided on the lower plate is located at an intersection of a perpendicular line from a center of gravity generated by the load between the plurality of projection electrodes and a surface of the semiconductor element on which the projection electrode is not formed or at a position close to the intersection. It is a method of leveling the protruding electrode of the semiconductor element, which is placed so as to abut and applies the load in this state to level the height of the protruding electrode, and the protruding portion provided on the lower plate, A semiconductor element is mounted by applying a load between the plurality of protruding electrodes so as to abut on an intersection of a perpendicular line from a center of gravity generated by the load and a surface on which the protruding electrodes are not formed or a position close to the intersection. Butt The surface of the semiconductor element on which the protruding electrode is formed is inclined so that the surface on which the electrode is formed and the plate in contact with the surface are more parallel to each other. The leveling height of the electrode can be made uniform with high precision.

【0015】また、半導体素子下に異物等が存在する場
合でも、下側のプレート上に設けた突起部の高さより小
さい異物等であれば、半導体素子の突起電極のレベリン
グに関して異物等による影響をほとんど受けない。
[0015] Even when foreign matter or the like exists under the semiconductor element, if the foreign matter is smaller than the height of the projection provided on the lower plate, the influence of the foreign matter or the like on the leveling of the projection electrode of the semiconductor element can be obtained. Hardly ever.

【0016】具体的には、半導体素子の突起電極を形成
している面の中心または複数の突起電極で囲まれた面の
中心を求め、下側のプレート上に設けた突起部が前記中
心からの垂線と半導体素子の突起電極を形成していない
面との交点またはその近接位置に当接するように載置
し、この状態で前記荷重を加えて突起電極の高さをレベ
リングすることを特徴とする。
Specifically, the center of the surface of the semiconductor element on which the protruding electrodes are formed or the center of the surface surrounded by the plurality of protruding electrodes is determined, and the protruding portion provided on the lower plate is positioned from the center. Is placed so as to abut on the intersection of the perpendicular line of the semiconductor element and the surface of the semiconductor element on which the protruding electrode is not formed or in the vicinity thereof, and in this state, the load is applied to level the height of the protruding electrode. I do.

【0017】本発明によると、半導体素子の突起電極を
形成している面の中心または複数の突起電極で囲まれた
面の中心からの垂線と突起電極を形成していない面との
交点またはその近接位置に突起部が当接するように載置
して荷重を加えることによっても、前記と同様の効果を
有する。
According to the present invention, the intersection of the vertical line from the center of the surface of the semiconductor element where the projecting electrodes are formed or the center of the surface surrounded by the plurality of projecting electrodes and the surface where the projecting electrodes are not formed or the intersection thereof. The same effect as described above can also be obtained by applying a load by placing the projection so that the projection abuts on the proximity position.

【0018】以下、本発明の半導体素子の突起電極のレ
ベリング方法の具体的な実施の形態に基づいて説明す
る。 (実施の形態1)図1に示すように、レベリングプレー
ト(上側)3とレベリングプレート(下側)4との間に
半導体素子2を挟んで荷重を加えて半導体素子2上に形
成された複数の突起電極1の高さを均一化するに際し
て、半導体素子2の突起電極1を形成していない面2a
とレベリングプレート(下側)4との間に弾性変形する
材料5、例えば、ポリイミドシートを介装して、この状
態で前記荷重を加えて突起電極1の先端をつぶして、複
数の突起電極1の高さを均一にレベリングする半導体素
子の突起電極のレベリング方法である。
Hereinafter, a method for leveling a bump electrode of a semiconductor device according to the present invention will be described based on a specific embodiment. (Embodiment 1) As shown in FIG. 1, a plurality of layers formed on a semiconductor element 2 by applying a load with a semiconductor element 2 interposed between a leveling plate (upper side) 3 and a leveling plate (lower side) 4 When the height of the projecting electrode 1 is made uniform, the surface 2a of the semiconductor element 2 on which the projecting electrode 1 is not formed is formed.
A material 5 that is elastically deformed, for example, a polyimide sheet, is interposed between the protruding electrode 1 and the leveling plate (lower side) 4. This is a method of leveling the protruding electrodes of the semiconductor element to level the height uniformly.

【0019】弾性変形する材料5の厚みは、薄すぎれば
平行度がとれるまでに弾性変形する材料5が変形しなく
なり、厚すぎれば荷重を加えたときに弾性変形する材料
5に半導体素子2が沈んで十分に荷重を加えられないの
で、例えば10μmから30μmとした。
If the thickness of the elastically deformable material 5 is too small, the elastically deformable material 5 will not be deformed until the parallelism is obtained. If the thickness is too large, the semiconductor element 2 will be elastically deformed when a load is applied. For example, the thickness was set to 10 μm to 30 μm since the load was not sufficiently applied due to sinking.

【0020】弾性変形する材料5として他には、ウレタ
ンゴム、シリコーンゴム等がある。なお、半導体素子2
上に形成された複数の突起電極1の高さは、通常約45
μm程度に形成されている。
Other examples of the elastically deformable material 5 include urethane rubber and silicone rubber. Note that the semiconductor element 2
The height of the plurality of projecting electrodes 1 formed thereon is generally about 45
It is formed to about μm.

【0021】レベリングプレート(上側)3とレベリン
グプレート(下側)4の平行度が約4μm程度に平行に
調整された状態で突起電極1の高さをレベリングした場
合でも、弾性変形する材料5により半導体素子2の突起
電極1を形成している面2bとレベリングプレート(上
側)3とがより平行になるように、弾性変形する材料5
により平行度のずれを吸収して、複数の突起電極1の高
さのばらつきは約2μm程度となる。
Even when the height of the projecting electrode 1 is leveled in a state where the parallelism between the leveling plate (upper) 3 and the leveling plate (lower) 4 is adjusted to be about 4 μm in parallel, the material 5 which is elastically deformed can be used. A material 5 that is elastically deformed so that the surface 2b of the semiconductor element 2 on which the protruding electrodes 1 are formed and the leveling plate (upper side) 3 are more parallel.
As a result, the deviation in parallelism is absorbed, and the variation in the height of the plurality of protruding electrodes 1 is about 2 μm.

【0022】半導体素子2下に異物等が存在して半導体
素子2が傾いている場合、弾性変形する材料5により異
物等による半導体素子2の傾きを低減することができ
る。以上のことから、半導体素子2の突起電極1を形成
していない面2aとレベリングプレート(下側)4との
間に弾性変形する材料5を介装して、この状態で荷重を
加えて複数の突起電極1の高さをレベリングすることに
より、複数の突起電極1の高さを高精度に均一化するこ
とができる。
When the semiconductor element 2 is tilted due to the presence of foreign matter or the like under the semiconductor element 2, the inclination of the semiconductor element 2 due to the foreign matter or the like can be reduced by the elastically deformable material 5. From the above, the elastically deformable material 5 is interposed between the surface 2a of the semiconductor element 2 on which the protruding electrode 1 is not formed and the leveling plate (lower side) 4, and a load is applied in this state. By leveling the heights of the projecting electrodes 1, the heights of the plurality of projecting electrodes 1 can be made uniform with high precision.

【0023】また、半導体素子下に異物等が存在して半
導体素子が傾いている場合でも、弾性変形する材料によ
り異物等による半導体素子の傾きが低減して、半導体素
子の突起電極のレベリング高さを高精度に均一化するこ
とができる。
Further, even when a foreign substance or the like is present under the semiconductor element and the semiconductor element is tilted, the inclination of the semiconductor element due to the foreign substance or the like is reduced by the elastically deformable material, and the leveling height of the projecting electrode of the semiconductor element is reduced. Can be uniformed with high precision.

【0024】実施の形態1において、弾性変形する材料
5としてウレタンゴム、シリコーンゴム等を使用した場
合でも、前記と同様の効果を有する。実施の形態1にお
いて、弾性変形する材料5を粘着性のある材料、例えば
アクリル系粘着材、シリコーン系粘着材とした場合で
も、前記と同様の効果を有し、弾性変形する材料5の粘
着性により半導体素子2をより固定することができる。
In the first embodiment, even when urethane rubber, silicone rubber, or the like is used as the material 5 that is elastically deformed, the same effect as described above is obtained. In the first embodiment, even when the elastically deformable material 5 is made of an adhesive material, for example, an acrylic adhesive or a silicone adhesive, the same effect as described above is obtained, and the elasticity of the elastically deformable material 5 is improved. Thereby, the semiconductor element 2 can be further fixed.

【0025】(実施の形態2)図2に示すように、レベ
リングプレート(上側)3および(下側)4との間に半
導体素子2を挟んで荷重を加えて半導体素子2上に形成
された複数の突起電極1の高さを均一化するに際して、
レベリングプレート(上側)3および(下側)4との間
を通過する連続したテープ6上に弾性変形する材料5、
例えば、ポリイミドシートを配設して、前記弾性変形す
る材料5の上に複数の半導体素子2を配列して、前記荷
重を加えて複数の突起電極1の高さのレベリングを実施
する度に半導体素子2を左から右へ移送して、次の半導
体素子2をレベリングプレート(上側)3および(下
側)4の間に位置させて突起電極1の高さをレベリング
することを繰り返す半導体素子の突起電極のレベリング
方法である。
(Embodiment 2) As shown in FIG. 2, a semiconductor element 2 is sandwiched between a leveling plate (upper side) 3 and a (lower side) 4 and a load is applied on the leveling plate 3 (lower side). In making the heights of the plurality of projecting electrodes 1 uniform,
An elastically deformable material 5 on a continuous tape 6 passing between the leveling plates 3 (upper) and 4 (lower);
For example, a polyimide sheet is disposed, a plurality of semiconductor elements 2 are arranged on the elastically deformable material 5, and the semiconductor is applied each time the load is applied to level the plurality of bump electrodes 1. The element 2 is transferred from left to right, and the next semiconductor element 2 is positioned between the leveling plates (upper side) 3 and (lower side) 4 to repeatedly level the height of the protruding electrode 1. This is a leveling method of the protruding electrode.

【0026】弾性変形する材料5として他には、ウレタ
ンゴム、シリコーンゴム等がある。以上のことにより、
実施の形態1と同様の効果を有するとともに、複数の半
導体素子の突起電極の高さのレベリングを効率よく実施
することができる。
Other examples of the elastically deformable material 5 include urethane rubber and silicone rubber. By the above,
The same effect as in the first embodiment can be obtained, and the leveling of the heights of the projecting electrodes of the plurality of semiconductor elements can be efficiently performed.

【0027】また、実施の形態2において、テープ6を
用いないでテープ状にした弾性変形する材料5を用いた
場合、前記と同様の効果を有する。また、実施の形態2
において、テープ6を用いないでテープ状にした弾性変
形する材料5を粘着性のある材料、例えばアクリル系粘
着材、シリコーン系粘着材とした場合、前記と同様の効
果を有し、弾性変形する材料の粘着性によって半導体素
子をより固定して移送することができる。
In the second embodiment, when the tape-shaped elastically deformable material 5 is used without using the tape 6, the same effect as described above is obtained. Embodiment 2
In the case where the tape-shaped elastically deformable material 5 without using the tape 6 is made of an adhesive material, for example, an acrylic adhesive or a silicone-based adhesive, the same effect as described above is exerted and the elastic deformation is performed. Due to the adhesiveness of the material, the semiconductor element can be more firmly transported.

【0028】(実施の形態3)図3に示すように、レベ
リングプレート(上側)3およびレベリングプレート
(下側)4との間に半導体素子2を挟んで荷重を加えて
半導体素子2上に形成された複数の突起電極1の高さを
均一化するに際し、複数の突起電極1の間に前記荷重に
より発生する重心2eからの垂線2cと突起電極1を形
成していない面2aとの交点の位置(以下、重心位置2
dと呼ぶ)またはその近接位置がレベリングプレート
(下側)4の半球状の突起部7上に当接するように載置
し、この状態で前記荷重を加えて突起電極1の高さをレ
ベリングする半導体素子の突起電極のレベリング方法で
ある。
(Embodiment 3) As shown in FIG. 3, a semiconductor element 2 is sandwiched between a leveling plate (upper side) 3 and a leveling plate (lower side) 4 to form a load on the semiconductor element 2. In making the heights of the plurality of protruding electrodes 1 uniform, the intersection of the perpendicular 2c from the center of gravity 2e generated by the load between the plurality of protruding electrodes 1 and the surface 2a on which the protruding electrodes 1 are not formed. Position (hereinafter, center of gravity position 2)
d) or a position close thereto is placed on the hemispherical projection 7 of the leveling plate (lower side) 4 so that the load is applied to level the height of the projection electrode 1 in this state. This is a leveling method of a bump electrode of a semiconductor element.

【0029】半導体素子2の重心位置2dは、(数1)
に従い、複数の突起電極1間に荷重により発生する重心
2e(それぞれの突起電極1の距離×力の総和が0とな
る点)を求めて、この重心2eを突起電極1が形成して
いない面2aに対向させた位置として求めることができ
る。図4に示すような半導体素子2の複数の突起電極1
が非対象に配置されている場合でも、同様に重心位置2
dを求めることができる。
The position 2d of the center of gravity of the semiconductor element 2 is given by (Equation 1)
, The center of gravity 2e generated by the load between the plurality of protruding electrodes 1 (the point at which the sum of the distances of the respective protruding electrodes 1 × the total force is 0) is obtained, and the center of gravity 2e is determined by the surface on which the protruding electrode 1 is not formed. 2a. A plurality of protruding electrodes 1 of a semiconductor element 2 as shown in FIG.
, The center of gravity 2
d can be determined.

【0030】[0030]

【数1】 ここに nは、突起電極1の総数 Lnは、複数の突起電極1の間に荷重により発生する重
心2eから各突起電極1までの距離 Fnは、各突起電極1にかかる力 半導体素子2の重心位置2dが半球状の突起部7上にな
るように位置決めする手段は、例えば、半導体素子2を
吸着ノズルで吸い上げた後、図5に示すように、位置決
め治具8aと位置決め治具8bとの間に半導体素子2を
挟み込み、吸着ノズルを外す。その状態で移動させて半
球状の突起部7上になるように位置決めするものがあ
る。前記位置決めする手段の位置決め精度は±50μm
程度であるので、半球状の突起部7上に半導体素子2の
重心位置2dを当接して載置したときと同様の効果を有
する許容範囲(約±100μm以内)を十分にカバーで
きるものである。
(Equation 1) Here, n is the total number of projecting electrodes 1 Ln is the distance from the center of gravity 2 e generated by a load between the plurality of projecting electrodes 1 to each projecting electrode 1 Fn is the force applied to each projecting electrode 1 The center of gravity of the semiconductor element 2 The means for positioning so that the position 2d is located on the hemispherical projection 7 is, for example, after the semiconductor element 2 is sucked up by a suction nozzle, and as shown in FIG. 5, the positioning jig 8a and the positioning jig 8b The semiconductor element 2 is interposed therebetween, and the suction nozzle is removed. In some cases, it is moved in that state and positioned so as to be on the hemispherical projection 7. The positioning accuracy of the positioning means is ± 50 μm
Therefore, it is possible to sufficiently cover an allowable range (within about ± 100 μm) having the same effect as the case where the center of gravity 2d of the semiconductor element 2 is placed on the hemispherical projection 7 in contact. .

【0031】半球状の突起部7の材質としては、例え
ば、超硬SUS、Ti合金等があり、半球状の突起部7
の高さは、例えば20μm以上100μm以下とした。
以上のことから、半導体素子2の重心位置2dまたはそ
の近接位置が半球状の突起部7上に当接するように載置
し、この状態で荷重を加えることにより、レベリングプ
レート(上側)3の傾きに併せて半導体素子2の突起電
極1を形成している面2bがより平行になり、複数の突
起電極1に均一の荷重を加えることができ、複数の突起
電極1の高さを高精度に均一化することができる。
The material of the hemispherical projection 7 includes, for example, carbide SUS and Ti alloy.
Has a height of, for example, 20 μm or more and 100 μm or less.
From the above, the semiconductor element 2 is placed so that the center of gravity position 2d or a position close to the center of the semiconductor element 2 abuts on the hemispherical projection 7, and a load is applied in this state, thereby tilting the leveling plate (upper side) 3. At the same time, the surface 2b of the semiconductor element 2 on which the protruding electrodes 1 are formed becomes more parallel, a uniform load can be applied to the plurality of protruding electrodes 1, and the height of the plurality of protruding electrodes 1 can be adjusted with high precision. It can be made uniform.

【0032】また、実施の形態3において、半球状の突
起部は半球状以外の形状でも、点または小さい面積で支
持することのできる突起部であれば同様の効果を有す
る。また、実施の形態3において、半導体素子2の形状
が、例えば正方形または長方形であって、図6(a)に
示すように、半導体素子2の突起電極1を形成している
面2bの各コーナー2fを結ぶ線の交点10a(突起電
極1を形成している面の中心)を求める。この交点10
aに対して点対称となる位置に各突起電極1が配置され
ている場合は、交点10aからの垂線11と突起電極1
を形成していない面2aとの交点9aまたはその近接位
置が突起部上に当接するように載置して荷重を加えるこ
とにより、同様の効果を有する。
In the third embodiment, the same effect can be obtained even if the hemispherical projection has a shape other than a hemisphere as long as the projection can be supported by a point or a small area. In the third embodiment, the shape of the semiconductor element 2 is, for example, a square or a rectangle, and as shown in FIG. 6A, each corner of the surface 2b of the semiconductor element 2 on which the bump electrode 1 is formed. An intersection 10a (the center of the surface on which the protruding electrode 1 is formed) of the line connecting 2f is determined. This intersection 10
When each of the protruding electrodes 1 is arranged at a position symmetrical with respect to the point a, a perpendicular 11 from the intersection 10a is
The same effect can be obtained by placing a load so that the intersection 9a with the surface 2a where no is formed or a position close to the intersection 9a abuts on the protrusion.

【0033】また、実施の形態3において、半導体素子
2の形状が、例えば長方形または正方形であって、図6
(b)に示すように、半導体素子2の突起電極1を形成
している面2bの各突起電極1を結ぶ線の交点10b
(複数の突起電極1で囲まれた面の中心)を求める。交
点10bに対して点対称となる位置に各突起電極1が配
置されていて、半導体素子2の突起電極1を形成してい
る面2bの各コーナー2fを結ぶ線の交点10aと交点
10bとが一致しない場合は、この交点10bからの垂
線11と突起電極1を形成していない面2aとの交点9
bまたはその近接位置が突起部上に当接するように載置
して荷重を加えることにより、同様の効果を有する。
In the third embodiment, the semiconductor element 2 has a rectangular or square shape, for example, as shown in FIG.
As shown in FIG. 2B, an intersection 10b of a line connecting the protruding electrodes 1 on the surface 2b of the semiconductor element 2 on which the protruding electrodes 1 are formed.
(The center of the surface surrounded by the plurality of protruding electrodes 1) is determined. Each protruding electrode 1 is arranged at a position symmetrical with respect to the intersection 10b, and the intersection 10a and the intersection 10b of a line connecting each corner 2f of the surface 2b of the semiconductor element 2 forming the protruding electrode 1 are formed. If they do not match, the intersection 9 between the perpendicular 11 from this intersection 10b and the surface 2a on which the protruding electrode 1 is not formed
The same effect can be obtained by placing a load so that the position b or a position close to the position b abuts on the protrusion and applying a load.

【0034】[0034]

【発明の効果】半導体素子の突起電極を形成していない
面と前記プレートのうち一方のプレートとの間に弾性変
形する材料を介装した状態で荷重を加えて突起電極の高
さをレベリングすることにより、半導体素子の突起電極
を形成している面と前記面に接するプレートとがより平
行になるように弾性変形する材料によって平行度のずれ
を吸収して、複数の半導体素子の突起電極のレベリング
高さを高精度に均一化することができる。
According to the present invention, a load is applied between the surface of the semiconductor element on which the protruding electrode is not formed and one of the plates with an elastically deformable material interposed therebetween to level the height of the protruding electrode. Thereby, the deviation of the parallelism is absorbed by the material which is elastically deformed so that the surface of the semiconductor element on which the protruding electrode is formed and the plate in contact with the surface become more parallel, and the plurality of protruding electrodes of the semiconductor element are absorbed. The leveling height can be made uniform with high precision.

【0035】また、半導体素子下に異物等が存在して半
導体素子が傾いている場合でも、弾性変形する材料によ
り異物等による半導体素子の傾きを低減して、半導体素
子の突起電極のレベリング高さを高精度に均一化するこ
とができる。
Further, even when a foreign substance or the like is present under the semiconductor element and the semiconductor element is tilted, the inclination of the semiconductor element due to the foreign substance or the like is reduced by the elastically deformable material, and the leveling height of the projecting electrode of the semiconductor element is reduced. Can be uniformed with high precision.

【0036】また、粘着性のある弾性変形する材料を、
連続したテープ上に設け、その上に半導体素子を粘着さ
せ、テープを移動させることにより、効率よく半導体素
子上の突起電極をレベリングすることができる。また、
下側のプレート上に設けた突起部が、前記の複数の突起
電極間に前記荷重により発生する重心からの垂線と突起
電極を形成していない面との交点またはその近接位置に
当接するように載置して、半導体素子を点で支持した状
態で2枚のプレート間に半導体素子を挟み込むことによ
り突起電極に均一に荷重を加え高精度にレベリングする
ことができる。
Further, a material which is sticky and elastically deforms is
Protruding electrodes on the semiconductor element can be efficiently leveled by providing the semiconductor element on a continuous tape, adhering the semiconductor element thereon, and moving the tape. Also,
The projecting portion provided on the lower plate is brought into contact with the intersection of the perpendicular line from the center of gravity generated by the load between the plurality of projecting electrodes and the surface where the projecting electrodes are not formed or at a position close to the intersection. By mounting the semiconductor element between the two plates in a state where the semiconductor element is placed and supported at points, a uniform load can be applied to the protruding electrodes and leveling can be performed with high precision.

【0037】また、前記半導体素子の突起電極を形成し
ている面の中心または複数の突起電極で囲まれた面の中
心を求め、下側のプレート上に設けた突起部が前記中心
からの垂線と突起電極を形成していない面との交点また
はその近接位置に当接するように載置して、半導体素子
を点で支持した状態で2枚のプレート間に半導体素子を
挟み込むことにより突起電極に均一に荷重を加え高精度
にレベリングすることができる。
Further, the center of the surface of the semiconductor element on which the protruding electrodes are formed or the center of the surface surrounded by the plurality of protruding electrodes is determined, and the protruding portion provided on the lower plate is perpendicular to the center. And the surface where the protruding electrode is not formed is placed so as to be in contact with the intersection or at a position close to the intersection, and the semiconductor element is sandwiched between two plates while the semiconductor element is supported at a point, so that the Uniform load can be applied and leveling can be performed with high accuracy.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施の形態1の半導体素子の突起電極
のレベリング状態の側面図
FIG. 1 is a side view of a semiconductor element according to a first embodiment of the present invention in a leveling state of a bump electrode;

【図2】本発明の実施の形態2の半導体素子の突起電極
のレベリング状態の側面図
FIG. 2 is a side view of a semiconductor device according to a second embodiment of the present invention in a leveling state of a bump electrode;

【図3】本発明の実施の形態3の半導体素子の突起電極
のレベリング状態の側面図
FIG. 3 is a side view of a semiconductor device according to a third embodiment of the present invention in a state where a protruding electrode is leveled;

【図4】同実施の形態3の重心位置を求めるための説明
FIG. 4 is an explanatory diagram for obtaining a position of a center of gravity according to the third embodiment;

【図5】同実施の形態3における半導体素子の位置決め
手段の例を示す図
FIG. 5 is a view showing an example of a semiconductor element positioning means according to the third embodiment;

【図6】同実施の形態3における中心位置の例を示す図FIG. 6 is a diagram showing an example of a center position according to the third embodiment;

【図7】従来においての半導体素子の突起電極のレベリ
ング状態の側面図
FIG. 7 is a side view showing a leveling state of a protruding electrode of a conventional semiconductor element.

【符号の説明】[Explanation of symbols]

1 突起電極 2 半導体素子 2a 半導体素子の突起電極を形成していない面 2b 半導体素子の突起電極を形成している面 2c 垂線 2d 重心位置 2e 複数の突起電極の間に荷重により発生する
重心 2f 半導体素子のコーナー部 3 レベリングプレート(上側) 4 レベリングプレート(下側) 5 弾性変形する材料 6 テープ 7 球状の突起部 8a 位置決め治具 8b 位置決め治具 9a、9b 突起電極を形成していない面の交点 10a 突起電極を形成している面の中心 10b 突起電極で囲まれた面の中心 11 垂線
DESCRIPTION OF SYMBOLS 1 Projection electrode 2 Semiconductor element 2a Surface of semiconductor element on which projection electrode is not formed 2b Surface of projection of semiconductor element on which projection electrode is formed 2c Perpendicular line 2d Center of gravity position 2e Center of gravity generated by load between plural projection electrodes 2f Semiconductor Element corner 3 Leveling plate (upper side) 4 Leveling plate (lower side) 5 Material that elastically deforms 6 Tape 7 Spherical projection 8a Positioning jig 8b Positioning jig 9a, 9b Intersection of surfaces on which no projection electrode is formed 10a Center of the surface forming the protruding electrode 10b Center of the surface surrounded by the protruding electrode 11 Perpendicular

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 2枚のプレート間に半導体素子を挟んで
荷重を加えて前記半導体素子上に形成された複数の突起
電極の高さを均一化するに際し、 前記半導体素子の突起電極を形成していない面と前記プ
レートのうち一方のプレート間に弾性変形する材料を介
装し、 この状態で前記荷重を加えて突起電極の高さをレベリン
グする半導体素子の突起電極のレベリング方法。
When a load is applied across a semiconductor element between two plates to equalize the height of a plurality of projecting electrodes formed on the semiconductor element, the projecting electrodes of the semiconductor element are formed. A method of leveling a protruding electrode of a semiconductor element, wherein a material that elastically deforms is interposed between a surface that is not covered and one of the plates, and the height of the protruding electrode is leveled by applying the load in this state.
【請求項2】 2枚のプレート間に半導体素子を挟んで
荷重を加えて前記半導体素子上に形成された複数の突起
電極の高さを均一化するに際し、 前記プレート間を通過するテープ状の弾性変形する材料
の上に、複数の半導体素子を配列し、 前記荷重を加えて突起電極の高さのレベリングを実施す
る度に前記半導体素子を移送して、次の半導体素子を前
記プレートの間に位置させて突起電極の高さをレベリン
グすることを繰り返す半導体素子の突起電極のレベリン
グ方法。
2. A tape-like member that passes between the plates when a load is applied across a semiconductor element between two plates to equalize the heights of a plurality of protruding electrodes formed on the semiconductor element. A plurality of semiconductor elements are arranged on a material that is elastically deformed, and each time the load is applied to level the height of the protruding electrode, the semiconductor element is transferred, and the next semiconductor element is placed between the plates. And a method for leveling the protruding electrode of the semiconductor device, which repeats leveling the height of the protruding electrode by positioning the protruding electrode.
【請求項3】 弾性変形する材料を粘着性のある材料と
した請求項1または請求項2に記載の半導体素子の突起
電極のレベリング方法。
3. The method according to claim 1, wherein the elastically deformable material is a sticky material.
【請求項4】 2枚のプレート間に半導体素子を挟んで
荷重を加えて前記半導体素子上に形成された複数の突起
電極の高さを均一化するに際し、 下側のプレート上に設けた突起部が、前記複数の突起電
極間に前記荷重により発生する重心からの垂線と前記半
導体素子の突起電極を形成していない面との交点または
その近接位置に当接するように載置し、 この状態で前記荷重を加えて突起電極の高さをレベリン
グする半導体素子の突起電極のレベリング方法。
4. A projection provided on a lower plate when a height is applied to a plurality of projection electrodes formed on the semiconductor element by applying a load with a semiconductor element sandwiched between two plates. The semiconductor element is placed between the plurality of protruding electrodes so as to abut on an intersection of a perpendicular line from a center of gravity generated by the load and a surface of the semiconductor element on which the protruding electrodes are not formed or a position close to the intersection. A leveling method for projecting electrodes of a semiconductor device, wherein the height of the projecting electrodes is leveled by applying the load.
【請求項5】 2枚のプレート間に半導体素子を挟んで
荷重を加えて前記半導体素子上に形成された複数の突起
電極の高さを均一化するに際し、 前記半導体素子の突起電極を形成している面の中心また
は複数の突起電極で囲まれた面の中心を求め、 下側のプレート上に設けた突起部が前記中心からの垂線
と前記半導体素子の突起電極を形成していない面との交
点またはその近接位置に当接するように載置し、 この状態で前記荷重を加えて突起電極の高さをレベリン
グする半導体素子の突起電極のレベリング方法。
5. A step of applying a load with a semiconductor element sandwiched between two plates to equalize the height of a plurality of projecting electrodes formed on the semiconductor element, forming the projecting electrodes of the semiconductor element. The center of the surface or the center of the surface surrounded by the plurality of protruding electrodes is obtained, and the protruding portion provided on the lower plate is perpendicular to the center and the surface on which the protruding electrode of the semiconductor element is not formed. A method of leveling a protruding electrode of a semiconductor device, wherein the semiconductor device is placed so as to be in contact with an intersection or a position close to the intersection, and the height of the protruding electrode is leveled by applying the load in this state.
JP21791397A 1997-08-13 1997-08-13 Method for leveling protruding electrodes of semiconductor element Expired - Fee Related JP3690903B2 (en)

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JP21791397A JP3690903B2 (en) 1997-08-13 1997-08-13 Method for leveling protruding electrodes of semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21791397A JP3690903B2 (en) 1997-08-13 1997-08-13 Method for leveling protruding electrodes of semiconductor element

Publications (2)

Publication Number Publication Date
JPH1167772A true JPH1167772A (en) 1999-03-09
JP3690903B2 JP3690903B2 (en) 2005-08-31

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Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116367437A (en) * 2023-04-24 2023-06-30 苏州光斯奥光电科技有限公司 PCB leveling device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116367437A (en) * 2023-04-24 2023-06-30 苏州光斯奥光电科技有限公司 PCB leveling device
CN116367437B (en) * 2023-04-24 2023-12-05 苏州光斯奥光电科技有限公司 PCB leveling device

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