JPH1167662A - Manufacture of semiconductor - Google Patents

Manufacture of semiconductor

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Publication number
JPH1167662A
JPH1167662A JP21727197A JP21727197A JPH1167662A JP H1167662 A JPH1167662 A JP H1167662A JP 21727197 A JP21727197 A JP 21727197A JP 21727197 A JP21727197 A JP 21727197A JP H1167662 A JPH1167662 A JP H1167662A
Authority
JP
Japan
Prior art keywords
thin film
silicon thin
heat treatment
temperature
polycrystalline silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21727197A
Other languages
Japanese (ja)
Inventor
Akito Hara
明人 原
Kuninori Kitahara
邦紀 北原
Satoshi Murakami
聡 村上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP21727197A priority Critical patent/JPH1167662A/en
Publication of JPH1167662A publication Critical patent/JPH1167662A/en
Pending legal-status Critical Current

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  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PROBLEM TO BE SOLVED: To form a polycrystal silicon thin film with a high carrier mobility even when using as its substrate a quartz one with a low purity, by projecting an energy beam on an amorphous silicon thin film to crystallise it, and by applying thereafter to the intermediate thereof a short-time heat treatment at a medium temperature. SOLUTION: By a CVD method, an amorphous silicon thin film is formed on a quartz substrate. Then, while when an energy beam is projected on this amorphous silicon thin film to crystallise it, it can be changed into a polycrystal silicon thin film of a good quality at a low temperature, the polycrystal silicon thin film contain a large amount of crystal defects in its crystal grain. In order to eliminate these crystal defects, a short-time heat treatment is applied to it at a medium temperature. Hereupon, the medium temperature means, e.g. a temperature within the scope of 850-950 deg.C, and the short time means, e. g. a time within the scope not shorter than five minutes and not longer than fifteen minutes. When performing its short-time heat treatment at the medium temperature in this way, reducing the pollutions of impurities mixed into it from the substrate, thus, a cheap quartz substrate can be used.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、通常の多結晶シリ
コンに比較して高いキャリヤ移動度を示す多結晶シリコ
ン薄膜を絶縁層上に形成するのに好適な半導体の製造方
法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor suitable for forming a polycrystalline silicon thin film having a higher carrier mobility than an ordinary polycrystalline silicon on an insulating layer.

【0002】一般に、絶縁層上に形成された多結晶シリ
コン薄膜は、半導体デバイス、LCD(liquid
crystal display)、太陽電池など多く
の分野で利用されているが、通常の手段で形成した場
合、キャリヤ移動度が高くならないので、これを改善す
る必要があり、本発明は、これに応える一手段を開示す
る。
[0002] In general, a polycrystalline silicon thin film formed on an insulating layer is used for a semiconductor device, an LCD (liquid).
Although it is used in many fields such as crystal display and solar cells, it is necessary to improve the carrier mobility if formed by ordinary means, and it is necessary to improve the carrier mobility. Is disclosed.

【0003】[0003]

【従来の技術】通常、高キャリヤ移動度をもつ高性能の
多結晶シリコン薄膜は、基板材料に石英を用い、その基
板上に成長させたアモルファス・シリコン薄膜に例えば
600〔℃〕程度の温度で20〔時間〕〜30〔時間〕
程度の熱処理を加えて多結晶化することで作成されてい
る。
2. Description of the Related Art In general, a high-performance polycrystalline silicon thin film having high carrier mobility uses quartz as a substrate material and forms an amorphous silicon thin film grown on the substrate at a temperature of, for example, about 600 ° C. 20 [hours]-30 [hours]
It is made by performing a degree of heat treatment and polycrystallizing.

【0004】このようにして得られた多結晶シリコン薄
膜を用いて例えばTFT(thinfilm tran
sistor)を作り込むには、1000〔℃〕以上の
高温のプロセスを経ることになる。
[0004] Using the polycrystalline silicon thin film thus obtained, for example, a TFT (thinfilm tran)
In order to create a cistor, a high-temperature process of 1000 ° C. or more is required.

【0005】このような高温に曝す工程を経る理由は、
結晶に於けるキャリヤ移動度が高くなること、また、再
現性或いは製造歩留りなどの面でプロセスが安定になる
ことなどに依る。
[0005] The reason of going through the process of exposing to such a high temperature is as follows.
This is due to the fact that the carrier mobility in the crystal is increased, and that the process is stable in terms of reproducibility, manufacturing yield, and the like.

【0006】現在、TFTを必要とするのは、勿論、L
CDの分野であって、この場合、前記したような高い温
度で多結晶シリコン薄膜の熱処理を行なうには、透明基
板からの不純物の流入を抑止する為、高純度の石英基板
が必要なのであるが、そのような石英基板は、大型化が
困難であると共に非常に高価である。
At present, the need for a TFT is, of course,
In the field of CDs, in this case, in order to perform the heat treatment of the polycrystalline silicon thin film at the high temperature as described above, a high-purity quartz substrate is necessary in order to suppress the inflow of impurities from the transparent substrate. Such a quartz substrate is difficult to enlarge and very expensive.

【0007】[0007]

【発明が解決しようとする課題】本発明では、不純物が
多くて純度が低い、従って、安価である石英基板を用い
ながらも、高キャリヤ移動度の多結晶シリコン薄膜を形
成できるようにして、TFTなどの半導体装置を高性能
化しようとする。
SUMMARY OF THE INVENTION In the present invention, a thin film of polycrystalline silicon having a high carrier mobility can be formed while using an inexpensive quartz substrate containing many impurities and low purity. And other semiconductor devices.

【0008】[0008]

【課題を解決するための手段】本発明に於いては、アモ
ルファス・シリコン薄膜にエネルギ・ビームを照射して
結晶化してから、半導体装置の製造プロセス中に受ける
熱処理温度に比較して低い温度、即ち、中温度で短時間
の熱処理を行なうことで粒界内欠陥を消滅させることが
基本になっている。
According to the present invention, an amorphous silicon thin film is irradiated with an energy beam to be crystallized, and then has a lower temperature than a heat treatment temperature received during a semiconductor device manufacturing process. That is, it is fundamental to eliminate the intragranular defects by performing a heat treatment at a medium temperature for a short time.

【0009】一般に、アモルファス・シリコン薄膜をエ
ネルギ・ビーム照射して結晶化した場合、低温で良質の
多結晶にすることが可能なのであるが、結晶粒内には結
晶欠陥が多量に含有されている。
In general, when an amorphous silicon thin film is crystallized by irradiating it with an energy beam, high-quality polycrystal can be obtained at a low temperature. However, crystal defects contain a large amount of crystal defects. .

【0010】この結晶欠陥を消滅させる為、中温度で短
時間の熱処理を加える。ここで、中温度とは、例えば、
850〔℃〕〜950〔℃〕の温度であって、また、短
時間とは、例えば、5〔分〕以上15〔分〕以下の範囲
である。
In order to eliminate the crystal defects, a short-time heat treatment is applied at an intermediate temperature. Here, the medium temperature is, for example,
The temperature is 850 ° C. to 950 ° C., and the short time is, for example, a range from 5 minutes to 15 minutes.

【0011】このように、中温度で短時間の熱処理を行
なった場合、基板からの不純物汚染は少なく、従って、
安価な石英を用いることができ、コストを低減すること
ができる。
As described above, when the heat treatment is performed at a medium temperature for a short time, impurity contamination from the substrate is small.
Inexpensive quartz can be used, and the cost can be reduced.

【0012】ここで、中温度の熱処理を半導体装置の製
造工程前に実行する理由は、多結晶シリコン薄膜の表面
に他の被膜が堆積することを回避する為である。
The reason why the intermediate temperature heat treatment is performed before the semiconductor device manufacturing process is to avoid depositing another film on the surface of the polycrystalline silicon thin film.

【0013】多結晶シリコン薄膜上に他の被膜が堆積し
た場合、その被膜の成分が多結晶シリコン薄膜に侵入
し、成分が不純物として多結晶シリコン薄膜中の結晶欠
陥にゲッタリングされるので、結晶欠陥は消滅し難くな
る。また、多結晶シリコン薄膜上に他の被膜が堆積した
場合、多結晶シリコンの結晶粒の再結晶が堆積被膜に依
って阻害され、大きな結晶粒に変化し難くなる。これ等
の理由から、中温度熱処理は、半導体装置の製造工程前
に実施することが必要である。
When another film is deposited on the polycrystalline silicon thin film, the components of the film penetrate into the polycrystalline silicon thin film, and the components are gettered as impurities by crystal defects in the polycrystalline silicon thin film. Defects are less likely to disappear. Further, when another film is deposited on the polycrystalline silicon thin film, recrystallization of the crystal grains of the polycrystalline silicon is hindered by the deposited film, and it is difficult to change to large crystal grains. For these reasons, it is necessary to perform the intermediate temperature heat treatment before the semiconductor device manufacturing process.

【0014】前記したところから、本発明に依る半導体
の製造方法に於いては、(1)透明絶縁基板上にシリコ
ン薄膜を形成してからエネルギ・ビーム照射して多結晶
シリコン薄膜とする工程と、該多結晶シリコン薄膜を用
いて半導体装置を作成する前の段階で温度を850
〔℃〕乃至950〔℃〕の範囲とし、且つ、時間を5
〔分〕以上15〔分〕以下の範囲として熱処理する工程
とが含まれてなることを特徴とするか、又は、
As described above, in the method of manufacturing a semiconductor according to the present invention, there are provided (1) a step of forming a silicon thin film on a transparent insulating substrate and then irradiating it with an energy beam to form a polycrystalline silicon thin film; The temperature is set to 850 before a semiconductor device is manufactured using the polycrystalline silicon thin film.
[° C] to 950 [° C], and the time is 5
Or a step of performing a heat treatment as a range of not less than [minutes] and not more than 15 [minutes], or

【0015】(2)前記(1)に於いて、エネルギ・ビ
ームがレーザ・ビームであることを特徴とするか、又
は、
(2) In the above (1), the energy beam is a laser beam, or

【0016】(3)前記(1)或いは(2)に於いて、
シリコン薄膜の膜厚が30〔nm〕乃至100〔nm〕
であることを特徴とする。
(3) In the above (1) or (2),
The thickness of the silicon thin film is 30 [nm] to 100 [nm]
It is characterized by being.

【0017】前記手段を採ることに依り、不純物が多い
安価な石英基板を用いて、その上にキャリヤ移動度が高
い多結晶シリコン薄膜を形成することが可能になり、そ
れを利用することで、高性能のTFTを用いたLCD装
置を低コストで製造することができ、しかも、そのキャ
リヤ移動度が高い多結晶シリコン薄膜を得る為の熱処理
温度が低いので、石英基板として大型のものを用いるこ
とが可能であり、従って、直視型のLCD装置に応用す
ることができる。
By adopting the above-mentioned means, it becomes possible to form a polycrystalline silicon thin film having a high carrier mobility on an inexpensive quartz substrate containing a large amount of impurities. LCD devices using high-performance TFTs can be manufactured at low cost, and the heat treatment temperature for obtaining polycrystalline silicon thin films with high carrier mobility is low, so use large quartz substrates. Therefore, the present invention can be applied to a direct-view LCD device.

【0018】[0018]

【発明の実施の形態】例えばCVD(chemical
vapor deposition)法を適用するこ
とに依り、石英基板上に厚さ例えば50〔nm〕のアモ
ルファス・シリコン薄膜を形成し、このアモルファス・
シリコン薄膜にレーザ・ビームを照射して多結晶シリコ
ン薄膜とし、この多結晶シリコン薄膜に中温度の熱処理
を加えた。尚、アモルファス・シリコン薄膜の厚さとし
ては、30〔nm〕乃至100〔nm〕の範囲で選択す
ることができ、この範囲外、即ち、30〔nm〕未満で
ある場合、ソース並びにドレインのコンタクト抵抗が大
となり、現在、この種の半導体装置の実用面で採用され
ている規格範囲から外れる状態となり、そして、100
〔nm〕を越えた場合、リーク電流が大となり、前記同
様、規格範囲から外れる状態となって不良品扱いにな
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS For example, CVD (chemical
By applying a vapor deposition method, an amorphous silicon thin film having a thickness of, for example, 50 nm is formed on a quartz substrate.
The silicon thin film was irradiated with a laser beam to form a polycrystalline silicon thin film, and this polycrystalline silicon thin film was subjected to a heat treatment at a medium temperature. The thickness of the amorphous silicon thin film can be selected in the range of 30 [nm] to 100 [nm]. When the thickness is out of this range, that is, less than 30 [nm], the contact of the source and the drain is reduced. The resistance becomes large, the state is out of the standard range currently used in practical use of this kind of semiconductor device, and
If it exceeds [nm], the leak current becomes large and the state is out of the standard range as described above, and the product is treated as a defective product.

【0019】図1は温度を変化させて熱処理を加えた多
結晶シリコン薄膜に関するラマン散乱の観測結果を表す
線図であって、横軸には熱処理温度を、左縦軸には半半
値幅を、右縦軸にはピーク位置をそれぞれ採ってある。
尚、熱処理時間は各温度において5〔分〕間にした。
FIG. 1 is a diagram showing Raman scattering observation results for a polycrystalline silicon thin film subjected to a heat treatment while changing the temperature. The horizontal axis represents the heat treatment temperature, the left vertical axis represents the half width at half maximum, The right vertical axis shows the peak position.
The heat treatment time was set at 5 minutes at each temperature.

【0020】図からすると、熱処理温度が850〔℃〕
以上になると結晶化が良好になり、ピーク位置は520
〔cm-1〕に近づいているので、レーザ照射で結晶化し
た多結晶シリコン薄膜は、850〔℃〕を越える温度で
熱処理すると高品質結晶に変化させることができる。
As shown in the figure, the heat treatment temperature is 850 ° C.
Above this, crystallization becomes good and the peak position is 520
Since the temperature is approaching [cm -1 ], the polycrystalline silicon thin film crystallized by laser irradiation can be changed to a high quality crystal by heat treatment at a temperature exceeding 850 [° C.].

【0021】前記傾向は950〔℃〕付近まで維持さ
れ、また、950〔℃〕で熱処理した場合には、半半値
幅が小さくなっていることが看取される。
It can be seen that the above tendency is maintained up to around 950 ° C., and that the half-width is reduced when the heat treatment is performed at 950 ° C.

【0022】また、1000〔℃〕以上の温度で熱処理
した場合、結晶の品質は更に向上することが明らかであ
るが、この温度領域は、高温熱処理の多結晶シリコン薄
膜が生成される領域になってしまい、高純度の石英基板
が必要であって、コストは高くなってしまう。
It is apparent that the quality of the crystal is further improved when the heat treatment is performed at a temperature of 1000 ° C. or more, but this temperature region is a region where a polycrystalline silicon thin film is formed by the high-temperature heat treatment. As a result, a high-purity quartz substrate is required, and the cost increases.

【0023】図2は時間を変化させて熱処理を加えた多
結晶シリコン薄膜に関するラマン散乱の観測結果を表す
線図であって、横軸には熱処理時間を、左縦軸には半半
値幅を、右縦軸にはピーク位置をそれぞれ採ってある。
尚、熱処理温度は各時間において950〔℃〕固定であ
る。
FIG. 2 is a diagram showing Raman scattering observation results for a polycrystalline silicon thin film subjected to heat treatment with changing time, wherein the horizontal axis represents the heat treatment time, the left vertical axis represents the half-width at half maximum, The right vertical axis shows the peak position.
The heat treatment temperature is fixed at 950 ° C. for each time.

【0024】図からすると、15〔分〕間の熱処理を行
なうことに依って、半半値幅は小さくなり、ピーク位置
は単結晶のピーク位置に近づいてゆくことが明瞭に看取
される。
From the figure, it can be clearly seen that the half-width at half-maximum is reduced and the peak position approaches the peak position of the single crystal by performing the heat treatment for 15 [minutes].

【0025】このように、初期膜としてレーザ結晶化し
た多結晶シリコン薄膜を用いた場合には、中温度領域の
短時間熱処理に依って容易に高品質化することができ
る。
As described above, when the polycrystalline silicon thin film crystallized by laser is used as the initial film, the quality can be easily improved by the short-time heat treatment in the medium temperature region.

【0026】図3はレーザ結晶化した多結晶シリコン薄
膜に中温度領域の短時間熱処理を加えて得られる電気的
特性を表す線図であり、横軸には熱処理温度を、縦軸に
はキャリヤ移動度をそれぞれ採ってある。
FIG. 3 is a diagram showing electrical characteristics obtained by subjecting a laser-crystallized polycrystalline silicon thin film to a short-time heat treatment in an intermediate temperature region. The horizontal axis represents the heat treatment temperature, and the vertical axis represents the carrier. Each mobility is taken.

【0027】このデータは、温度を変化させて熱処理を
加えた多結晶シリコン薄膜についてホール(HALL)
効果を利用してキャリヤ移動度を測定した結果であり、
熱処理時間は各温度において15〔分〕間とした。
This data shows that a polycrystalline silicon thin film subjected to a heat treatment at a changed temperature has a hole (HALL).
It is the result of measuring the carrier mobility using the effect,
The heat treatment time was 15 minutes at each temperature.

【0028】図から明らかなように、温度950
〔℃〕、時間15〔分〕の熱処理で、80〔cm2 /V
S〕の極めて高い移動度が得られている。
As is apparent from FIG.
[° C.], heat treatment for 15 minutes, 80 [cm 2 / V]
S].

【0029】本発明に於いては、前記実施の形態に限ら
れことなく、他に多くの改変を実現することができ、例
えば、半導体分野で用いられている通常のサファイア基
板には、前記した石英基板と同様な問題が存在するの
で、本発明をサファイア基板に適用した場合にも、同様
な効果を得ることができる。
In the present invention, the present invention is not limited to the above embodiment, and many other modifications can be realized. For example, a general sapphire substrate used in the semiconductor field has the above-described structure. Since a problem similar to that of the quartz substrate exists, a similar effect can be obtained even when the present invention is applied to a sapphire substrate.

【0030】[0030]

【発明の効果】本発明の半導体の製造方法に於いては、
透明絶縁基板上にシリコン薄膜を形成してからエネルギ
・ビーム照射して多結晶シリコン薄膜とし、その多結晶
シリコン薄膜を用いて半導体装置を作成する前の段階で
温度を850〔℃〕乃至950〔℃〕の範囲とし、且
つ、時間を5〔分〕以上15〔分〕以下の範囲として熱
処理する。
According to the method of manufacturing a semiconductor of the present invention,
A silicon thin film is formed on a transparent insulating substrate and then irradiated with an energy beam to form a polycrystalline silicon thin film. At a stage before a semiconductor device is formed using the polycrystalline silicon thin film, the temperature is 850 ° C. to 950 ° ° C] and the time is in the range of 5 minutes to 15 minutes.

【0031】前記構成を採ることに依り、不純物が多い
安価な石英基板を用いて、その上にキャリヤ移動度が高
い多結晶シリコン薄膜を形成することが可能になり、そ
れを利用することで、高性能のTFTを用いたLCD装
置を低コストで製造することができ、しかも、そのキャ
リヤ移動度が高い多結晶シリコン薄膜を得る為の熱処理
温度が低いので、石英基板として大型のものを用いるこ
とが可能であり、従って、直視型のLCD装置に応用す
ることができる。
By adopting the above configuration, it becomes possible to form a polycrystalline silicon thin film having a high carrier mobility on an inexpensive quartz substrate containing a large amount of impurities by using the quartz substrate. LCD devices using high-performance TFTs can be manufactured at low cost, and the heat treatment temperature for obtaining polycrystalline silicon thin films with high carrier mobility is low, so use large quartz substrates. Therefore, the present invention can be applied to a direct-view LCD device.

【図面の簡単な説明】[Brief description of the drawings]

【図1】温度を変化させて熱処理を加えた多結晶シリコ
ン薄膜に関するラマン散乱の観測結果を表す線図であ
る。
FIG. 1 is a diagram showing Raman scattering observation results of a polycrystalline silicon thin film subjected to a heat treatment while changing a temperature.

【図2】時間を変化させて熱処理を加えた多結晶シリコ
ン薄膜に関するラマン散乱の観測結果を表す線図であ
る。
FIG. 2 is a diagram showing Raman scattering observation results of a polycrystalline silicon thin film subjected to a heat treatment with changing time.

【図3】レーザ結晶化した多結晶シリコン薄膜に中温度
領域の短時間熱処理を加えて得られる電気的特性を表す
線図である。
FIG. 3 is a diagram showing electrical characteristics obtained by subjecting a laser-crystallized polycrystalline silicon thin film to a short-time heat treatment in an intermediate temperature region.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】透明絶縁基板上にシリコン薄膜を形成して
からエネルギ・ビーム照射して多結晶シリコン薄膜とす
る工程と、 該多結晶シリコン薄膜を用いて半導体装置を作成する前
の段階で温度を850〔℃〕乃至950〔℃〕の範囲と
し、且つ、時間を5〔分〕以上15〔分〕以下の範囲と
して熱処理する工程とが含まれてなることを特徴とする
半導体の製造方法。
A step of forming a silicon thin film on a transparent insulating substrate and then irradiating an energy beam to form a polycrystalline silicon thin film; and a step of forming a semiconductor device using the polycrystalline silicon thin film in a temperature step. A temperature in the range of 850 ° C. to 950 ° C. and a time in the range of 5 minutes to 15 minutes, and performing a heat treatment.
【請求項2】エネルギ・ビームがレーザ・ビームである
ことを特徴とする請求項1記載の半導体の製造方法。
2. The method according to claim 1, wherein the energy beam is a laser beam.
【請求項3】シリコン薄膜の膜厚が30〔nm〕乃至1
00〔nm〕であることを特徴とする請求項1或いは2
記載の半導体の製造方法。
3. The silicon thin film has a thickness of 30 nm to 1 nm.
3. The method according to claim 1, wherein the value is 00 [nm].
The manufacturing method of the semiconductor of the description.
JP21727197A 1997-08-12 1997-08-12 Manufacture of semiconductor Pending JPH1167662A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21727197A JPH1167662A (en) 1997-08-12 1997-08-12 Manufacture of semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21727197A JPH1167662A (en) 1997-08-12 1997-08-12 Manufacture of semiconductor

Publications (1)

Publication Number Publication Date
JPH1167662A true JPH1167662A (en) 1999-03-09

Family

ID=16701533

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21727197A Pending JPH1167662A (en) 1997-08-12 1997-08-12 Manufacture of semiconductor

Country Status (1)

Country Link
JP (1) JPH1167662A (en)

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