JPH1158219A - Semiconductor manufacturing device, manufacture of semiconductor device, and flat abrasive cloth - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the ununiformity of the polishing amounts in a semiconductor wafer surface, in particular, on the center part and the end, from being generated, concerning a chemical and mechanical polishing (CMP) of a semiconductor device. SOLUTION: A semiconductor wafer 102 to be polished by being brought in contact with a flat abrasive cloth 101 is polished by a part surrounded by outer peripheral track lines 103, 104 by the rotation of the flat abrasive cloth. A groove 106 is formed in the same position as a track center line 105. In the prior art, since force by which the center part of the semiconductor wafer is partially pressed is increased in comparison with the end, and input abrasive materials (slurry) are not sufficiently spread to the center part. However, since the groove 106 is formed on the abrasive cloth 101, a structure capable of easily supplying slurry in relation to the semiconductor wafer center part is formed, and a base body to be polished, having a little difference of the polishing amounts on the end and the center part of a flat plate base body can be provided.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing apparatus, a method of manufacturing a semiconductor device, and a flat polishing cloth.

[0002]

2. Description of the Related Art As the degree of integration of semiconductor devices increases, the difference in step thickness increases due to an increase in the number of wiring layers. On the other hand, as the wavelength of the exposure line becomes shorter, the focus margin in the photo process is reduced. These two suggest the processing limit of the semiconductor device by the existing process. As the step is increased, the focus position is at the lowest part and a high portion becomes necessarily out of focus at either to differences in photo fine line across and below the level difference thus occurred disappears SenHoso rear lines. In other words, in the past, a step was only required if the layer immediately above it, for example, the wiring layer did not cause disconnection, became an important problem related to the survival of the existing semiconductor process. is there. The chemical mechanical polishing (CMP) technology has emerged to mitigate this fatal step. This technology is a dawning technology in the United States and is expected to be effective in Japan in recent years. The main components of an apparatus using this technique are a polishing pad (a flat polishing cloth) for polishing, a platen for supporting and rotating the polishing pad, and a holder for supporting the wafer and supporting the wafer. Although there is a CMP apparatus having a different configuration from the above, the purpose thereof coincides with the so-called flattening such as reduction of a global step in a wafer surface or mirror finishing of a material to be polished.

[0003] The technique relating to this polishing is old, starting from the cutting of the metal surface, which has been widely performed since the era of machining, and has also been used for mirror finishing of the surface of silicon wafers near the semiconductor field. The role of the CMP process in the semiconductor pre-process in recent years has been greatly increased in demand, and the application to this process has been put to practical use from accumulation and application of these conventional technologies.

Various phenomena have been found in the course of our intensive research on the CMP process.

In the case where a normal polishing method is used, a semiconductor wafer is fixed to a carrier and brought into contact with a polishing cloth facing the semiconductor wafer while rotating in a plane direction, and a polishing agent (slurry) is supplied to perform polishing. . At this time, for example, the polishing cloth is also rotated at the same rotation speed in order to keep the rotation angular velocity constant at all points in the plane of the semiconductor wafer. In this case, when the polishing amount is compared between the edge portion and the center portion of the semiconductor wafer, the edge portion is more scraped off, reflecting the distribution of the pressing pressure (hereinafter, BSP). By increasing the BSP, the polishing amount at the center part is slightly recovered, but a means to improve the overall uniformity can be obtained even by using a method such as inserting a fine adjustment jig into the edge of the back surface of the semiconductor wafer. Did not.

A conventional example in which the amount of polishing at the end is to be adjusted is disclosed in Japanese Patent Application Laid-Open No. 2-94032. This is intended to eliminate the difference in the amount of polishing from the center by polishing and adjusting the edge of the semiconductor wafer held by the carrier by forming a recess in the edge of the planar polishing cloth. However, in practice, the concentration of stress occurs at the step portion of the polishing cloth, and as a result, the uniformity of the polishing amount of the semiconductor wafer does not improve much. Also, in this method, it is necessary to always use a polishing cloth of the same shape, and it is a reality that a polishing cloth that requires frequent replacement due to wear is provided with a step so that it is at the same position from the rotation center of the polishing cloth. Is not a typical way. Japanese Patent Application Laid-Open No. 8-108372 suggests an effective method for reducing the level difference in the case where the semiconductor wafer has a two-dimensional pattern, but the center in the plane of the semiconductor wafer is suggested. No study has been made on the difference in the amount of polishing between the part and the end. Although the shape of the groove carved in the polishing cloth has a slight effect on the reduction of the step as an idea, it does not take into account the difficult point of the bonding process such as forming it inside a polishing cloth having a two-layer structure.

[0007] These ideas are not the result of considering in-plane uniformity of the semiconductor wafer. When polishing is actually performed using a slurry, it is found that the local step in the chip can be improved, but it is very difficult to stabilize the amount of polishing between the center and the end of the wafer.

[0008] There is also an attempt to create a complicated shape on a polishing cloth in a form conforming to a pattern. JP-A-8-1
No. 1049. An attempt is made to make the polishing amount of the workpiece uniform by supplying the slurry uniformly, but this has not been focused on in-plane uniformity as in other conventional examples. In addition, since a tool having a drive shaft is used, it cannot be said that the state of the surface of the polishing cloth is homogenized by a simple method.

[0009]

In the above prior art, although there is a certain effect in improving the uniformity of the polishing amount of a flat substrate such as a semiconductor wafer to be polished, as a specific method, the in-plane uniformity is reduced. Had not been improved significantly.

In addition, there is a practical problem that the method for preparing the polishing cloth is complicated and difficult to use.

The present invention suppresses unevenness in the amount of polishing in a wafer surface, which has become non-uniform in conventional polishing techniques, and provides a flat polishing cloth, a semiconductor manufacturing apparatus, and a semiconductor device manufacturing method capable of obtaining good characteristics. The method is provided more easily.

[0012]

The flat polishing cloth according to the present invention has the following features.

In the planar polishing cloth for polishing a flat substrate, a groove is formed only in a corresponding portion of the planar polishing cloth which is at least 1 cm from an end of a contact portion of the planar substrate with the planar polishing cloth. And

In a flat polishing cloth for polishing a flat, circular, rectangular, or square or similar flat substrate, at least one centimeter from an end of a contact portion of the flat substrate with the flat polishing cloth. It is characterized by having a groove only in the corresponding part.

Further, a semiconductor manufacturing apparatus according to the present invention comprises:
In a semiconductor manufacturing apparatus having at least a mechanism for holding a semiconductor wafer and a mechanism for holding a planar polishing cloth in contact with the semiconductor wafer in opposition to the mechanism, the semiconductor wafer and the planar polishing cloth may be combined at any stage during polishing. At least one of the contacting parts from the edge of the wafer
a flat polishing cloth having a groove only in a portion corresponding to the inner side of cm.

Further, a method of manufacturing a semiconductor device according to the present invention has the following features.

In a method for manufacturing a semiconductor device, the method includes a step of polishing a semiconductor wafer opposed thereto with a plane polishing cloth, wherein at least 1 cm from an end of the semiconductor wafer is provided.
Forming a groove in a portion of the planar polishing cloth corresponding to an inner portion and polishing the groove.

Further, the step of forming the groove thereon is immediately before the start of polishing.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In an embodiment of the present invention,
A description will be given by giving a form of a semiconductor manufacturing apparatus according to an embodiment of the present invention. The claims are separately described as a polishing cloth, a semiconductor manufacturing apparatus, and a semiconductor device manufacturing method, but have the same purpose.

A semiconductor wafer was used as an example of the flat substrate. The flat substrate is not limited to this, and the structure of the opposed flat polishing cloth is the main subject of the present invention. Now, the polishing cloth facing the semiconductor wafer makes, for example, a uniform rotational movement on the same surface. However, the movement of the flat polishing cloth is not limited to this. As a characteristic of the polishing cloth, it is desirable that after a certain time T from the start of polishing, the position and the direction of movement of the polishing cloth are the same as the moment of the start of polishing. Although the movement is exemplified, the plane polishing cloth may perform any movement as long as the movement of the plane polishing cloth is not hindered. For example, loop a plane polishing cloth with a length of about 20 meters,
In a portion contributing to polishing, a method of making a uniform linear motion on the same plane is also effective. At this time, it is assumed that the semiconductor wafer is brought into contact with the polishing cloth so as to face the polishing cloth. Here, for the sake of simplicity, the line at which the center of the semiconductor wafer continues to be drawn on the polishing cloth during polishing is referred to as a track center line. When the plane polishing cloth is rotating at a constant speed according to the embodiment of the present invention, the center line of the orbit is a circle or an arc. In addition, for example, in the case of a linear motion at a constant velocity, the orbital center line becomes a bounded straight line as long as the polishing surface remains. Now, a total of two different envelopes can be drawn on the polishing cloth on both sides at a position separated by the radius of the semiconductor wafer from the track center line. This will be referred to as an outer trajectory line. In other words, the wafer comes into contact with the polishing cloth only at the portion sandwiched between the two outer trajectory lines, and its center draws the trajectory center line on the polishing cloth.

In order to perform polishing, it is necessary to hold the wafer in some way and bring it into contact with the polishing cloth. In the present invention, however, the normal line of the surface to be polished of the semiconductor wafer is obtained by performing vacuum suction from the back surface with a carrier. It was set to face vertically downward. The direction of the polished surface of the semiconductor wafer is not limited to this. Also, the holding method is not limited to vacuum suction.

A groove is formed on the surface of the flat polishing cloth along the orbital center line assumed earlier. It is easy to use a fixing jig, but in the present invention, it was carried out by using a commercially available chisel and holding it with the hand of an operator. Apply a round sword to a flat abrasive cloth and hold the cutting edge so that it does not move relative to the center line of the track. The grooves can be formed along the track center line by the movement of the flat polishing cloth itself. In this embodiment, the surface polishing cloth is IC-1000 (trade name) manufactured by Rodale Nitta Co., Ltd. In this embodiment, the size of the groove is about 3 mm in width and about 1 mm in depth on average.
However, the groove is not limited to this size. The part formed near the orbital center line is important. In some cases, it was cut close to the platen supporting the flat polishing cloth because it was held by hand. Conversely, there was a case where a groove could not be formed at all in a part of the orbital center line. However, with respect to the target portion of the present invention, the averaging of the polishing amount at the edge and the center of the semiconductor wafer does not seem to depend on the shape of the groove. Further, it hardly depends on the number of grooves or the shape on the flat polishing cloth. In addition to the depth direction, there was also a case where it deviated largely from the orbit center line in the lateral direction. However, this is the case in which the groove is formed more than 1 cm from the outer circumference line, and when the groove is formed in the outer part beyond the range (of course, the inner part than the outer circumference line), the uniformity becomes extremely poor. . The points in polishing the semiconductor wafer which can be considered from this fact will be discussed later.

In the embodiment of the present invention, the timing of forming the groove is described just before the polishing of the semiconductor wafer. The advantage of forming immediately before is that it is not necessary to search for the track center line finely because it can be done after positioning of the polishing pad. However, as will be discussed later, it is considered that slight deviation of the groove position does not affect the improvement of the polishing characteristics. Therefore, it is conceivable to form the groove in the polishing cloth in advance. In this case, there is an advantage that a flat polishing cloth having a uniform shape can be mass-produced before the flat polishing cloth is attached to the semiconductor manufacturing apparatus.

FIG. 1 shows a main portion (polishing portion) of a semiconductor manufacturing apparatus after grooves are formed on a flat polishing cloth according to the present embodiment, as viewed from a position (in the present embodiment) facing the flat polishing cloth. FIG. According to this drawing, the semiconductor wafer 102 which is polished in contact with the flat polishing cloth 101 is rotated by the rotation of the flat polishing cloth so that the outer peripheral orbit lines 10 are formed.
Polishing is performed at a portion surrounded by 3 and 104. Orbit center line 1
A groove 106 was carved in the same position as 05, and the slurry was charged and polished.

In the case where a groove closed on a plane is formed very precisely on the center line of the track, a phenomenon occurs in which the rotation center of the semiconductor wafer is not polished at all. In this case, in order to avoid this, it is preferable to apply an appropriate swing to the carrier. Specifically, 5 mm to 1 cm in the direction perpendicular to the track center line
A reciprocating motion of a distance of. The swing distance is not limited to this. By applying rocking, there is no portion where polishing is not performed at all. Alternatively, it is also effective to create a portion where the polished surface remains flat without being closed when forming the groove. In this embodiment, a groove precisely aligned with the orbital center line is formed, and the above-mentioned swing is applied to the carrier by 5 mm.
It went in the range of. The trajectory center line and the outer trajectory line defined by the swing change by the swing distance.

In this embodiment, the polished semiconductor wafer has been subjected to the following preparation process. Aluminum is sputtered on the semiconductor substrate and patterned by a mask pattern using photolithography. Then, part of the aluminum is removed by dry etching. At this time, the area occupied by the aluminum not removed with respect to the entire area of the semiconductor wafer was about 41%. Thereafter, an NSG film having a thickness of 2 μm was formed as an interlayer insulating film. At this time, the film thickness difference between the portion where aluminum was present on the base and the portion where aluminum was not present was about 9000 Å before polishing. This NSG film will be polished.

The mask pattern used is a pattern having a test element group (TEG) used for resistance measurement and the like. The film thickness of NSG having aluminum used as a measurement pad on the underlayer is measured and compared before and after polishing. Thus, the polishing amount was obtained. By searching for the same TEG at the center and the end of the wafer and measuring the corresponding portion, the difference in polishing between the center and the end can be observed.

In the conventional polishing using a polishing cloth, the difference between the center and the end of the polishing amount was about 10%. In the case of performing the polishing treatment using the planar polishing cloth having the grooves formed in the present example, the polishing amount at the center portion was improved, and the difference between the center portion and the end portion could be reduced to 2.2%. 3.4% when forming a groove meandering to the left and right of the track center line without swinging, and up to 1.2% difference when forming multiple grooves by weaving. It was also found that it could be reduced to In commercially available flat polishing cloths, there are examples in which fine grooves are formed on the entire polishing cloth at the same pitch on the polishing surface, but these form uniform grooves between the track center line and the outer circumferential track line. Therefore, the difference in the amount of polishing does not seem to be reduced. In addition, the difference in the amount of polishing when the groove is formed also in the vicinity of 1 cm inside the outer peripheral orbit line is about 14%.
Percent.

FIG. 2 is a conceptual explanatory view of the form of a groove on a flat polishing cloth according to the present embodiment. FIG. 2A illustrates a polishing range drawn on the polishing cloth by the semiconductor wafer 202 and two grooves (2061 and 2062) formed on the polishing range. The conceptual orbits are the outer orbit lines 203 and 2
This is a range surrounded by 04, and the conceptual orbit center line is 205. Groove 2061 and groove 2062 are orbit center line 2
FIG. 05 shows a state formed conceptually in parallel. The present invention is also an effective method when polishing is performed by forming a plurality of such grooves. FIG. 2B illustrates a polishing range drawn on the polishing pad by the semiconductor wafer 302 and a meandering groove 306 formed on the polishing range. The conceptual trajectory is a range surrounded by the outer trajectory lines 303 and 304, and the conceptual trajectory center line is 305. This shows a state in which the meandering groove 306 is formed conceptually non-parallel to the track center line 305. The present invention is an effective method even when polishing is performed by forming such conceptually curved grooves. Of course, the present invention is also an effective method when a plurality of grooves are formed into a curved shape or a combination of a curved line and a straight line. In any case, it is important that the groove is formed at a position inside 1 cm inside the outer peripheral orbit line.

Now, a point in polishing a semiconductor wafer is considered as follows. BS
By applying P, the force at which the center of the semiconductor wafer is pressed locally is greater than that at the end.
Due to an increase in pressure between the polishing pad and the polishing pad, the supplied slurry does not sufficiently reach the center. When the carrier is rotating, the centrifugal force further inhibits the slurry from entering the center. If a step (groove) is formed in the polishing cloth, the portion does not contact the semiconductor wafer at all, so polishing is unlikely to occur. However, a structure in which slurry is more easily supplied to the center portion of the semiconductor wafer. On the contrary, it is considered that the effect of increasing the polishing amount is more important. Actually, when an NSG film is formed on a semiconductor wafer to have an appropriate thickness to be flat and the same polishing is performed, the difference in the polishing amount between the center portion and the end portion is due to the initial step shown in the present embodiment. It is about twice as large as that of the semiconductor wafer. This is considered to be because the slurry is difficult to reach the center of the wafer because the flat NSG film is flat. In the wafer having the initial step shown in the present embodiment, the groove in which the slurry can move to the lower part of the step is formed between the flat polishing cloth and acts as if the groove were formed on the flat polishing cloth, It can be considered that the slurry was supplied to the center of the wafer through this.

From these results, it is considered that the following is important to eliminate the difference in the amount of polishing between the edge and the center of the semiconductor wafer or to reduce the amount of polishing at the center to that of the edge. The purpose of the present invention is to differentiate the state of the polishing cloth in the vicinity of the center line of the track of the semiconductor wafer from the state of the polishing cloth in the outer peripheral line of the track so that the slurry can be supplied more easily. In the present invention, a general semiconductor manufacturing apparatus in which a flat polishing cloth is rotated and a semiconductor wafer opposed thereto is polished has been exemplified. However, if this state is realized, application to other methods is possible. For example, a method in which one or more through holes are formed in the wafer itself or the polishing cloth itself and slurry is supplied from the holes, or a method in which the slurry is applied to the vicinity of the center of a wafer once, and then polished, and the like. Conceivable.

[0032]

By using the polishing cloth according to the present invention, it is possible to obtain a substrate to be polished having a small difference in the amount of polishing between the end and the center of the flat substrate, and to improve the amount of polishing in the center of the semiconductor wafer. Thus, a semiconductor device having a uniform in-plane polishing amount can be obtained. In addition, by using the semiconductor manufacturing apparatus according to the present invention, a semiconductor device having a uniform in-plane polishing amount can be obtained. In addition, by using the method of manufacturing a semiconductor device according to the present invention, a semiconductor device having a uniform in-plane polishing amount can be obtained, and a semiconductor device having a uniform in-plane polishing amount can be obtained by simpler means. Obtainable.

[Brief description of the drawings]

FIG. 1 is a view of a main part (polishing portion) of a semiconductor manufacturing apparatus after forming a groove on a planar polishing cloth according to the present embodiment, as viewed from a position opposed to the planar polishing cloth (in the present embodiment, from above). FIG.

FIG. 2 is a conceptual explanatory diagram of a form of a groove on a flat polishing cloth according to the present embodiment.

[Explanation of symbols]

 101 ··· Planar polishing cloth 102 ··· Semiconductor wafer 103 ··· Track outer circumference 104 ··· Track circumference 105 ··· Track center line 106 ··· Groove 202 ··· Semiconductor wafer 203 ··· Conceptual orbital periphery 204 ··· Conceptual orbital periphery 205 ··· Conceptual orbital centerline 2061 ··· Conceptually formed groove 2062 ··· Conceptually formed groove 302... Semiconductor wafer 303... Conceptual orbital peripheral line 304... Conceptual orbital peripheral line 305... Conceptual orbital centerline 306. ..Conceptually formed grooves

Claims (5)

[Claims] 1. A flat polishing cloth for polishing a flat substrate, wherein a groove is formed only in a corresponding portion of the flat polishing cloth which is at least 1 cm from an end of a contact portion of the flat substrate with the flat polishing cloth. A flat polishing cloth characterized by the above. 2. A flat polishing cloth for polishing a flat substrate having a circular, rectangular, or square or similar shape, wherein the planar polishing is at least 1 cm from an end of a contact portion of the flat substrate with the flat polishing cloth. A flat polishing cloth having grooves only in corresponding portions of the cloth. 3. A semiconductor manufacturing apparatus having at least a mechanism for holding a semiconductor wafer and a mechanism for holding a planar polishing cloth in contact with the semiconductor wafer in opposition to the semiconductor wafer and the semiconductor wafer and the semiconductor wafer at any stage during polishing. A semiconductor manufacturing apparatus comprising: a planar polishing cloth having a groove only in a portion corresponding to at least 1 cm inside from an end of the wafer in a portion in contact with the planar polishing cloth. 4. A method for manufacturing a semiconductor device, comprising a step of polishing a semiconductor wafer opposed thereto with a plane polishing cloth, wherein at least 1 cm from an end of the semiconductor wafer.
A method for manufacturing a semiconductor device, comprising a step of forming a groove in a portion of the planar polishing cloth corresponding to an inner portion and polishing. 5. The method of manufacturing a semiconductor device according to claim 4, wherein the step of forming the groove is immediately before the start of polishing.