JPH1155337A - Digital modulation circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To lower the sampling frequency of a base band filter and to significantly reduce the throughput by placing an up-sampler right after the base band filter in a DSP to perform up-sampling. SOLUTION: A base band modulator 1 converts the transmission data into base band I and Q signals according to its modulation system. Then both I and Q signals are inputted to the 1st and 2nd base band filters 2 and 3 having the same characteristics to undergo the band limit. The output of band-limited signals I and Q are up-sampled to the 2nd sampling frequency fs2 that is (n) times as high as the 1st sampling frequency fs1 by the 1st and 2nd up-samplers 12 and 13 respectively. In other words, the frequency fs1 of both filters 2 and 3 can be lowered down to 1/n frequency fs2. These lowered frequencies are outputted to the 1st and 2nd LPF 14 and 15 and then converted by an orthogonal modulator 9.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital modulation circuit used in a digital cellular phone or the like.
digital signal processing device such as a digital signal processor).
The present invention relates to a modulation circuit that reduces a signal processing scale without performance degradation.

[0002]

2. Description of the Related Art In recent years, with the development of digital signal processing technology, examples of realizing functions realized by analog circuits by digital signal processing are increasing. When the function is realized by digital signal processing, there are advantages that there is no variation in characteristics, there is no aging deterioration, and no adjustment is required. Furthermore, D
When a digital signal processing device that can be rewritten by a program such as an SP is used, the function is described by software, so that there is an advantage that correction and change are easy. The transition from analog circuits to digital signal processing is also progressing in the field of communication equipment such as digital mobile phones. As an ultimate example, software radio equipment (Joe Mitola) that realizes most of the wireless communication functions such as modulation / demodulation and channel separation by software , "The Software Radio Archite
cture ", IEEE Communication Magazine Vol.33 No.5 May
1995 p26-38) has been proposed. FIG. 5 shows an example in which a digital modulation processing device used in a digital cellular phone or the like is realized by a digital signal processing device using, for example, a DSP. In FIG. 5, the digital modulation circuit includes a baseband modulator 1 to which transmission data is input, first and second baseband filters 2 and 3 connected to the baseband modulator 1, And the first and second multipliers 4 and 5 connected to the second baseband filters 2 and 3, the 90 ° phase shifter 6 connected to the second multiplier 5, and the first multiplier Local oscillator 7 connected to the adder 4 and the 90 ° phase shifter 6, an adder 8 connected to the first and second multipliers 4 and 5, and a D / A converter connected to the adder 8. And a low-pass filter 11 connected to the D / A converter 10. The first and second multipliers 4, 5, and 90 ° phase shifter 6, the local oscillator 7, and the adder 8 form a quadrature modulator 9, and the baseband modulator 1, the first and second Portions of the baseband filters 2 and 3 and the quadrature modulator 12 that are surrounded by dotted lines are portions whose functions are realized by DSP software.

Next, the operation will be described. First, transmission data is input to the baseband modulator 1. The baseband modulator 1 converts transmission data into baseband I and Q signals according to a modulation scheme. The I signal is a signal that is an in-phase component of the modulated wave output (the output signal of the baseband filter 2), and the Q signal is a signal that is a quadrature component of the modulated wave output (the output signal of the baseband filter 3). is there. For example, π / 4 used in digital mobile phones
In the QPSK modulation method, I,
A Q signal is generated. Here, the symbol frequency of modulation, that is, the frequency at which the I and Q signals change is fb. These I and Q signals are input to first and second baseband filters 2 and 3 having the same characteristics, respectively, to perform band limitation. The first and second baseband filters 2, 3
Is a digital filter, it operates at the determined sampling frequency fs, and outputs the band-limited output from the first and second multipliers 4 and 5, the local oscillator 7, the 90 ° phase shifter 6 and the adder 8. To the quadrature modulator 9. This quadrature modulator 9 also operates at the sampling frequency fs. Further, the local oscillator 7 oscillates a cosine wave having a desired output frequency fc of the digital modulation circuit. In the quadrature modulator 12, a frequency fc is added to the band-limited I signal.
Is multiplied by the sine wave of frequency fc, and the outputs of both are added to obtain a digitally modulated wave output signal. Here, the spectrum of the digital modulation wave output signal of the quadrature modulator 9 is shown in FIG. The digital modulation wave output signal has a sampling frequency f
s, the spectrum of the image signal has a center frequency (fs−f) in addition to the original signal of the center frequency fc.
Appears in c). This digital output signal is converted to a D / A converter 1
At 0, the signal is converted to an analog signal, and the analog low-pass filter 11 removes the image signal to obtain a desired modulated wave output. Usually, it is necessary to make the sampling frequency fs of the D / A converter 10 and the sampling frequency fs of the DSP coincide. However, in order for the image signal to be able to be removed by the low-pass filter, a condition of fs> 2fc + Wd (1) is necessary as is easily understood from FIG. Here, Wd is the modulation wave bandwidth.

[0004]

In the processing by the digital modulation means, the baseband filters 2, 3
Has an overwhelmingly large amount of processing as compared to other processing means such as modulation, as can be seen from the following calculation. Therefore, there is a problem that the processing amount of the entire digital modulation means is increased due to the large processing amount of the baseband filters 2 and 3. That is, since the baseband filters 2 and 3 are convolution operations by a digital filter, the processing amount is determined by the sampling frequency fs and the number of taps of the digital filter. In order to obtain a characteristic with no performance degradation as compared with the case of realizing with an analog filter, it is necessary to prepare the tap length of the filter so as to correspond to a time response of eight times the symbol period of the transmission digital data.
Therefore, the required number of taps is (fs / fb) × 8. Normally, a digital filter requires a sum operation and a product operation each corresponding to the number of taps.
In digital signal processing by P, the sum operation and the product operation can usually be processed by one clock cycle in many cases. At this time,
The processing amount of the two baseband filters 2 and 3 can be expressed by the following equation. fs × (fs / fb) × 8 × 2 (2) For example, symbol frequency fb = 21 kHz, modulation wave output frequency fc = 455 kHz, modulation wave bandwidth Wd = 32
Consider the case of kHz. First, from Expression (1), the condition of the sampling frequency is fs ≧ 942 kHz, and the processing amount of the two baseband filters 2 and 3 when fs is set to the minimum value of 942 kHz is 676 MIPS (Million Instructions per Second). The processing capability of current general-purpose DSPs is generally 40 to 50 MIPS even at high speeds, and the processing scale for realization is very large. SUMMARY OF THE INVENTION The present invention has been made to solve the problems of the conventional digital modulation processing means as described above, and a digital modulation circuit capable of reducing the processing amount and reducing the processing scale without causing performance deterioration. The purpose is to provide.

[0005]

In order to achieve the above object, the present invention provides a digital modulation circuit in which a function of modulating and outputting transmission data is realized by a digital circuit. Baseband modulating means, baseband filter means for band limiting the baseband I and Q signals output from the baseband modulating means, upsampling means for upsampling the output of the baseband filter means, and upsampling A low-pass filter means for low-pass filtering the output signal of the means, and a quadrature modulation means for frequency-converting the output of the low-pass filter means to a desired frequency; The sampling frequency of Characterized in that minimum necessary. Another feature of the present invention is that the quadrature modulator generates a cosine wave having a frequency fL, and a 90 ° phase shifter that changes a phase of an output signal of the local oscillator to output a sine wave having a frequency fL. A first multiplier for multiplying the I signal low-pass filtered by the low-pass filter means with a cosine wave of frequency fL, and a second multiplier for multiplying the Q signal low-pass filtered by the low-pass filter means with a sine wave of frequency fL. 2 and an adder for adding the outputs of the first and second multipliers.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described based on illustrated embodiments. FIG. 1 is a block diagram showing one embodiment of a digital modulation circuit according to the present invention. In FIG. 1, a digital modulation circuit includes a baseband modulator 1 to which transmission data is input, and first and second baseband filters 2 and 3 connected to the baseband modulator 1.
And the first and second baseband filters 2, 3
And the first and second upsamplers 1 and 12 connected to the first and second upsamplers 1 and 2, respectively.
First and second low-pass filters 14 and 15 connected to the first and second low-pass filters 14 and 15, respectively, and first and second multipliers 4 and 5 respectively connected to the first and the second low-pass filters 14 and 15; , A 90 ° phase shifter 6 connected to the second multiplier 5 and the first multipliers 4 and 90 °
A local oscillator 7 connected to the phase shifter 6, an adder 8 connected to the first and second multipliers 4 and 5, a D / A converter 10 connected to the adder 8, D / A
And a third low-pass filter 11 connected to the converter 10. The first and second multipliers 4, 5, and 90 ° phase shifter 6, the local oscillator 7, and the adder 8 form a quadrature modulator 9, and the baseband modulator 1, the first and second The portions surrounded by dotted lines of the baseband filters 2 and 3 and the first and second upsamplers 12 and 13 and the first and second low-pass filters 14 and 15 and the quadrature modulator 9 are as follows.
The function is realized by the DSP software.

Next, the operation of the digital modulation circuit will be described. First, the transmission data is transmitted to the baseband modulator 1
, And the baseband modulator 1 converts the transmission data into baseband I and Q signals according to the modulation scheme.
Here, the symbol frequency of modulation, that is, the frequency at which the I and Q signals change is fb. These I and Q signals are divided into first and second baseband filters 2 and 3 having the same characteristics.
, Respectively, to limit the bandwidth. The baseband filters 2 and 3 are digital filters and operate at a predetermined first sampling frequency fs1. Next, the band-limited I and Q signal outputs are upsampled by the first and second upsamplers 12 and 13 to a second sample frequency fs2 which is n times fs1. That is, the first sampling frequency f in the baseband filters 2 and 3
s1 can be reduced to 1 / n of the second sampling frequency fs2 as described later in a specific example. Therefore, the amount of processing in the baseband filters 2 and 3 can be reduced. There are various interpolation methods for the above-described up-sampling. Here, zero interpolation is performed in which all the values of the increased sample points are set to 0. As an example, FIG. 3 shows the spectrum of the output signal of the upsampler when n = 8. As can be seen from FIG. 3, the spectrum image of FIG. 2 appears every fs1.

This is attenuated by the first and second low-pass filters 14 and 15 in the image inside the dashed line shown in FIG. After the outputs of the low-pass filters 14 and 15, the quadrature modulator 9 converts the baseband I and Q signal outputs up-sampled from fs1 to fs2 to a desired frequency (see FIG. 4). And
After the frequency conversion, the signal is converted into an analog signal by the D / A converter 10, and an image signal generated at an interval proportional to the sampling frequency of the D / A converter 10 is converted to a low-pass filter 11.
To attenuate. As described above, according to the above embodiment,
By greatly reducing the sampling frequency fs1 in the baseband filters 2 and 3 for band limitation, the processing amount of the baseband filters 2 and 3 is significantly reduced as the result of the following equation. Here, the first sampling frequency fs1 in the baseband filters 2 and 3 is 168 kHz, and the upsamplers 12 and 1
3, the second sampling frequency fs2 = 1.344 MHz, and the symbol frequency fb = 21
In the case of kHz, from the above equation (2), fs1 × (fs1 / fb) × 8 × 2 = 21.5 MIPS, and the low-pass filter 1 after the upsampler is obtained.
4 and 15, the second sampling frequency f
Although the operation is performed at s2, the number of taps required for attenuation needs to be (fs2 / fb) / 4, and the processing amount is calculated by the following equation. (Fs2 × (fs2 / fb) / 4) × 2 = 43 MIPS (3) Therefore, in the digital modulation procedure according to the conventional method described above, the processing amount of the baseband filters 2 and 3 is 676 MIPS.
In the present embodiment, the processing amount of the baseband filters 2 and 3 and the low-pass filters 14 and 15 is 65 MIPS, but the processing amount is greatly reduced.

[0009]

According to the present invention, as described above, an upsampler is provided immediately after a baseband filter in a DSP to perform upsampling, so that the sampling frequency of the baseband filter can be kept low. And the amount of processing can be greatly reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a digital modulation circuit according to the present invention.

FIG. 2 is a diagram illustrating a spectrum of an output signal of a baseband filter of the embodiment illustrated in FIG. 1;

FIG. 3 is a diagram showing a spectrum of an output signal of the upsampler of the embodiment shown in FIG. 1;

FIG. 4 is a spectrum diagram of an output signal of the quadrature modulator of the embodiment shown in FIG.

FIG. 5 is a diagram showing a conventional digital modulation circuit.

FIG. 6 is a diagram showing rules for generating I and Q signals in a π / 4 QPSK modulation scheme.

FIG. 7 is a diagram showing a spectrum of an output signal of a quadrature modulator of the conventional digital modulation circuit shown in FIG.

[Explanation of symbols]

1 ... baseband modulator 2, 3 ... baseband filter, 4, 5 ... multiplier,
6: 90 ° phase shifter, 7: local oscillator,
8 adder, 9 quadrature modulator,
10 D / A converters 12, 13
… Upsampler, 11, 14, 15… Low-pass filter,

Claims (2)

[Claims] 1. A digital modulation circuit having a function of modulating transmission data and outputting the data by a digital circuit, comprising: baseband modulation means for converting transmission digital data into baseband I and Q signals; Baseband filter means for band-limiting the baseband I and Q signals of the means output, upsampling means for upsampling the output of the baseband filter means, lowpass filter means for lowpass filtering the output signal of the upsampling means, Quadrature modulation means for frequency-converting the output of the low-pass filter means to a desired frequency, wherein the first sampling frequency of the baseband filter means for band-limiting the upstream stage of the up-sampling means has been suppressed to a necessary minimum. Characteristic digital modulation times Road. 2. A local oscillator for generating a cosine wave having a frequency fL, a 90 ° phase shifter for changing a phase of an output signal of the local oscillator to output a sine wave having a frequency fL, and A first multiplier for multiplying the I signal low-pass filtered by the low-pass filter means with a cosine wave of frequency fL, and a second multiplication for multiplying the Q signal low-pass filtered by the low-pass filter means with a sine wave of frequency fL Vessel and the first
The digital modulation circuit according to claim 1, further comprising an adder for adding an output of the second multiplier.