JPH1146053A - Package structure of electronic component - Google Patents

Abstract

PROBLEM TO BE SOLVED: To avoid a defective contact between an electronic component and a package substrate by a method, wherein the cracking in a packaging substrate caused due to external impacts is avoided for avoiding the disconnection in a leading out wiring arranged in the packaging substrate. SOLUTION: In order to terminate the whole terminal end of the junction of solder bumps 7 with an outermost peripheral electrode 2a at the inner peripheral part of the electrode 2a positioned on the outer periphery from among multiple electrodes 2 arrayed on a multilayered printed wiring board 3, the outer peripheral part of the electrode 2a is covered with a solder resist 10. Through these procedures, since the end part of the outermost peripheral electrode 2a which is most likely to cause crackings does not coincide with the stress concentration point in an external impact time, the cracking in the multilayered printed wiring board 3 is avoided, thereby enabling the defective contact between a BGA package 1 and the multilayered printed wiring board 3 to be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mounting structure of an electronic component for electrically connecting the electronic component and a mounting board by solder bumps arranged in an array on the back surface of the electronic component, and more particularly to a portable device. The present invention relates to an electronic component mounting structure.

[0002]

2. Description of the Related Art A conventional mounting structure of a ball grid array (BGA) package 101 is shown in FIG.
Shown in As shown in this figure, the BGA package 1
The mounting of the solder bumps 102 is performed by melting a plurality of solder balls arranged in an array on the back surface of the BGA package 101 to form solder bumps 102, and using the plurality of solder bumps 102 on a plurality of electrodes 10 provided on a multilayer printed wiring board 103.
4 are joined together. Specifically, on the multilayer printed wiring board 103, a wiring layer serving as a plurality of lead-out wirings is laminated and formed via a core material or the like, and electrically connected to each of the plurality of lead-out wirings on the surface of the core material. The connected electrodes 104 are formed, and the solder bumps 102 are joined to the electrodes 104 to electrically connect to each of the plurality of lead wirings.

A lead wire 105 at an electrode (hereinafter, referred to as an outermost electrode) 104a joined to an outermost one of a plurality of solder bumps 102 arranged in an array on the multilayer printed wiring board 103 is connected to an external device. Is formed on the surface of the multilayer printed wiring board 103 in order to facilitate electrical conduction with the substrate. This outermost electrode 104a
5A is shown in FIG. 5A, and a top view of FIG. 5A is shown in FIG. As shown by the hatched portion in FIG. 5B, the lead wiring 105 is covered with a solder resist 106 for protection. At this time, solder bump 1
Since the surface of the electrode 104 is entirely exposed in order to increase the bonding area between the second electrode 02 and the electrode 104, the solder bump 102 is bonded to a part of the outermost electrode 104a and a part of the lead-out wiring 105 in the outermost electrode 104a. It will be in the state of having done.

[0004] Therefore, the solder bump 102 is in a state of contacting the solder resist at a portion joined to the lead wiring 105, and is not in contact with the solder resist at other portions.

[0005]

When an external impact is applied to the BGA package 1 or the multilayer printed wiring board 103, stress concentration occurs at the outermost peripheral electrode 104a, so that the outermost peripheral electrode 104a and the solder bump 102 are joined. In such a portion, a bonding strength that does not cause the solder bumps 102 to be separated from the outermost peripheral electrode 104a due to the stress concentration is required.

However, even when the bonding strength of the bonding portion of the outermost peripheral electrode 104a can withstand the stress concentration, as shown by a two-dot chain line in FIG.
A crack is generated in the core material from the end A of the interface between the outermost peripheral electrode 104a and the core material in the outer peripheral portion of the outermost peripheral electrode 104a where the lead-out wiring 105 is not formed. There is a problem that the wiring is broken and a contact failure occurs.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and thereby prevents breakage of a wiring board provided on a wiring board by preventing cracks of the wiring board caused by an external impact, thereby preventing contact between an electronic component and a mounting board. It is an object of the present invention to provide an electronic component mounting structure that can prevent a defect.

[0008]

In order to solve the above problem, the present inventors have studied the cause of the occurrence of cracks in the multilayer printed wiring board 103. FIG. 7 shows an enlarged sectional view near the outermost peripheral electrode 104a. Looking at the portion of the outermost peripheral electrode 104a where the solder bump 102 is joined, where the lead-out wiring 105 is not formed, the solder bump 102 wraps around to the end A of the interface between the outermost peripheral electrode 104a and the core material. It can be seen that it is terminated at. The end A is a portion where the core material is most likely to crack due to an external impact, and it is considered that the fact that the end A coincides with the stress concentration point at the time of the external impact is the cause of the crack. Can be

Therefore, the present invention employs the following technical means to achieve the above object. According to the first aspect of the present invention, of the plurality of electrodes (2) arranged in an array on the mounting board (3), the outermost peripheral electrode (2a) located on the outer periphery of the arrangement has a solder bump (2). 7) and the outermost peripheral electrode (2a) are all joined to the outermost peripheral electrode (2a).
a) in the inner peripheral portion.

As described above, if all the terminal portions of the solder bump (7) and the outermost electrode (2a) are located on the inner peripheral portion of the outermost electrode (2a), the outermost electrode where cracks are most likely to occur. Since the end of (2a) does not coincide with the stress concentration point at the time of external impact, it is possible to prevent the mounting substrate (3) from cracking. Accordingly, disconnection of the lead-out wiring can be prevented, and poor contact between the electronic component (1) and the mounting board (3) can be prevented.

The invention according to claim 2 is characterized in that the outer peripheral portion of the outermost peripheral electrode (2a) is covered with a protective film (10). Thus, the protective film (10)
If the outer peripheral portion of the outermost peripheral electrode (2a) is covered by the outermost peripheral electrode (2a), the joining portion of the solder bump (7) is
It may be terminated at the inner peripheral portion of a). Thereby, the same effect as the first aspect can be obtained.

According to a third aspect of the present invention, the electronic component (1) is mounted on a portable device. In a portable device, it is easy to receive an external impact due to a drop or the like, and poor contact between the electronic component (1) and the mounting board (3) is likely to occur. Therefore, claim 1
Alternatively, it is effective to apply the invention described in 2 to a portable device.

The reference numerals in parentheses of the above means indicate the correspondence with the concrete means described in the embodiments described later.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic diagram when the BGA package 1 is mounted on a multilayer printed wiring board 3 provided with predetermined electrodes 2 (pads). FIG. 2 shows an arrangement pattern of the electrodes 2 provided on the multilayer printed wiring board 3. However, FIG. 2 is a simplified representation of the arrangement pattern of the electrodes 2, and shows that circular electrodes as shown by hatched portions are arranged in an array.

Here, the BGA package 1 is such that a semiconductor chip is mounted on an interposer 4 having a circuit wiring 6 via an adhesive or the like, and the circuit wiring 6 and the semiconductor chip are connected to each other by Au.
This shows a semiconductor chip and an Au wire sealed with a sealing resin 5 after being electrically connected by a wire or the like. In the present embodiment, polyimide is used for the interposer 4 and epoxy resin or the like is used for the sealing resin 5 in consideration of thinning and productivity.

The interposer 4 corresponding to the back surface of the BGA package 1 is provided with holes in an array. The solder balls are melt-bonded to the circuit wiring 6 through the holes, thereby forming the back surface of the BGA package 1. The solder bumps 7 are arranged in an array.
On the other hand, the multilayer printed wiring board 3 is formed by laminating a large number of wiring layers 8 and has the electrodes 2 formed in an arrangement pattern as shown in FIG. The arrangement pattern of the electrodes 2 corresponds to the arrangement of the solder bumps 7, and the solder bumps 7 provided on the BGA package 1 and the electrodes 2 provided on the multilayer printed wiring board 3 at the time of mounting are respectively assembled. It is to be combined. In the present embodiment, at least the outermost peripheral electrode 2a of the plurality of electrodes 2 provided on the multilayer printed wiring board 3
In (the electrode 2 in the region X in FIG. 2), the outer peripheral portion of the outermost peripheral electrode 2a is covered with the solder resist 10. In the present embodiment, the inner peripheral electrode 2b (the electrode 2 in the region Y in FIG. 2) disposed inside the outermost peripheral electrode 2a does not cover the outer peripheral portion of the inner peripheral electrode 2b, but the outermost peripheral electrode 2b is not covered. You may make it cover an outer peripheral part similarly to 2a.

Hereinafter, a method for manufacturing the multilayer printed wiring board 3 will be described. For simplicity, a multilayer printed wiring board 3 composed of four layers will be described. First, a core material having copper foil treated on both surfaces is prepared, and a through hole (blind via hole) is formed by drilling a hole at a predetermined position. And through this through hole,
Through-hole plating by copper plating is performed to electrically conduct copper on both surfaces of the core material. This allows
A substrate subjected to through-hole plating is completed.

Next, two substrates subjected to such a through-hole plating process are prepared, and out of the two substrates,
The copper foil on the surfaces to be bonded later is patterned by etching. Then, a heat press process is performed with the prepreg containing the epoxy resin contained in the glass cloth sandwiched between the two substrates, and the two substrates are bonded to each other. Thus, a copper foil layer divided into four layers is formed.

A through hole is formed by drilling a hole so as to penetrate all four layers, and through-hole plating is performed by copper plating so that the copper foil divided into four layers is electrically connected. I do. After that, BGA package 1
Is etched, the copper foil on the side corresponding to the surface of the multilayer printed wiring board 3 is patterned by etching, leaving the copper foil on the electrode portion and forming a predetermined lead-out wiring.

Thereafter, in order to protect the lead wiring,
The solder resist 10 is printed and formed, and the solder resist 1 is formed.
0 covers the lead wiring and the outer peripheral portion of the outermost peripheral electrode 2a. FIG. 3A is an enlarged cross-sectional view of the outermost peripheral electrode 2a at this time. FIG. 3A is a top view of FIG.
(B). As shown in FIGS. 3A and 3B, the solder resist 10 is covered so as to cover the entire outer peripheral portion of the outermost peripheral electrode 2a, ie, so that the outer peripheral portion of the outermost peripheral electrode 2a and the solder resist 10 overlap. Has formed. A part of the solder resist 10 is opened in a circular shape so that the inner peripheral portion (other than the outer peripheral portion) of the outermost peripheral electrode 2 a is not covered with the solder resist 10.
a and the solder bump 7 can be joined.

Since a printing shift occurs when the solder resist 10 is formed by printing, even if a printing shift occurs, the outer peripheral portion of the outermost peripheral electrode 2a is considered in consideration of the amount of overlap between the solder resist 10 and the outermost peripheral electrode 2a. All are covered with the solder resist 10. After that, if necessary, the electrode 2 may be plated with nickel-gold (Ni-Au), tin (Sn), or palladium (Pd) by electroless plating to obtain a plurality of electrodes. The multilayer printed wiring board 3 including the wiring layer 8 is completed.

After the BGA package 1 is positioned and mounted on the multilayer printed wiring board 3 completed in this way, the BGA package 1 is mounted on the multilayer printed wiring board 3 by melting the solder bumps 7. Here, FIG. 4 shows an enlarged cross-sectional view in the vicinity of the outermost peripheral electrode 2a in the present embodiment. Looking at the joints of the solder bumps 7 shown in FIG. 4, since the outer periphery of the outermost electrode 2a is covered with the solder resist 10 in the present embodiment, the joint of the solder bump 7 is the outermost electrode 2a. The solder bump 7 and the outermost peripheral electrode 2
It can be seen that all of the ends of the connection with a are terminated at the inner periphery of the outermost electrode 2a.

Therefore, the joint portion of the solder bump 7, which is a stress concentration point due to an external impact, does not coincide with the edge A of the interface between the outermost peripheral electrode 2 a where the core material is most likely to crack and the core material. It is possible to prevent the core material from cracking due to stress concentration due to impact. Thereby, disconnection of the lead-out wiring due to the crack of the core material can be prevented, and poor contact between the BGA package 1 and the multilayer printed wiring board 3 can be prevented.

In the present embodiment, the lead wire of the outermost peripheral electrode 2a is formed on the surface of the core material. However, the lead wire of the outermost peripheral electrode 2a is built in the lower layer of the outermost peripheral electrode 2a. The same effect as described above can be obtained even when the outer peripheral portion of the outermost peripheral electrode 2a is covered with the solder resist 10. Further, even when the outermost peripheral electrode 2a is a dummy electrode having no lead-out wiring, by covering the outer peripheral portion of the outermost peripheral electrode 2a with the solder resist 10, the same effect as described above can be obtained. That is, if the mounting structure is such that the core member does not crack in the outermost peripheral electrode 2a, no stress is concentrated on the inner peripheral electrode 2b.
This is because it is possible to prevent the occurrence of cracks in the core member in b. However, in this case, a space for forming a dummy electrode is required, so that the size of the BGA package 1 and the multilayer printed wiring board 3 are increased as a whole, so that the method of the above embodiment is effective.

When the mounting structure of the BGA package 1 and the multilayer printed wiring board 3 shown in the present embodiment is used for a portable device, for example, a portable telephone, the portable device is susceptible to an external impact due to a drop or the like. Since the contact failure between the component and the mounting board easily occurs, the contact failure can be particularly effectively prevented.

[Brief description of the drawings]

FIG. 1 shows an embodiment to which the present invention is applied, and a BGA
FIG. 2 is a schematic cross-sectional view when a package 1 is mounted on a multilayer printed wiring board 3.

FIG. 2 is a schematic diagram showing an arrangement pattern of electrodes 2 provided on a multilayer printed wiring board 3;

FIG. 3A is a partially enlarged view of an outermost peripheral electrode 2a,
(B) is a top view of (a).

FIG. 4 is an explanatory diagram showing a bonding portion of a solder bump 7 at an outermost peripheral electrode 2a.

FIG. 5 is a schematic cross-sectional view when a conventional BGA package 101 is mounted on a multilayer printed circuit board 103.

6A is a partial cross-sectional view of the outermost peripheral electrode 104a, and FIG. 6B is a top view of FIG.

FIG. 7 shows a solder bump 10 on the outermost peripheral electrode 104a.
It is explanatory drawing which shows the 2nd junction.

[Explanation of symbols]

1 BGA package, 2 electrodes, 2a outermost electrode,
2b: inner peripheral electrode, 3: multilayer printed wiring board, 4: interposer, 7: solder bump, 10: solder resist.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Koji Kondo, Inventor 1-1-1, Showa-cho, Kariya-shi, Aichi, Japan

Claims (3)

[Claims] After a plurality of solder bumps (7) in an array are formed on the back surface of an electronic component (1), the solder bumps (7) are arranged in an array corresponding to the arrangement of the solder bumps (7). The electronic component (1) is positioned and mounted on a mounting substrate (3) having a plurality of electrodes (2), and the plurality of solder bumps (7) are melted and joined to the electrodes (2) to thereby form the electronic component. In a mounting structure of an electronic component in which a component (1) and the mounting board (3) are electrically joined, the plurality of electrodes (2) arranged in an array are located on an outer periphery of the array. In the outermost peripheral electrode (2a),
A mounting structure for an electronic component, wherein the entire end portion of the joint between the solder bump (7) and the outermost electrode (2a) is located on the inner peripheral portion of the outermost electrode (2a). 2. An outer peripheral portion of the outermost peripheral electrode (2a)
An electronic component mounting structure, which is covered with a protective film (10). 3. A portable device comprising the electronic component (1) according to claim 1 or 2.