JPH114203A - Multidirection/time-divisional multiplex radio data communication system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the occurrence of a bit error in a transmitted data signal. SOLUTION: Data which is data-converted at high speed in a continuous/burst conversion circuit 71 and an error correction code generated in an error correction encoding circuit 2 are multiplexed in a specified time slot and a specified idle slot so as to be transmitted. Data in the multiplex signal is data-converted at low speed in a burst/continuous conversion circuit 81 and the bit error position in the error correction code is detected in an error position detection circuit 4 through a division circuit 3. The error of data is corrected in an addition circuit 5 based on the detected result.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-directional time-division multiplexing wireless data communication system, and more particularly, to a fixed allocation of a wireless time slot used between a master station device and a slave station device, which is connected to these devices. The present invention relates to a multi-way time division multiplexed wireless data communication system for performing data communication between data terminal devices.

[0002]

2. Description of the Related Art Generally, in a radio system for performing multi-directional multiplex communication, a one-to-N (N is a positive number of two or more) is established between one master station and a plurality of slave stations facing the master station. integer)
Is performed. At this time, especially in a system in which telephone communication and data communication coexist, with respect to telephone communication, a radio communication channel is allocated between the master station device and the slave station device only when a call is generated in the master station device or the slave station device. Channel assignment is performed by a demand assignment method, and with respect to data communication, data communication is performed between a data terminal device connected to the master station device and a data terminal device connected to a slave station device opposite to the data terminal device. Allocation control is performed by a pre-assignment method in which a fixed wireless communication channel is assigned in advance.

FIG. 3 is a block diagram showing an example of a conventional multi-directional time-division multiplex wireless data communication system. That is, in the figure, a multi-way time-division multiplexing wireless data communication system includes a master station device 51, a plurality of data terminal devices 52, 53, 54 connected to the master station device 51, and a plurality of wireless terminals facing the master station device. Slave station devices 62, 63, and 64, and respective slave station devices 6
Data terminal devices 65, 66, 67 connected to 2 to 64
And the slave station devices 62 to 64
Downlink to TDM (Time Division)
In the Multiplex (Multiplex) system, the uplink direction from the slave station devices 62 to 64 to the master station device 51 is TDMA (Time Div).
The data communication is performed by an I / O Multiplexing Access Multiplexing method.

Here, the data terminal device 52 and the data terminal device 62, the data terminal device 53 and the data terminal device 63,
The operation when the data terminal device 54 and the data terminal device 64 face each other to perform data communication will be described.

First, a radio time slot to be used as a radio communication channel is fixedly allocated in advance to each of the opposing data terminal devices. That is, the data terminal device 52
And a wireless time slot TS0 for the data terminal device 62,
A wireless time slot TS1 is fixedly assigned to the data terminal device 53 and the data terminal device 63, and a wireless time slot TS2 is assigned to the data terminal device 54 and the data terminal device 64, respectively.

FIG. 4 is a timing chart showing the allocation state of radio time slots. As shown in the figure,
Radio time slot TS0, radio time slot TS
1, the radio time slots TS2 are allocated to different positions that do not overlap with each other with respect to the time axis T, so that signals transmitted using the respective time slots do not collide.

When a call is made to any of the data terminal devices in the system, a radio time slot is allocated to each of the data terminal devices. The data communication can be performed.

For data transmission in the down direction, the data terminal device 52, the data terminal device 53, the data terminal device 5
4 is input to the master station device 51, multiplexed by the master station device 51, and then multiplexed to the slave station devices 62, 63, and 64 using the TDMA method. The data signal is transmitted.

That is, the data signal from the data terminal device 52 is in the radio time slot TS0, the data signal from the data terminal device 53 is in the radio time slot TS1,
The data signal from the data terminal device 54 is multiplexed in the radio time slot TS2, respectively, and the multiplexed burst-like data signal is transmitted to each slave station device using the TDM method.

It is to be noted that the same signal is transmitted to each slave station device.

Each of the slave station devices 62 to 64 separates and selects only the data signal addressed to itself, and sends out the data signal to one of the connected data terminal devices 65 to 67.

That is, the data signal multiplexed in the radio time slot TS0 is separated by the slave station device 62 to the data terminal device 65, and the data signal multiplexed in the radio time slot TS1 is separated by the slave station device 63 and separated by the data terminal device. 6
6, the data signal multiplexed in the radio time slot TS2 is separated by the slave station device 64 and transmitted to the data terminal device 67, respectively.

As for data transmission in the uplink direction, data signals from the data terminal devices 65 to 67 connected to the slave station devices 62 to 64 are multiplexed in the assigned wireless time slots by the slave station devices 62 to 64. , And is transmitted to the master station as a burst signal using the TDMA method.

That is, the continuous data signal from the data terminal device 65 is input to the slave station device 62, multiplexed into the radio time slot TS0, and transmitted to the master station device 51. Similarly, the data signal from the data terminal device 66 is input to the slave station device 63 and multiplexed into the radio time slot TS1,
The data signal from the data terminal device 67 is input to the slave station device 64, multiplexed into the radio time slot TS2, and transmitted to the master station device 51, respectively.

In the master station device 51, each of the slave station devices 62 to 64
, And separates and extracts the data signals, and sends the corresponding data signals to any of the connected data terminal devices 52 to 54.

That is, the data signal multiplexed in the radio time slot TS0 is transmitted to the data terminal device 52, the data signal multiplexed in the radio time slot TS1 is transmitted to the data terminal device 53, and the data signal multiplexed in the radio time slot TS2 is transmitted to the data terminal device 53. Each is sent to the data terminal device 54.

For convenience of explanation, in FIG. 3, the number of slave station devices is 3, and the number of data terminal devices connected to each slave station device is 1, respectively. Circuits, signal lines, etc., which are not particularly important, are omitted. However, it is clear that the same operation is performed when the number of slave station devices is other than three and when a plurality of data terminal devices are connected to one slave station device.

Here, the one-way data transmission operation will be further described. Conventionally, as this kind of technology, for example,
The method shown in the multi-directional multiplexing system disclosed in Japanese Patent Application Laid-Open No. 3-24838 is well known. FIG. 5 is a configuration diagram of a conventional master station device and slave station devices.

In FIG. 1, a master station 51 includes a continuity / burst conversion circuit 7.
1 and timing signal generating circuits 72 and 73,
Each of the slave station devices 62, 63, 64 has a burst / continuous (burst / continuous) conversion circuit 81.
And timing signal generating circuits 82 and 83.

In the master station device 51, the data terminal device 5
The low-speed continuous data SIG1 input from any one of 2 to 54, for example, from 52 is input to the continuity / burst conversion circuit 71 based on the timing signal generated by the timing signal generation circuit 72, where the data is stored. Can be

The timing signal generation circuit 72 converts the clock signal synchronized with the continuous data SIG1 into the continuous data S
It generates a timing signal required when IG1 is periodically input to the continuity / burst conversion circuit 71.

The data stored in the continuity / burst conversion circuit 71 is read out based on the timing signal generated by the timing signal generation circuit 73, and sent out to the radio section as high-speed burst data SIG2.

The timing signal generation circuit 73 periodically converts the data stored in the continuity / burst conversion circuit 71 from a clock signal synchronized with the high-speed burst data SIG2 on the wireless side in units of the number of bits required for the unit burst data. This generates a timing signal necessary for reading.

FIG. 6 is a timing chart of low-speed continuous data and high-speed burst data. As shown by SIG1 and SIG2 in the figure, low-speed continuous data SIG1 is converted to high-speed data SIG2 and multiplexed into time slot TS0.

Next, in any of the slave station apparatuses 62 to 64, for example, 62, the burst data SIG2 transmitted from the opposite station is transmitted to the burst data SI via the wireless section.
G3, based on the timing signal generated by the timing signal generation circuit 82,
The data is input to the conti conversion circuit 81, where the data is stored.

From the clock signal synchronized with the burst data SIG3, the timing signal generation circuit 82 sends the burst data SIG3 to the burst / continuity conversion circuit 81.
It generates a necessary timing signal when the unit burst data is periodically input in the required number of bits.

The data stored in burst / continuous conversion circuit 81 is read out based on a timing signal generated by timing signal generation circuit 83, and output to data terminal device 65 as low-speed continuous data SIG4.

The timing signal generating circuit 83 generates a timing signal necessary for periodically reading data stored in the burst / continuous conversion circuit 81 from a clock signal synchronized with the low-speed continuous data SIG4. .

That is, referring to FIG. 6, high speed data SIG3 multiplexed in time slot TS0 is converted to low speed data SIG4.

Although SIG2 and SIG3 are the same signal, they are indicated by different numbers for convenience of explanation.

Further, each of the slave station devices 62 to 64 is connected to the master station device 5.
The same applies to the case where data is transmitted to No. 1, and the description is omitted.

That is, each of the slave stations 62 to 64 has the same configuration as the master station device 51 of FIG. 5, and the master station device 51 also has the same configuration as each of the slave stations 62 to 64 of FIG. .

[0033]

However, the above-mentioned conventional multi-directional time-division multiplexing radio data communication system only converts the speed between low-speed continuous data on the data terminal device side and high-speed burst data on the radio section side. In this case, since data transmission is performed through a wireless section, interference or fading or the like is directly affected by the occurrence of the interference or fading, resulting in a bit error in a transmitted data signal.

An object of the present invention is to provide a multi-way time division multiplexed wireless data communication system capable of preventing a bit error from occurring in a transmitted data signal.

[0035]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a plurality of master station side data terminal apparatuses and a master station apparatus for transmitting data from these data terminal apparatuses in a time-division multiplex manner. A plurality of slave stations that receive data transmitted from the master station and separate and select only data addressed to the own station from the data, and a plurality of slaves to which data from these slave stations are respectively input. A multi-directional time-division multiplexing wireless data communication system including a station side data terminal device, wherein the master station device has an error correction code generating means for generating an error correction code for data from the master station data terminal device; Multiplexing means for multiplexing the data and the error correction code from the error correction code generation means into specific different time slots and transmitting the multiplexed time slots.

According to another aspect of the present invention, there are provided a plurality of master station side data terminal apparatuses, a master station apparatus for transmitting data from these data terminal apparatuses in a time-division multiplexed manner, and transmission from the master station apparatus. A plurality of slave stations that receive data and separate and select only data addressed to the own station from the data, and a plurality of slave station data terminal apparatuses to which data from the slave stations are respectively input. A time-division multiplexed wireless data communication system, wherein the slave station receives the data transmitted from the master station in specific different time slots and an error correction code for the data, and The station device includes: an error correction code receiving unit that receives an error correction code from the master station device; and an error correction code decoding unit that decodes the error correction code received by the error correction code reception unit. And the step, characterized in that it comprises an error correction means for performing error correction of the received data based on the decoded error correction code in the error correction code decoding means.

According to the present invention, together with the transmission data, the error correction code of the data is multiplexed and transmitted to a specific time slot different from the data.

According to another aspect of the present invention, the receiving side receives the transmission data and the error correction code, and corrects a data error using the error correction code.

[0039]

Embodiments of the present invention will be described below with reference to the accompanying drawings. The overall configuration of the multi-way time-division multiplexed wireless data communication system according to the present invention is the same as that of the conventional example (FIG. 3), and thus description and illustration are omitted.

On the other hand, in the present invention, the internal configurations of the master station device 51 and the slave station devices 62 to 64 in FIG. Therefore, numbers different from these are newly assigned to the master station device and the slave station device. The same components as those in the conventional example (FIG. 5) are denoted by the same reference numerals, and description thereof will be omitted.

FIG. 1 is a block diagram of a master station device and a slave station device of a multi-way time division multiplexed wireless data communication system according to the present invention.

The master station apparatus 1 of the multi-way time-division multiplexing wireless data communication system according to the present invention differs from the conventional master station 51 in that an error correction coding circuit 2 is provided. 13 and 14 are conventional slave station devices 62, 63 and 64.
The difference from the first embodiment is that a division circuit 3, an error position detection circuit 4, and an addition circuit 5 are provided.

Next, the operation of the master station device 1 and the slave station device 1 will be described.

In the master station device 1, the data terminal device 52
To 54, for example, low-speed continuous data SIG1 input from 52, based on the timing signal generated by the timing signal generation circuit 72.
The data is input to the burst conversion circuit 71, where the data is stored.

At the same time, the continuous data SIG1 is converted into a BCH code (B, C, H indicate the first three letters of the inventor) in units of the number of bits required for the unit burst data in the error correction coding circuit 2. After the error correction coding operation is performed, the resulting redundant bits for error correction are output.

The timing signal generation circuit 72 converts the clock signal synchronized with the continuous data SIG1 into the continuous data S
The IG1 generates a timing signal required when the IG1 is periodically input to the continuity / burst conversion circuit 71 and a timing signal required when the error correction coding circuit 2 performs an error correction coding operation. .

Data stored in continuous / burst conversion circuit 71 is read out based on a timing signal generated by timing signal generation circuit 73.

In the multiplexing circuit 74, the burst data output from the continuity / burst conversion circuit 71 is transmitted to a predetermined radio time slot allocated in advance, and to the error correction encoding output from the error correction encoding circuit 23. The redundant bits are respectively multiplexed in specific empty slots on the radio frame and transmitted to the radio section as high-speed burst data SIG2.

The timing signal generation circuit 73 periodically reads data stored in the continuity / burst conversion circuit 71 from a clock signal synchronized with the high-speed burst data SIG2 on the radio side in units of bits required by the unit burst data. And a timing signal necessary for outputting the error correction redundant bits from the error correction encoding circuit 2.

FIG. 2 is a timing chart of low-speed continuous data, high-speed burst data, and redundant bits. As shown by SIG1 and SIG2 in the figure, the low-speed continuous data SIG1 and the redundant bits for error correction are high-speed data SI.
The data is converted into G2, the continuous data SIG1 is multiplexed in the time slot TS0, and the redundant bit for error correction is multiplexed in a specific empty time slot TSP.

Next, in the slave station devices 12, 13, 14, for example, 14, the burst data S transmitted from the opposite station is transmitted.
IG2 transmits burst data SIG3 via a wireless section.
And based on the timing signal generated by the timing signal generation circuit 82, is input to the burst / continuity conversion circuit 81, where the data is stored.

At the same time, the burst data SIG
3 is input to a division circuit 3, where division is performed on a bit sequence constituting an error correction code by a predetermined polynomial,
A syndrome for the error correction code is generated.

The timing signal generation circuit 82 outputs the burst data SIG3 from the clock signal synchronized with the burst data SIG3 to the burst / continuity conversion circuit 81.
It generates a timing signal required when the unit burst data is periodically input in the required number of bits and a timing signal required for the operation of the division circuit 3.

Data stored in burst / continuous conversion circuit 81 is read based on a timing signal generated by timing signal generation circuit 83.

Here, based on the syndrome output from the division circuit 3, the error position detection circuit 4 specifies the position where a bit error has occurred in the data,
The addition circuit 5 performs bit inversion on the erroneous bits in the low-speed continuous data read from the continuous conversion circuit 81, and performs error correction.

The timing signal generation circuit 83 includes a timing signal necessary for periodically reading data stored in the burst / continuous conversion circuit 81 from a clock signal synchronized with the low-speed continuous data SIG4, and an error position detection circuit. 4 generates a timing signal necessary for outputting an error position detection signal.

The data after error correction is continuous data SIG4
Is output to the data terminal devices 65 to 67.

That is, referring to FIG. 2, high-speed data multiplexed in time slot TS0 and time slot T
Data SIG3 composed of error correction redundant bits multiplexed on the SP is converted into low-speed data. Then, the data after the low-speed conversion is error-corrected and sent to the data terminals 65 to 67 as low-speed data SIG4.

Although SIG2 and SIG3 are the same signal, they are indicated by different numbers for convenience of explanation.

Further, each of the slave station devices 12 to 14 sends the master station device 1
The same applies to the case where data is transmitted to the server, and a description thereof will be omitted.

That is, each of the slave stations 12 to 14 has the same configuration as the master station 1 in FIG. 1, and the master station 1 also has the same configuration as each of the slave stations 12 to 14 in FIG. .

[0062]

According to the present invention, a plurality of master station data terminal devices, a master station device for transmitting data from these data terminal devices in a time-division multiplexed manner, and a signal transmitted from the master station device are provided. A plurality of slave stations that receive data and separate and select only data addressed to the own station from the data, and a plurality of slave station data terminal apparatuses to which data from the slave stations are respectively input. A time-division multiplexing wireless data communication system, wherein the master station device generates an error correction code for data from the master station side data terminal device; and the data and the error correction code generation device. Multiplexing means for multiplexing and transmitting the error correction code from the means to specific different time slots, so that the error correction code can be multiplexed with data.

According to another aspect of the present invention, there are provided a plurality of master station side data terminal devices, a master station device for transmitting data from these data terminal devices in a time-division multiplexed manner, and the master station device. And a plurality of slave station devices for receiving data transmitted from the mobile station and separating and selecting only data addressed to the own station from the data, and a plurality of slave station data terminal devices to which data from these slave stations are respectively input. Wherein the slave station device receives the data transmitted from the master station device in specific different time slots and an error correction code for the data, respectively. The slave station device further includes: an error correction code receiving unit that receives the error correction code from the master station device; and an error correction code that decodes the error correction code received by the error correction code receiving unit. Code decoding means, and error correction means for performing error correction of the received data based on the error correction code decoded by the error correction code decoding means, so that a bit error occurs in a transmitted data signal. Can be prevented.

Further, according to the present invention, since redundant bits for error correction are multiplexed in a specific empty slot on a radio frame, a speed conversion circuit accompanying the addition of the redundant bits is not required. Since the positions of the burst data and the redundant bits are known, a word synchronization circuit for error correction decoding on the receiving side is unnecessary.

In addition, since error correction is not performed for all radio frames but only for required subscribers per unit subscriber interface, an audio signal may be transmitted depending on the type of signal to be transmitted. It is possible to selectively use such that error correction is not performed when transmitting by digital conversion, and error correction is performed when transmitting a digital data signal from a data terminal device or the like.

Further, in one station, error correction coding is performed at the same time as performing the continuous / burst conversion, and in the other station, error correction decoding is performed simultaneously with performing the burst / continuous conversion. Does not cause a new delay.

From the above, regarding a multi-way time division multiplexing wireless data communication system, by adding a small-scale circuit,
There is an effect that transmission quality can be economically improved without generating a new delay.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a master station device and a slave station device of a multi-way time division multiplexed wireless data communication system according to the present invention.

FIG. 2 is a timing chart of low-speed continuous data, high-speed burst data, and redundant bits of the system.

FIG. 3 is a configuration diagram of an example of a conventional multi-directional time-division multiplex wireless data communication system.

FIG. 4 is a timing chart showing a wireless time slot allocation state.

FIG. 5 is a configuration diagram of a master station device and a slave station device of a conventional multidirectional time-division multiplexing wireless data communication system.

FIG. 6 is a timing chart of low-speed continuous data and high-speed burst data of the system.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 master station device 2 error correction coding circuit 3 division circuit 4 error position detection circuit 5 addition circuit 11 to 14 slave station device

Claims (5)

[Claims] 1. A plurality of master station side data terminal devices, a master station device for transmitting data from these data terminal devices in a time-division multiplexed manner, and receiving data transmitted from the master station device. Multi-directional time-division multiplexed wireless data including a plurality of slave stations for separating and selecting only data addressed to the own station from the data, and a plurality of slave station data terminals to which data from the slave stations are respectively input. A communication system, wherein the master station device includes: an error correction code generation unit that generates an error correction code for data from the master station data terminal device; and an error correction code from the data and the error correction code generation unit. Multiplexing means for multiplexing the data into specific different time slots and transmitting the multiplexed data to a specific time slot. 2. A plurality of master station side data terminal devices, a master station device for transmitting data from these data terminal devices in a time-division multiplexed manner, and receiving data transmitted from the master station device. Multi-directional time-division multiplexed wireless data including a plurality of slave stations for separating and selecting only data addressed to the own station from the data, and a plurality of slave station data terminals to which data from the slave stations are respectively input. In the communication system, the slave station device receives the data transmitted from the master station device in specific different time slots and an error correction code for the data, and the slave station device includes the master station device. Error correction code receiving means for receiving the error correction code from the station device, error correction code decoding means for decoding the error correction code received by the error correction code reception means, and error correction code Multidirectional time division multiplex radio data communications system which comprises an error correction means for performing error correction of the received data based on the decoded error-correcting code decoding means. 3. The error correction code decoding means according to claim 1, wherein said error correction code receiving means divides a bit sequence constituting said error correction code by a predetermined polynomial to generate a syndrome for said error correction code. 3. The multi-directional communication device according to claim 2, wherein a position where a bit error occurs in the received data is specified based on the syndrome, and the error correction means inverts a bit at the position where the bit error occurs. Division multiplex wireless data communication system. 4. The multi-way time-division multiplex wireless data communication system according to claim 1, wherein a time slot in which the error correction code is multiplexed is a specific empty time slot. 5. The apparatus according to claim 1, wherein the master station converts the input low-speed data into high-speed data, and the slave station converts the received high-speed data into low-speed data.
5. The multi-way time-division multiplexed wireless data communication system according to any one of 4 above.