JPH1140511A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device wherein desired impurity concentration distribution can be obtained readily. SOLUTION: A distance axis is divided equally into five and the same triangle 3 is arranged in all the five sections. A bottom side of the triangle is the equally divided distance axis and a vertex thereof is equal to maximum concentration of impurity concentration distribution 1. Then, an intersection point 4 between the impurity concentration distribution 1 and the five triangles 3 is obtained, and a space between two points generated from the same triangle 3 among points projected from each intersection point 4 to a distance axis is made a region 5a which is masked when impurities are introduced. A space between two points generated from adjacent triangles 3 is made a region 5b which is not masked and is subjected to ion implantation. Here, a dose of ion implantation is calculated from a product (Nmax.Tsoi) of maximum concentration (Nmax) of the impurity concentration distribution 1 and a film thickness (Tsoi) of an active silicon layer 2c. A heat process after ion implantation is set so that a characteristic diffusion length is 4 μm which is a bottom side of the triangle 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a method for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art FIG. 6 is a schematic sectional view showing a mask for obtaining an impurity concentration distribution 1 which monotonically changes in a plane direction of a semiconductor substrate 10 according to a conventional example, and FIG. 6 is a flowchart showing the design of the present invention. Conventionally, as a method of obtaining an impurity concentration distribution 1 that monotonously changes in the plane direction,
As shown in FIG. 6, the impurity concentration distribution 1 is obtained by adjusting the opening size of the resist 11 with respect to the monotonously changing impurity concentration distribution 1. That is, the opening size of the resist 11 is set to be narrow on the low concentration side and wide on the high concentration side.

[0005] The actual opening size is corrected so as to approach the target impurity concentration distribution 1 by repeating a simulation by trial and error starting from an empirically obtained one.

[0004]

The method of obtaining the impurity concentration distribution 1 which changes monotonically in the plane direction of the semiconductor substrate 10 by using the above-mentioned simulation is based on the fact that a conventional mask having a multilevel opening size is actually manufactured. In comparison with a method of obtaining a desired impurity concentration distribution after examining the impurity concentration distribution by experimental trial production, there is an advantage that the design can be made relatively accurately in a short time and in a short time.

However, the method using simulation has a problem that if the section distance of the impurity concentration distribution 1 and its profile are different, the impurity concentration distribution when the opening size is changed must be checked from the beginning. .

At that time, since the amount of impurity introduced and the diffusion process also exist as important parameters, there is a problem that the simulation including both of them requires a huge amount of work.

The present invention has been made in view of the above points, and an object of the present invention is to provide a method of manufacturing a semiconductor device which can easily obtain a desired impurity concentration distribution. .

[0008]

According to the first aspect of the present invention,
A mask having a plurality of openings having different opening dimensions is formed on a semiconductor substrate, impurity ions are implanted through the mask, and thermal diffusion is performed so that the impurity concentration monotonously changes in a plane direction. In the method of manufacturing a semiconductor device for forming a concentration distribution region, when determining the opening size of the mask, the region for forming the impurity concentration distribution of the semiconductor substrate is divided into a plurality of regions at equal intervals in a plane direction. Assuming that a congruent triangle having a region as a base is present in the region, the height of the triangle is set to be equal to or higher than the highest impurity concentration of the impurity concentration distribution line indicating the impurity concentration distribution, and the impurity concentration distribution line Of the intersections with the hypotenuse of the triangle, a mask is formed only between projection points formed by projecting the intersection with the hypotenuse of the same triangle on the semiconductor substrate. The size of the opening is determined, and the impurity concentration of the semiconductor substrate at the location where the opening is formed is a dose amount of impurity ions having an impurity concentration corresponding to the height of the triangle. And ion implantation is performed such that the diffusion distance of the impurity ions introduced by the ion implantation during thermal diffusion is substantially equal to the length of the base of the triangle.

According to a second aspect of the present invention, in the method of manufacturing a semiconductor device according to the first aspect, a mask is formed on the semiconductor substrate at least at a position adjacent to the low concentration side of the impurity concentration distribution region. It is a feature.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic view illustrating a method for forming a mask according to an embodiment of the present invention. Reference numeral 1 denotes an impurity concentration distribution in which an arbitrary wafer surface direction is taken on a distance axis (horizontal axis) and a concentration axis is taken on a vertical axis, and the concentration expressed is proportional to the distance. Note that both the vertical axis and the horizontal axis are linear axes.

An SOI (Silicon On Insul) comprising a support silicon substrate 2a and an active silicon layer 2c formed on the support silicon substrate 2a via a buried oxide film 2b.
ator) The thickness of the active silicon layer 2c on the substrate is 1 μm.
The breakdown voltage of an element partially including a lateral diode structure formed on the following SOI substrate is, for example, when the element is a diode, when the impurity concentration distribution 1 of the drift region has a linear distribution as shown in FIG. Another advantage is that the highest breakdown voltage can be secured as compared with other impurity concentration distributions.

Here, the impurity concentration of the drift region is set to be low on the anode side of the diode and high on the cathode side of the diode. The maximum concentration on the anode side is calculated from the target breakdown voltage, the thickness of the active silicon layer 2c, and the thickness of the buried oxide film 2b.

Hereinafter, a method for forming a mask according to this embodiment will be described. In the present embodiment, the drift distance when the position of the origin (the position of the lowest density) is set to zero is 20 μm, the density of the origin is on the order of 10 14, and the density at the maximum distance, that is, the origin Distance from is 2
The concentration at 0 μm (the highest concentration) is on the order of 10 17.

The drift distance used in the present embodiment,
The density at the origin and the density at the maximum distance are examples, and are not limited thereto.

First, the distance axis is divided into 5 equal parts and divided into 4 μm intervals. In all of these five sections, the same triangle 3 whose base is the distance axis divided into five equal parts and whose vertices are equal to the highest density is arranged.

Subsequently, intersection points 4 between the impurity concentration distribution 1 and the five triangles 3 are determined, and, of the points projected from each intersection point 4 on the distance axis, a point between two points generated from the same triangle 3 is used when introducing impurities. A region 5a to be masked is defined, and a region between two points generated by the adjacent triangle 3 is defined as a region 5b not masked.

Next, a photoresist 6 is coated on the active silicon layer 2c of the SOI substrate, and is exposed and developed, thereby forming a masked region 5a obtained by the above-described method.
Then, patterning is performed so that the photoresist 6 remains and the photoresist 6 in the unmasked region 5b is removed, and phosphorus (P) ions are implanted using the patterned photoresist 6 as a mask.

In this embodiment, phosphorus (P) is used as the ion source for implantation. However, the present invention is not limited to this. Other n-type impurities or p-type impurities such as boron (B) may be used. May be.

Here, the dose amount of the ion implantation depends on the maximum concentration (Nmax) shown in FIG.
It is calculated from the product (Nmax · Tsoi) of c with the film thickness (Tsoi).

The heat step after the ion implantation is set so that the characteristic diffusion length is 4 μm, which is the base of the triangle 3.
For example, in the case of phosphorus (P), the temperature is 1150 ° C. for 25 hours. Here, the characteristic diffusion length is an amount defined by 2√ (D · t), where D is a diffusion coefficient and t is a diffusion time.

FIG. 2 is a characteristic diagram showing a simulation result 7 of a relationship between a distance in a plane direction and an impurity concentration of a semiconductor device formed by the method for forming a mask according to the present embodiment. From FIG. 2, the simulation result is very close to the impurity concentration distribution 1, which is the target distribution, and it has been verified that the ideal breakdown voltage can be ensured.

In this embodiment, the triangles 3a and 3b
Are similar to each other, the ratio between the heights is equal to the ratio between the bases. Since the height corresponds to the target impurity concentration distribution and the bottom corresponds to the mask, the mask size is set in proportion to the size of the target impurity concentration distribution. Therefore, the dose of the ion implantation introduced per length of the base of the triangle is proportional to the size of the target impurity concentration distribution.

However, the concentration profile immediately after the ion implantation has a constant value only in the mask opening, that is, a distribution in which rectangular functions having the highest concentration of the target impurity concentration distribution are arranged. No.

Since the amount of the introduced impurity is proportional to the size of the target impurity concentration distribution only around the length of the base of the triangle, if most of the introduced impurity is diffused by that distance. It will be good. If the diffusion is shorter than this, the distribution shape will remain with the rectangular function, and if the diffusion is longer, the distribution will be uniform overall.

As described above, in this embodiment, a mask and a process for easily obtaining a desired impurity concentration distribution can be easily designed only by a drawing operation geometrically, and further, a mask size is required in a photolithography process. (For example, the minimum processing dimension is 1 μm), it can be easily handled by adjusting the length of the base of the triangle.

Here, in this embodiment, the impurity concentration distribution is defined in the drift region of 20 μm, and the impurity introduction outside this region is not defined. FIG.
As shown in FIG. 3A, if impurities are introduced outside the drift region 9 between the anode region 8a and the cathode region 8b, the impurity concentration distribution becomes outside the drift region 9 as shown in FIG. The density is on the order of 10 17. The concentration outside the drift region 9 of the element manufactured by the above-described method is designed to be a high concentration of 10 17 or more. For example, as shown in an anode region 8a and a cathode region 8b shown in FIG. If the density is on the order of 10.sup.19 or higher, the 10.sup.17th order is hidden and there is no problem. At this time, after forming the drift region 9, an impurity is introduced into the active silicon layer 2c to form the anode region 8a and the cathode region 8b. Actually, the device is shown in FIG.
It has been verified that a simple horizontal diode as shown in FIG.

By setting the mask outside the drift region 9 described above, the degree of freedom of the concentration design on the low concentration side is expanded, and it is possible to contribute to the high breakdown voltage of various elements.

In the case where a low-concentration region of the order of 10 17 or less is formed on the low-concentration side of the drift region 9,
When a p-type well region of the order of 10 17 is required adjacent to the low-concentration side of the drift region 9 such as a DMOSFET, a photoresist is formed on the low-concentration region and the portion where the p-type well region is formed. What is necessary is just to apply and to provide a mask. At this time, since the outside of the drift region 9 on the high-concentration side is designed to be on the order of 10.sup.19 or more in any element, there is no problem even if a mask is not provided.

In this embodiment, the peak height (Peak) of the triangle 3 is set to the highest concentration (Nma) of the impurity concentration distribution 1.
x), but need not be limited to this, and may be set higher than the maximum density (Nmax). For example, as shown in FIG. 4, Peak = 2 · Nmax You may make it double. However, in this case, the dose amount of the ion implantation is required to correspond to the vertex height (Peak) of the triangle 3. That is, Dose amount = Peak · Tsoi. FIG. 5 shows a simulation result at this time, and it was verified that an ideal withstand voltage can be ensured.

By removing the limit that the height setting of the triangle is equal to the maximum concentration, the dose amount of the ion implantation can be set high at the same time.
If the dose is adjusted to x) and the injection current becomes lower than the device limit and the injection becomes impossible due to the device capability,
By increasing the height of the triangles, problems in the device can be avoided, and a desired impurity concentration distribution can be obtained.

In all of the above embodiments,
Although a straight line is formed as the impurity concentration distribution 1, the present invention is not limited to this and can be applied to a curved line.

[0032]

According to the first aspect of the present invention, a mask having a plurality of openings having different opening dimensions is formed on a semiconductor substrate, impurity ions are implanted through the mask, and thermal diffusion is performed. In a method of manufacturing a semiconductor device in which an impurity concentration distribution region is formed such that an impurity concentration changes monotonically in a direction, when determining an opening size of a mask, regions where an impurity concentration distribution is formed in a semiconductor substrate are equally spaced in a plane direction. It is assumed that a congruent triangle having the region as the base is present in the region, and the height of the triangle is set to be equal to or higher than the highest impurity concentration of the impurity concentration distribution line indicating the impurity concentration distribution. An opening is formed such that a mask is formed only between the projection points formed by projecting the intersection of the concentration distribution line and the hypotenuse of the same triangle on the semiconductor substrate among the intersections of the hypotenuse of the triangle. The method is determined, and the impurity concentration of the semiconductor substrate at the location where the opening is formed is the dose of impurity ions at which the impurity concentration is equivalent to the height of the triangle, and ion implantation is performed on the semiconductor substrate through the mask. The diffusion distance during thermal diffusion of impurity ions introduced by implantation is
Since the length of the base is made substantially the same as the length of the base of the triangle, a method of manufacturing a semiconductor device capable of easily obtaining a desired impurity concentration distribution can be provided.

According to a second aspect of the present invention, in the method of manufacturing a semiconductor device according to the first aspect, a mask is formed on the semiconductor substrate at least at a position adjacent to the low concentration side of the impurity concentration distribution region. The degree of freedom in the concentration design on the side is expanded, and it is possible to contribute to increasing the breakdown voltage of various elements.

[Brief description of the drawings]

FIG. 1 is a schematic view illustrating a method for forming a mask according to an embodiment of the present invention.

FIG. 2 is a characteristic diagram showing a simulation result of a relationship between a distance in a surface direction and an impurity concentration of a semiconductor device formed by a mask forming method according to the embodiment;

FIG. 3 is a schematic view illustrating a method for forming a mask according to another embodiment of the present invention, and FIG. 3A is a schematic cross-sectional view illustrating a state where a photoresist formed on an active silicon layer is patterned. FIGS. 7B and 7B are characteristic diagrams showing simulation results of the relationship between the distance in the surface direction of the semiconductor device and the impurity concentration, and FIG. 8C is a schematic cross-sectional view showing the semiconductor device.

FIG. 4 is a schematic view illustrating a method for forming a mask according to another embodiment of the present invention.

FIG. 5 is a characteristic diagram showing a simulation result of a relationship between a distance in a plane direction and an impurity concentration of a semiconductor device formed by the mask forming method according to the embodiment;

FIG. 6 is a schematic cross-sectional view showing a mask for obtaining an impurity concentration distribution that monotonically changes in a plane direction of a semiconductor substrate according to a conventional example.

FIG. 7 is a flowchart showing the design of the mask according to the upper diagram.

[Explanation of symbols]

 Reference Signs List 1 impurity concentration distribution 2a support silicon substrate 2b buried oxide film 2c active silicon layer 3 triangle 4 intersection 5a masked region 5b unmasked region 6 photoresist 7 simulation result 8a anode 8b cathode 9 drift region 10 semiconductor substrate 11 resist

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Yuji Suzuki 1048 Kazuma Kadoma, Osaka Prefecture Matsushita Electric Works, Ltd. 72) Inventor Hitoshi Takano 1048 Kazuma Kadoma, Kadoma City, Osaka Inside Matsushita Electric Works, Ltd.

Claims (2)

[Claims] 1. A mask having a plurality of openings having different opening dimensions is formed on a semiconductor substrate, impurity ions are implanted through the mask, and thermal diffusion is performed, so that the impurity concentration is monotonically increased in a plane direction. In a method of manufacturing a semiconductor device in which an impurity concentration distribution region is formed so as to change, when determining an opening size of the mask, a region in the semiconductor substrate where the impurity concentration distribution is formed is formed by a plurality of regions equally spaced in a plane direction. Assuming that a congruent triangle having the region as the base is present in the region, the height of the triangle is set to be equal to or higher than the highest impurity concentration of the impurity concentration distribution line indicating the impurity concentration distribution, A mask is formed only between projection points formed by projecting the intersection of the same hypotenuse of the triangle among the intersections of the impurity concentration distribution line and the hypotenuse of the triangle on the semiconductor substrate. To determine the opening dimensions,
Impurity concentration of the semiconductor substrate at the location where the opening is formed, at a dose of impurity ions having an impurity concentration corresponding to the height of the triangle, ion implantation into the semiconductor substrate through the mask, A method of manufacturing a semiconductor device, wherein a diffusion distance of thermal diffusion of impurity ions introduced by the ion implantation is substantially equal to a length of a base of the triangle. 2. The method according to claim 1, wherein a mask is formed on the semiconductor substrate at a location adjacent to at least the low concentration side of the impurity concentration distribution region.