JPH113989A - Compound semiconductor transistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high performance compound semiconductor transistor, which is constituted of the epitaxial wafer of HEMT structure and which can improve mutual conductance without deteriorating electron mobility extent from a relation between the inclination direction of a compound semiconductor substrate and the forming direction of electrodes. SOLUTION: This compound semiconductor transistor is provided with a gate electrode 16, formed in a vertical direction with respect to an inclination direction obtained by inclining the substrate 1 by x-degrees in a prescribed crystal orientation which is direction from the face orientation [100] face of the compound semiconductor substrate 1, a source electrode 17 and a drain electrode 18, which are formed on both sides of the gate electrode 16. The direction of current flowing between the source electrode 17 and the drain electrode 18 is made parallel to the inclination direction.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compound semiconductor transistor comprising a transistor formed by forming electrodes on a wafer having an epitaxial structure epitaxially grown on a compound semiconductor substrate by metal organic chemical vapor deposition (MOVPE). Regarding improvement.

[0002]

2. Description of the Related Art Conventionally, MOVPE has been used on a compound semiconductor substrate.
When a wafer having an epitaxial structure is formed by epitaxial growth using the method, a plane orientation {100} is formed on the substrate.
When a just substrate having a flat surface is used, epitaxial growth tends to be island growth without performing step growth, and thus a protrusion called hillrock occurs, and a defect that a flat wafer surface cannot be obtained has been pointed out. Was.

For this reason, generally, the plane orientation {100}
At present, the compound semiconductor substrate is inclined about 2 ° in the crystal orientation <010> direction to address the above-mentioned drawback.

FIG. 5 is a diagram showing an index plane including a plane orientation {100} plane of the above-described conventional III-V group compound semiconductor.

[0005] Orientation flat OF of wafer
Is a plane orientation {01 ^* 1 ^* } (hereinafter, 1 ^* indicates an inversion of 1), a plane orientation {10> inclined in a crystal orientation <010> direction, which is a direction at an angle α = 45 ° with respect to OF.
This indicates that a substrate of 0 ° plane is used.

In this case, as is apparent from FIG. 5, the same applies to a substrate in which the crystal orientation indicating the tilting direction is the <01 ^* 0> direction.

A wafer having an epitaxial structure is formed on the above-mentioned substrate by epitaxial growth using the MOVPE method. FIG. 6 shows an example of an epitaxial wafer having a HEMT structure.

[0008] The compound semiconductor substrate 1 is made of semi-insulating GaAs.
Or InP, and the wafer of the epitaxial structure is
Undoped GaAs having a thickness of 500 nm is sequentially formed on the substrate 1.
Layer 2, undoped In _0.2 GaAs layer 3, 15 nm thick,
Undoped Al _0.2 GaAs layer 4 having a thickness of 2 nm, and n ⁺ Al _0.2 G having a thickness of 40 nm and a carrier concentration of 2 × 10 ¹⁸ cm ^-3
The aAs layer 5 is formed by lamination.

The substrate 1 has a {100} plane orientation in which the substrate 1 is inclined by 2 ° in the <010> direction.
When the orientation flat OF of a wafer as an aAs substrate is a plane orientation of {01 ^* 1 ^* } (1 ^* indicates an inversion of 1), a crystal orientation of α = 45 ° <
010> indicates that the substrate has a plane orientation of {100}.

In this case, as is clear from FIG. 5, the same applies to a substrate whose crystal orientation indicating the tilting direction is the <01 ^* 0> direction.

When the epitaxial wafer having the HEMT structure was observed with an atomic force microscope AMF, as shown in the photograph of FIG. 7, the crystal orientation <01 ^* 0> inverted from the crystal orientation <010> in which the substrate 1 was tilted. It can be seen that the step growth extends in the direction.

This phenomenon is generally called step bunching, which occurs when the compound semiconductor substrate is tilted.

In the direction perpendicular to the above-described step growth direction, that is, in FIG. 5, the surface orientation is scanned from the {001 ^* } plane to the {001} plane, ie, in the direction of the arrow in FIG. Observation results as shown in FIG. 8 are obtained.
The unevenness is about ± 2 nm, which corresponds to the number of 4 or 5 atomic layers.

The epitaxial wafer having the HEMT structure is
The thickness of the In _0.2 GaAs layer 3 as the electron transit layer is 1
There is a problem of about 5 nm, and the above-mentioned unevenness of about ± 2 nm hinders the traveling of electrons, resulting in a decrease in electron mobility.

When a transistor is formed by forming an electrode on a conventional epitaxial wafer, usually, as shown in FIG. 9, the orientation flat (OF) of the wafer is used.
Gate electrodes 10 and 13 in a direction perpendicular or parallel to
And source electrodes 11 and 14 and a drain electrode 1 on both sides thereof.
2, 15 are provided. Therefore, in this case, the gate electrodes 10 and 13 are not arranged perpendicularly to the <010> direction in which the substrate 1 is inclined.

With such a configuration, the gate electrode 10
However, electrons moving in the vertical direction are affected by the above-mentioned unevenness to a certain extent.

For these reasons, there has been a demand for a high-performance compound semiconductor transistor that does not lower the electron mobility even in a structure in which the compound semiconductor substrate is inclined.

[0018]

SUMMARY OF THE INVENTION The present invention, which meets the above-mentioned demands, is a transistor comprising an epitaxial wafer having a HEMT structure based on a tilt direction of a compound semiconductor substrate and a direction in which electrodes are formed. It is an object of the present invention to provide a high-performance compound semiconductor transistor, such as a HEMT or a FET, which can enhance the mutual conductance without causing the mutual conductance.

[0019]

In order to achieve the above object, the present invention provides a method for forming an electrode on a wafer having an epitaxial structure which is epitaxially grown on a compound semiconductor substrate by metal organic chemical vapor deposition (MOVPE). A compound semiconductor transistor constituting a transistor,
A gate electrode formed by tilting the substrate by x ° in a predetermined crystal orientation direction from a plane orientation of {100} and perpendicular to the tilt direction, and a source electrode and a drain electrode formed on both sides of the gate electrode. And the direction of the current flowing between the source electrode and the drain electrode is set to be parallel to the tilt direction.

[0020]

Embodiments of the present invention will be described below.

In FIG. 1, a substrate 1 having a plane orientation of {100} is used, is tilted in a crystal orientation <010> direction, and a gate electrode 16 is formed in a direction perpendicular to this inclination direction. A source electrode 17 and a drain electrode 18 are provided on both sides of the gate electrode 16.
To form

In this example, the angle x ° = 0.3 ° to 10 ° in the crystal orientation <010> direction which is the direction of the angle α = 45 ° with respect to the orientation flat OF of the wafer.
When tilted by °, the step growth extends in the direction of the angle α = 45 °.

When the electrons travel in the direction of the step growth, there is no scattering of the electrons due to the unevenness of the wafer surface, but the direction perpendicular to the direction of the angle α = 45 °, that is, the crystal orientation <0.
When electrons travel from the <01> direction to the crystal orientation (001 ^* ) direction, the effect of the unevenness is large and the electrons are scattered. Therefore, the gate electrode 16 is formed in parallel to the traveling direction of the electrons, and the source electrode 17 and the drain electrode 18 are formed on both sides of the gate electrode 16 to minimize the influence of the unevenness.

Thus, a high electron mobility was obtained. At this time, the direction of the current flowing between the source electrode and the drain electrode is parallel to the tilt direction.

FIG. 2 shows an example in which the substrate 1 having a {100} plane orientation tilted in the crystal orientation <011> direction is used, and the gate electrode 16 is formed in a direction perpendicular to the tilt direction. A source electrode 17 and a drain electrode 18 are formed on both sides thereof. The direction of the gate electrode 16 is parallel to the orientation flat OF of the wafer.

In FIG. 3, a substrate 1 having a {100} plane orientation tilted in the <011 ^* > crystal orientation direction is used, and a gate electrode 16 is formed in a direction perpendicular to the tilt direction. A source electrode 17 and a drain electrode 18 are formed on both sides thereof. The direction of the gate electrode 16 is perpendicular to the orientation flat OF of the wafer.

Therefore, in both FIGS. 2 and 3,
An existing process photomask can be used as it is, and the cleavage direction of the substrate with respect to the transistor chip does not change, so that there is no problem in separating the chip.

FIG. 4 shows a HEMT structure wafer epitaxially grown on a GaAs substrate 1 having a {100} plane orientation inclined by 2 ° in the crystal orientation <011> direction. An example in which three transistors 21, 22, and 23 are formed in the c direction is shown.

The transistor 21 in the direction a shows the structure of the compound semiconductor transistor of the present invention shown in FIG.
The transistor 22 in the direction indicates a conventional transistor, and the transistor 23 in the direction c is an FET for high breakdown voltage.
1 shows a configuration example of a compound semiconductor transistor of the present invention having a HEMT structure. The gate length at this time is 0.3 μm.
When the electron mobility is high, the transconductance Gm also increases, but the electron mobility of the transistor alone cannot be measured. Therefore, the transconductance Gm was measured and the three transistors 21, 22, and 23 were compared.

As a result, the G of the transistor 21 in the a-direction
m: 75 mS, Gm of the transistor 22 in the b direction: 68
The Gm of the transistor 23 in the mS and c directions was measured to be 61 mS.

The value of Gm of the transistor 21 of the present invention is:
A value approximately 10% higher than the value of Gm of the conventional transistor 21 was obtained.

The transistor 23 has a lower value of the mutual conductance Gm than the other transistors 21 and 22, but has a higher withstand voltage because a current hardly flows near the threshold voltage Vth. Utilizing this effect, FE for high withstand voltage
A compound semiconductor transistor having a T, HEMT structure can be obtained.

[0033]

According to the present invention, there is provided a transistor comprising an epitaxial wafer having a HEMT structure, wherein the transconductance is reduced without lowering the electron mobility due to the relationship between the tilt direction of the compound semiconductor substrate and the direction in which the electrodes are formed. A high-performance, high-performance compound semiconductor transistor that can be increased can be obtained.

[Brief description of the drawings]

FIG. 1 is a diagram showing an arrangement of gate, source, and drain electrodes with respect to a tilt direction of a wafer when electrodes are formed on an epitaxial wafer and transistors are formed according to an embodiment of the present invention.

FIG. 2 is a diagram showing an arrangement of gate, source, and drain electrodes with respect to a tilt direction of an epitaxial wafer according to another embodiment of the present invention.

FIG. 3 is a diagram showing an arrangement of a gate, a source, and a drain electrode with respect to an inclination direction of an epitaxial wafer according to still another embodiment of the present invention.

FIG. 4 is a diagram for comparing and measuring the transconductance Gm.
FIG. 2 is an arrangement diagram of two types of compound semiconductor transistors of the present invention and one type of conventional transistor arranged on the same wafer.

FIG. 5 is a view showing an index plane including a {100} plane orientation of a group III-V compound semiconductor.

FIG. 6 is a sectional configuration diagram of an epitaxial wafer having a HEMT structure grown epitaxially.

FIG. 7 is an observation diagram showing that step growth extends in the crystal orientation direction when the compound semiconductor substrate is tilted.

FIG. 8 is a diagram showing observation results corresponding to measured irregularities on the substrate surface when scanning is performed in a direction perpendicular to the step growth direction shown in FIG. 7;

FIG. 9 is a diagram showing an arrangement of gate, source and drain electrodes when a transistor is formed by forming an electrode on a conventional epitaxial wafer.

[Explanation of symbols]

 Reference Signs List 1 compound semiconductor substrate 16 gate electrode 17 source electrode 18 drain electrode

Claims (4)

[Claims] 1. A compound semiconductor transistor in which electrodes are formed on a wafer having an epitaxial structure which is epitaxially grown on a compound semiconductor substrate by metal organic chemical vapor deposition (MOVPE) to form a transistor. The substrate in a predetermined crystal orientation direction from the
A gate electrode formed in a direction perpendicular to the tilt direction and a source electrode and a drain electrode formed on both sides of the gate electrode, and a direction of a current flowing between the source electrode and the drain electrode. In a direction parallel to the tilt direction. 2. The method according to claim 1, wherein the substrate is shifted from the {100} plane by x.
The inclination direction is the crystal orientation <010> direction or <01>
The compound semiconductor transistor according to claim 1, wherein 1> direction. 3. The method according to claim 1, wherein the compound semiconductor substrate is GaAs or I
nP, the epitaxial structure wafer is formed on the substrate in the order of AlGaAs, InGaAs, InGa
3. The compound semiconductor transistor according to claim 1, wherein P, InGaAsP, and AlInGaP are stacked. 4. The tilt angle of the substrate tilted by x ° is:
The compound semiconductor transistor according to claim 1, wherein the angle is 0.3 ° to 10 °.