JPH113918A - Semiconductor chip sorting system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To sort chips by standards and to effectively utilize chips which are sorted as defectless chips by lowering specifications and, at the same time, to enable the sorting and assemblage of the chips by standards by taking the variation of measured values in the same test item into consideration. SOLUTION: A semiconductor chip sorting system, which can make level discrimination at every test item is constituted of an LSI tester 21 which tests the electrical characteristics of a semiconductor chip, a wafer 22 having a chip to be sorted, a probe card 23 which becomes a needle to be brought into contact with the pad of an IC, a prober 24 which aligns the wafer with the card 23, and a plurality of inkers 25 for discriminating the defectless/defective state of the chip. By providing the inkers which apply sorting marks, the inkers or the ink injection amounts of the inkers are selected for each level of measured values for each test item. Therefore, each chip can be sorted by standards from the color or quantity of the ink injected which is applied by means of a selected inker.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor chip sorting system capable of determining a level for each test item.

[0002]

2. Description of the Related Art In a conventional semiconductor chip sorting process for wafers, a wafer is set on a prober which is an automatic wafer transfer device installed in conjunction with an LSI tester, and individual semiconductor chips are separated using a probe card. A signal transmission needle is set up on the input / output pad of the device, and various tests of DC, AC, and function are performed. If at least one of the items does not fall within the measurement standard value, a failure judgment signal from the LSI tester is received. Ink has been applied to the vicinity of the center of the target chip as a defect recognition mark for the semiconductor chip from the inker installed in the prober. vice versa,
If the test results fall within the measurement standard, all the products are selected as non-defective products irrespective of the variation in the measurement results, and are thereafter uniformly treated as semiconductor chip products having the same characteristics in the subsequent process.

[0003]

However, in such a conventional technique, there is a problem that all chips that deviate even slightly from the standard values in the test items are treated as defective products. Chips that do not operate according to the expected function can be treated as defective, of course.
Among chips that fail in the DC and AC tests and do not exhibit the expected characteristic value, there are chips that can be made non-defective by spec-down according to the usage conditions such as operating temperature and operating voltage. If it is attempted to select non-defective chips by such a specification down, it is necessary to create a test program corresponding to each specification, and it becomes difficult to perform an efficient chip selection operation. In addition, for a memory product or the like, a sorting operation by an operation speed test is required again after assembly, which leads to a delay in delivery due to extra operation.

[0004]

Means for solving the above problems will be described below.

[0005] (Means 1) An ink jet amount adjusting function is provided on an inker, which is a pass / fail judgment marker, and the ink jet amount is set according to the measured value in each test item, and the ink jet amount is set on each chip in a wafer. It is characterized in that it is possible to select each standard according to the difference in the determined ink amount.

(Means 2) A plurality of inkers serving as pass / fail judgment markers are provided, ink of a different color is set in each of the inkers, and the inker is selected according to the measurement value in each test item. It is characterized in that it is possible to select each standard according to the difference in the color of ink applied on each chip in the wafer.

(Means 3) By using the inkers described in the means 1 and 2 together and adjusting the inker to be selected according to the measured value in each test item and the ink jetting amount thereof, each of the chips on the wafer is printed. It is characterized in that it is possible to select each standard based on the difference between the applied ink color and the ink amount.

[0008]

According to the above-mentioned structure of the present invention, it is possible to efficiently use a chip which has been conventionally discarded as a defective product as a non-defective product, and to consider a variation in measured values within the same test item. Sorting and assembly according to the standard becomes possible.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment according to the present invention will be described. FIG. 1 is a wafer view after ink application. Here, as an example, a method of step selection for a certain operation speed standard will be described. When selecting a certain semiconductor product, for example, 100 MHZ specification and 77 MHZ
Consider a case where two types of product development with specifications are possible. In the current test system which has only one inker and cannot control the amount of ink, 100 MHZ or 77 M
The test is performed only for the HZ test standard, ink is applied as a mark of a defective product to a chip that does not satisfy the standard, and the wafer is sent to a subsequent process. In this case, for example, when sorting is performed according to the 77 MHZ standard, a chip that can be sold at a higher price as a product conforming to the 100 MHZ operation standard is included in the products processed as non-defective products. By controlling the ink ejection amount of the inker in several steps according to the measurement value in each test item according to the present invention, the wafer 11 having the chips to be sorted can be controlled by one step.
A complete non-defective chip 12 that passes all test items including the 00MHZ operation standard, a chip 13 that can be handled as a non-defective product that passes all other test standards by spec-down to the 77MHZ operation standard, and a defective chip 14 are applied. It is possible to perform multi-stage sorting of each chip based on the amount of ink that has been used, and it is also possible to enable automatic sorting processing in a subsequent process.

FIG. 2 is an apparatus diagram of a semiconductor chip sorting system according to the present invention. This system includes an LSI tester 21 for testing the electrical characteristics of semiconductor chips, a wafer 22 having chips to be sorted, a probe card 23 serving as a needle for contacting an IC pad, and a prober for aligning the wafer with the probe card. 24, a plurality of inkers (the ink ejected from each inker is different) 25 for identifying pass / fail. A selected inker or ink ejection amount is defined in the test program in accordance with the test result of each chip in the LSI tester and its measured value level. The result of the electrical characteristic test by the LSI tester is transferred to the inker, and the selection of the inker and the ink ejection amount are determined for each chip according to the content of the failure or the measured value level. Is applied on the chip, and multi-stage sorting becomes possible. As an example, assuming a system in which there are two types of inkers and two-stage control of the amount of ink,
It becomes possible to select five or more types of standards, such as the operating speed standard, the leak current standard, and the operating voltage standard exemplified above.

According to the embodiments of the invention described above, it becomes possible to select chips that can be made into products by changing product specifications and standards due to variations in the wafer, etc., thereby substantially improving yield and reducing costs. In addition, it is possible to reduce man-hours in a post-process.

In the embodiments of the present invention described above, the description has been made regarding the type of the inker according to the color of the ink. However, the same effect can be obtained by changing the type of the ink.

[0013]

By adopting the present configuration of the present invention,
Chips can be distinguished for each test item according to specifications and standards, and multi-stage chip sorting according to the purpose of use becomes possible. By performing such multi-stage sorting, it is possible to effectively use chips that can be non-defective due to specification down. As described in the example of the embodiment of the present invention, since the 77 MHz operation IC that did not satisfy the original 100 MHZ standard and was discarded as a defective product can be shipped as a non-defective product, this is the cost of the entire product. Will be reduced. Also, even if the test result is within the measurement standard,
Efficient sorting and assembling can be performed in consideration of the variation in the measurement results, and a product can be shipped according to each characteristic in a short delivery time.

Further, the semiconductor chip sorting system of the present invention has a plurality of inkers and ejects inks of different colors in each of the inkers, so that there is an effect that sorting with less errors can be performed.

[Brief description of the drawings]

FIG. 1 is a view of a wafer after ink application of the present invention.

FIG. 2 is a device diagram of a semiconductor chip sorting system of the present invention.

[Explanation of symbols]

 ... Wafers 12, 13, 14... Chips sorted by standard 21... LSI tester 22... Wafer 23... Probe card 24.・ ・ Prober 25 ・ ・ ・ ・ ・ Inker

Claims (4)

[Claims] An L for judging pass / fail of all chips on a wafer.
A semiconductor chip sorting system for performing a level judgment for each test item in an SI tester. 2. The semiconductor chip sorting system according to claim 1, wherein the inker, which is a pass / fail judgment marker, has an ink ejection amount adjusting function. 3. The semiconductor chip sorting system according to claim 1, further comprising a plurality of level determination inkers, wherein each of the inkers ejects a different color ink. 4. The semiconductor chip sorting system according to claim 1, wherein the ink jet having an ink jetting amount adjusting function according to claim 2 and a plurality of ink jets according to claim 3 for jetting inks of different colors. A semiconductor chip sorting system characterized by having both.