JPH11347785A - Solder for die-bonding semi-conductor, its tape and semi-conductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solder by which the thickness of the solder to die-bond a semi-conductor element to a heat radiation substrate is made to be a specified value by providing the solder containing Sn, Ag, Cu and P of the specified weight ratio and the balance Pb of the specified weight ratio. SOLUTION: A solder has the composition consisting of, by weight, 2.5-10% Sn, 0.5-5% Ag, 0.1-1% Cu, 0.005-0.5% P, and the balance >=80%Pb. A Ni-Sn or Cu-Sn intermetallic compound is preferably dispersed in the solder. An aluminum wire lead 7 is bonded to a semi-conductor 4' while the semi-conductor element 4 is welded to a lead frame 1 high in heat conductivity with a solder 2, and mold-packaged with an epoxy resin 5. The lead frame 1 forming a heated substrate is formed of a Cu alloy with Ni-plating thereon. The Cu-Sn or Ni-Sn intermetallic compound particles are interposed between the lead frame 1 and the semi-conductor element 4 to absorb the heat fatigue by blending at least one of Cu and Ni to the solder 2.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a novel semiconductor die bonding solder, and more particularly to a semiconductor die bonding solder used for mounting a semiconductor pellet on a heat dissipation substrate in the manufacture of a semiconductor device such as a power transistor. And a semiconductor device using the same.

[0002]

2. Description of the Related Art In the structure of a semiconductor device such as a power transistor, as shown in FIG. 4, a solder 2 is supplied onto a heat radiating substrate 1, and after melting the solder, a semiconductor pellet 4 adsorbed and held by a collet 6 is formed. The semiconductor pellet is mounted on a heat-dissipating substrate by placing the semiconductor pellet on a molten solder with a predetermined load.

[0003] JP-A-58-215289 discloses Sn1-1.
0%, Ag 1-26%, Cu 0.4-3% and balance Pb
Is known. Further, Japanese Patent Application Laid-Open No. 61-273296 discloses Sn5-60
%, 0.1 to 15% of Bi, 0.05 to 1% of Ge, 0.1% of Te.
0.05-1%, Ca 0.05-1%, Ni 0.01-0.05
%, P0.01 to 2%, Pd0.01 to 0.3%, Cu0.
Corrosion-resistant solders containing one or more of 0.01 to 0.5% and 0.01 to 3% of Ag and having a balance of Pb and used for assembling radiators for automobiles and the like are known.

[0004]

A conventional semiconductor device is:
Finally, it is necessary to set the thickness of the solder interposed between the heat dissipation substrate and the semiconductor pellet to a predetermined value in order to ensure heat dissipation. The solder material used above is generally Pb-S
n-type and Sn-Sb type, but Sn-Sb type is Pb-
Since it has a lower melting point and is harder than a Sn-based material, it is not suitable as a solder material for a semiconductor device in a high-temperature environment such as an automobile, which is an object of the present invention. Further, even when a Pb-Sn-based solder material is used, in the manufacture of a semiconductor device, when a semiconductor pellet is placed on a molten solder by a collet, even if a fixed amount of solder is supplied onto the heat dissipation substrate, the semiconductor is not supplied from the collet. Variations in the load applied to the pellets cause variations in the thickness of the solder. That is, if the load due to the collet is too large, the solder in which the semiconductor pellets have melted is pushed too much to the outer periphery, and as a result, the thickness of the solder becomes small. When the thickness of the solder is reduced, the amount of solder having a function of buffering the difference in the thermal expansion coefficient between the heat dissipation board and the semiconductor pellet is reduced, and the difference in the thermal expansion coefficient acts directly on the solder to cause cracks. The cause is a decrease in heat dissipation. Conversely, if the load due to the collet is too small, the molten solder will be cured as it is, and the thickness of the solder will remain large. If the thickness of the solder is large, sufficient heat dissipation cannot be ensured. in this way,
If the thickness of the solder varies, there is a problem that the reliability of the manufactured semiconductor device is significantly reduced in terms of heat dissipation.

The solder disclosed in Japanese Patent Application Laid-Open No. 58-215289 has insufficient reliability, and the solder disclosed in Japanese Patent Application Laid-Open No. 61-273296 has another problem in reliability.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor die bonding solder which can ensure a desired thickness of a solder when a semiconductor element is die-bonded to a heat dissipation substrate, a tape thereof, and a semiconductor device using the same. It is in.

[0007]

According to the present invention, the solder for semiconductor die bonding of the present invention is Sn 2.5 to 10% by weight, Ag
0.5 to 5%, Cu 0.1 to 1%, P 0.005 to 0.5%
And the balance is 80% or more, preferably 85 to 95%,
More preferably 90-95% Pb solder; Sn
2.5-10%, Ag 0.5-5%, Ni 0.1-1%,
Pb containing 0.005 to 0.5%, with the balance being Pb
And Sn 2.5 to 10%, Ag 0.5 to 5
%, The sum of Cu and Ni is 0.1 to 1%, and P 0.005 to 0.5%.
5%, with the balance being a solder material having the same Pb as described above. In the present invention, it is desirable that fine particles of Ni-Sn or Cu-Sn intermetallic compound be contained in the solder in a uniformly dispersed state. Further, the present invention provides a semiconductor die bonding tape having the above-described solder composition, and further, using this tape, a semiconductor element is mounted and joined on a lead frame serving as a heat dissipation board, except for a portion serving as an external terminal of the lead frame. , A semiconductor device entirely covered with resin.

[0008] In the Pb-Sn solder material, Sn is added to improve the mechanical strength of the solder itself.
If it is less than wt%, sufficient strength cannot be secured and 1
If it exceeds 0 wt%, the solder material becomes brittle and plastic working becomes difficult, so the practical range is usually 2.5 to 10 wt%. A
When g is added in an amount of 2 to 5 wt%, the melting point of the solder increases, so that it can be used as a high-temperature solder. However, from the viewpoints of workability, finish and economy, a solder containing 0.5 to 2 wt% of Ag is usually used. Therefore, the mixing ratio of Ag in the present invention is set to 0.5 to 5 w
t%. In the present invention, Ni and Cu are essential components in addition to Sn and Ag. When Ni and Cu are added, an intermetallic compound is naturally generated in the solder material. However, in this case, the intermetallic compound is uniformly dispersed in the solder tape, and the interface between the substrate and the solder material when mounting is performed. No intermetallic compound layer is formed. In general, when a semiconductor pellet is mounted on a lead frame serving as a heat radiating substrate using Pb-Sn solder, Ni-Sn and plating are applied to the interface between the substrate and the solder material when the substrate is Ni-plated. Cu-Sn in the case of a lead frame not subjected to
Is formed. Since all of these intermetallic compound layers are mechanically hard and brittle, the solder reduces the difference between the coefficient of thermal expansion of the substrate and the coefficient of thermal expansion of the semiconductor pellet when the layer grows more than necessary due to the thermal history after bonding. It becomes impossible, and defects such as cracks occur near the joint interface between the substrate and the solder. However, the present invention has already
Since the intermetallic compound of —Sn or Cu—Sn is generated and the thermal history at the time of mounting and thereafter does not grow the above-mentioned intermetallic compound layer, it does not hinder the maintenance of the reliability of the semiconductor device. . In addition, since the intermetallic compound particles are uniformly dispersed and contained in the solder material, when the semiconductor element is mounted on a lead frame serving as a heat radiating board via solder, the heat radiating board and the semiconductor element are connected to each other. The thickness of the solder material can be ensured by the fine particles of the intermetallic compound in the solder material in between. Further, as a secondary effect of finely dispersing the intermetallic compound, improvement in the high-temperature strength of the solder material can also be mentioned. N
If the amount of i and Cu or each of the sums is less than 0.1 wt%, the amount of intermetallic compound particles is small, and if it exceeds 1 wt%, coarse particles of the intermetallic compound are formed in the solder material and become brittle. Is 0.1 to 1 wt%. Also, Ni
The solder material to which Cu and Cu are added has reduced wettability and spreadability on the substrate, but this can be improved by further adding P. The concentration of P which can improve the wet spreading property is 0.0.
It is 0.5 to 0.5 wt%, and slightly contains impurities such as Bi and Fe of 0.1% or less.

[0009]

(Embodiment 1) FIG. 1 is a sectional view of a power transistor according to the present invention, and FIG. 2 is a perspective view thereof.

In FIGS. 1 and 2, reference numeral 1 denotes a lead frame made of a copper alloy also serving as a heat radiating substrate, 4 denotes a semiconductor element which is a silicon element, and the copper lead frame 1 is drawn out to enhance the heat radiating effect of the semiconductor element 4. The lead side 8 is made of a different thickness material having a different thickness. Reference numeral 2 denotes solder for attaching the semiconductor element 4, and reference numeral 7 denotes a wire lead for passing a current through the semiconductor element 4, which is usually an aluminum wire. 5 is a molded resin. As shown in FIG. 2, the lead frame 1 shown in FIG. 1 has a plurality of lead-out leads 8 which are divided into several terminals and serve as terminals. FIG. 1 and FIG. 2 show a shape in which the diver portion is cut off.

The semiconductor element 4 is fused to a lead frame 1 made of a copper material having a high thermal conductivity by means of solder 2, and then a wire lead 7 made of an aluminum wire is bonded to the semiconductor element 4 by an ordinary ultrasonic wave. 5 to form a mold package.

A lead frame 1 serving as a heat dissipation board is made of a Cu alloy plated with Ni.

In this embodiment, when the semiconductor element 4 is mounted on the lead frame 1 serving as a heat dissipation board, the composition of the solder material 2 is Sn 2.5 to 10% by weight and Ag 0.5 to 0.5%.
5%, at least one of Cu and Ni is 0.1 to 1%,
The point is that a solder material composed of 0.005 to 0.5% P and the balance Pb is used. By mixing Cu and Ni into the solder material, Cu-Sn or Ni-Sn intermetallic compound particles are interposed between the heat dissipation substrate and the semiconductor pellet, so that a desired solder thickness can be secured, and the heat cycle of the transistor is reduced. Can absorb thermal fatigue. In this structure, a heat dissipating substrate is made of a Cu alloy material or a Cu alloy material plated with Ni.

Hereinafter, test results of the die bonding solder according to the present invention and a semiconductor device using the same will be described.

[0015] Ni and P are mixed in a solder material composed of Pb-5% Sn-2.5% Ag in the composition shown in Table 1, placed in a graphite crucible, melted in the air in a high frequency induction heating furnace, and then melted.
The ingot was cast into a mold. The ingot was extruded, rolled, and punched, and finally rolled and cut to obtain a 4 mm long, 0.1 mm thick solder tape. These solder tapes were interposed between a semiconductor alloy and a heat-dissipating substrate in which a Ni alloy was plated on a Cu alloy material and a Cu alloy material, heated at about 380 ° C., and mounted to manufacture the above-described semiconductor device. Solder wettability tests for mounting these semiconductor devices and thermal fatigue tests in which the semiconductor devices are heated to 150 ° C. and cooled to room temperature are repeated 1000 times. The occurrence situation was examined. Table 1 shows the results.
Shown in

[0016]

[Table 1]

As shown in Table 1, those containing neither Ni nor P have good solder wettability, but cracks occur. This is N
The inclusion of i eliminates the occurrence of clutches, but deteriorates solder wettability. Further, those having a high P of 0.7% and a high Ni of 1.5% have poor solder wettability.
Cracks will occur even if it is as low as 5%.

Example 2 Pb-5% instead of Example 1
Table 2 shows Cu and P in the solder material composed of Sn-2.5% Ag.
Was placed in a graphite crucible, melted in the air in a high-frequency induction heating furnace, and then cast into a mold to form an ingot. The ingot is extruded, rolled, and punched, and finally rolled and cut to obtain a length and width of 4 mm.
A 0.1 mm thick solder tape was obtained. These solder tapes were interposed between a semiconductor alloy and a Cu alloy material and a heat-dissipating substrate in which a Cu alloy material was subjected to Ni plating, and heated at about 380 ° C. to mount a semiconductor device. A thermal fatigue test in which the solder wettability test at the time of mounting these semiconductor devices and a heat cycle test in which the semiconductor devices are heated to 150 ° C. and cooled to room temperature is repeated 1000 times is performed. The occurrence situation was examined. Table 2 shows the results.

[0019]

[Table 2]

As shown in Table 2, the effects of the Cu content and the P content were almost the same as the relationship between the Ni content and the P content.

(Example 3) Pb-5% as in Example 1
Ni, Cu and P are added to the solder material composed of Sn-2.5% Ag.
Was blended in the composition shown in Table 3, placed in a graphite crucible, melted in the air in a high-frequency induction heating furnace, and then cast into a mold to form an ingot. From the ingot, through extrusion, rolling, and punching, and finally rolling and cutting,
A 4 mm wide, 0.1 mm thick solder tape was obtained. 38. These solder tapes are interposed between a semiconductor alloy and a Cu alloy material and a heat radiating substrate in which a Cu alloy material is subjected to Ni plating and a semiconductor pellet.
The semiconductor device was fabricated by heating at about 0 ° C. and mounting. A thermal fatigue test in which the solder wettability test at the time of mounting these semiconductor devices and a heat cycle test in which the semiconductor devices are heated to 150 ° C. and cooled to room temperature is repeated 1,000 times is performed, and the solder wettability and cracks in the solder joints in each of them are performed. The occurrence situation was examined. Table 3 shows the results.

[0022]

[Table 3]

As apparent from Table 3, when the compounding amounts of Ni and Cu are less than 0.1 wt% or more than 1 wt%, respectively, there arises a problem in either solder wettability at the time of mounting or crack generation at the joint. Similarly, if the sum of the amounts of Ni and Cu is less than 0.1 wt% or more than 1 wt%, there is a problem in either solder wettability at the time of mounting or cracking at the joint. Therefore, the sum of the amounts of Ni and Cu and the amount of Ni and Cu is 0.1 to 1 wt%.
Is appropriate. The addition of P has an effect on the solder wettability during mounting, and the optimum concentration range is 0.0.
It is in the range of 0.5 to 0.5 wt%.

Example 4 The reliability of a semiconductor device (power transistor) using the solder for die bonding of the present invention obtained in Example 1 was evaluated. This is because, under the condition that the temperature difference between the PN junction and the room temperature becomes 100 ° C., a voltage is applied between the base and the emitter of the transistor to perform intermittent operation, the thermal resistance is measured, and the change (ΔV _BE ) is measured. The life was determined by measuring. The result is shown in FIG. In the figure, the horizontal axis represents the number of intermittent operations, and the vertical axis represents the rate of change of ΔV _{BE over} a certain period of time after the operation of the transistor was stopped, which is 1.3 times the initial value.
If it changes twice or more, it is determined that a failure has occurred. As is clear from the figure, the conventional solder (Pb-5 wt% Sn-2.5 wt%)
Ag) fails in about 5000 intermittent operations, whereas the solder (Pb-5w
t% Sn-2.5 wt% Ag-0.5 wt% Cu-0.1
power transistor using wt% P)
Elongation more than doubled. The same tendency was observed for the solder of the present invention in which Ni was mixed and in which both Ni and Cu were mixed in appropriate amounts. The cross section of the sample after this test was polished, and the solder joint was observed. As a result, Ni-
It was confirmed that Sn or Cu-Sn intermetallic compound particles were concentrated in the lower part of the semiconductor pellet. This means that when a semiconductor pellet is mounted on a heat dissipation substrate using the solder tape of the present invention, Ni-Sn or Cu-Sn intermetallic compound particles dispersed in the solder are interposed between the heat dissipation substrate and the semiconductor pellet. Therefore, it is considered that the thickness of the solder could be regulated to a predetermined value by the fine particles.

(Embodiment 5) The solders described in Embodiments 1 to 3 are manufactured into a tape having a required thickness by rolling and wound. Then, it is cut into strips to a required length at the time of use, and then the strip-shaped solder member is further drawn to form a thinner tape. As a result, a solder tape having a predetermined thickness is manufactured, cut into the same shape as the planar shape of the semiconductor element, and placed on a portion where the semiconductor element is joined using a vacuum chuck, and the element is placed thereon. Die bonding is also performed by placing and melting the solder. At least one of Ni and Cu has a content at which the above-mentioned intermetallic compound is formed.

(Embodiment 6) FIG. 4 shows a semiconductor chip bonding step in a method of manufacturing a power transistor.
(A) is a plan view, and (b) is a sectional view of a part thereof.
The wafer in which the power transistor elements are formed in the previous step of the semiconductor device manufacturing process is divided into individual pellets in the dicing step to become the semiconductor elements 4. The separated semiconductor element 4 is vacuum-adsorbed to the collet 6 and picked up in a pickup step. The picked-up semiconductor element 4 is supplied to the pellet bonding step by moving the collet 6 by an appropriate moving device. The structure of the collet 6 is such that a ventilation tube 9 is connected to the upper surface of the pellet holder whose lower surface is open and whose upper surface is closed, and the ventilation tube 9 is connected to a vacuum source (not shown). Then, the semiconductor element 4 is suction-held on the lower surface of the collet holder by vacuum suction. At this time, collet 6
The semiconductor element 4 is attracted to the chip by slightly projecting below the lower surface of the collet 6. In the pellet bonding, the collet 6 which has vacuum-adsorbed the semiconductor element 4 is transferred to the lead frame 1 by a moving device, and is pressed and soldered on the molten solder arranged on the lead frame. Due to the pressing load at this time, the molten solder escapes in all directions, so that the desired solder thickness cannot be secured with the conventional solder. However, when the semiconductor element 4 is soldered (mounted) by using the solder material of the present invention, the solder Since the Ni-Sn or Cu-Sn intermetallic compound particles dispersed therein are interposed between the lead frame 1 and the semiconductor element 4, the fine particles can regulate the thickness of the solder to a predetermined value.

[0027]

According to the present invention, when the semiconductor pellet is mounted on the heat radiating substrate via the solder member by containing fine intermetallic compound particles dispersed in the solder member, the heat radiating substrate is Since fine particles in the solder member are interposed between the semiconductor elements, it is possible to secure a desired thickness of the solder member with the particles, and the reliability of the semiconductor device is greatly improved. Furthermore, the soldering material used in the present invention ensures the same handling properties as the conventional soldering material, while increasing the adhesive strength and dramatically improving the reliability.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a semiconductor device of the present invention.

FIG. 2 is a perspective view of a semiconductor device of the present invention.

FIG. 3 is a characteristic diagram showing an intermittent operation test result of the semiconductor device of the present invention.

FIGS. 4A and 4B are a plan view and a sectional view showing a mounting state of a semiconductor pellet using the solder tape of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Lead frame, 2 ... Solder, 4 ... Semiconductor element, 6 ...
Collet, 7 ... wire lead.

Claims (6)

[Claims] (1) Sn 2.5 to 10% by weight, Ag 0.5 to 5
A solder for semiconductor die bonding, comprising 5%, 0.1 to 1% of Cu and 0.005 to 0.5% of P, with the balance being 80% or more of Pb. 2. 2.5% by weight of Sn and 0.5% by weight of Ag.
A solder for semiconductor die bonding, comprising 5%, Ni 0.1% to 1%, and P 0.005 to 0.5%, with the balance being 80% or more of Pb. 3. 2.5% by weight of Sn and 0.5% by weight of Ag.
5%, the sum of Cu and Ni is 0.1 to 1%, P 0.005 to
A solder for semiconductor die bonding, comprising 0.5% and the balance being 80% or more of Pb. 4. The solder for semiconductor die bonding according to claim 1, wherein a Ni-Sn or Cu-Sn intermetallic compound is dispersed inside the solder. 5. A semiconductor die bonding tape comprising the solder according to claim 1. 6. A lead frame, wherein a semiconductor element is joined to a lead frame serving as a heat dissipation board by the semiconductor die bonding solder according to any one of claims 1 to 5, except for a portion serving as an external terminal of the lead frame. And a semiconductor device, wherein the semiconductor element is covered with a resin.