JPH1134399A - Image recording apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a color recording apparatus preventing the color shift caused by a recording head when a color image is recorded in an overlapped state to realize desired color reproduction in low cost. SOLUTION: An RAM 49a storing image data, an L-address counter 49b, an address memory 49C, an H-address counter 49d, an M-adder 49e and an H-adder 49f are provided to a memory 49 storing image data. Correction value data is stored in the address memory 49c preliminarily as address data and the address data is outputted to the M-adder 49e by the output of the L-address counter 49b. The H-address counter 49d performs up-counting from an initial address value and the upper order of output is sent to the H-adder 49f and the lower order of output is sent to the M-adder 49e. The M-adder 49e adds the output value of the address memory 49c and that of the H-address counter 49d and the addition result is sent to the RAM 49a. The H-adder 49f adds the output value of the H-address counter 49d and the carrier signal of the M-adder 49e to send the addition result to the RAM 49a.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image recording apparatus for forming a color image by sequentially recording images of a plurality of colors on a recording medium.

[0002]

2. Description of the Related Art Conventionally, as a color recording apparatus of this type, each of yellow, magenta, cyan, and black image forming means having a recording head in which recording elements are arranged in a line is provided, and a recording medium is used as a recording element. Are transported in a direction orthogonal to the arrangement direction of the color image data, and a color image is sequentially recorded in line units using yellow, magenta, cyan, and black toners based on each color image data. As described above, since the toners of different colors are sequentially transferred onto the same recording medium by the image forming units of the respective colors in a superimposed manner, if the image forming units are attached to be shifted from their regular positions, the color misregistration will occur. As a result, desired color reproduction cannot be realized, and the image quality is reduced.

The types of the color misregistration include a misregistration of the recording head in the sub-scanning direction, a misregistration of the recording head in the main scanning direction, and the fact that the recording head is disposed obliquely with respect to the recording medium. And deviation due to linearity disorder caused by a problem in manufacturing the recording element.

The positional deviation of the recording head in the sub-scanning direction and the positional deviation of the recording head in the main scanning direction are corrected by electrically adjusting the scanning timing of the image data to the recording head.
The inclination shift has been performed by adjusting the mounting position and angle of each image forming unit and recording head. The deviation caused by the disorder of the linearity of the recording element has been dealt with by further improving the manufacturing accuracy of the recording element or selecting a high-precision recording element.

[0005]

However, in the above-described conventional printing apparatus, the displacement of the recording head in the main scanning direction and the displacement in the sub-scanning direction can be easily adjusted electrically, There is a problem that a high-precision mechanism and an enormous adjustment time are required to correct the displacement. That is, it is necessary to improve the mounting position accuracy of the print head and the like, and to provide an adjustment mechanism to perform the adjustment work by trial and error while checking the color shift amount of the print result. It was very expensive.
In addition, in order to prevent the linearity of the recording head from being disturbed, each element of the recording head is assembled with high accuracy, or a high-precision one is selected after manufacturing, so that the yield of the recording head deteriorates, As a result, there arises a problem that a very expensive recording head must be used. In order to solve the above problems, a color recording apparatus provided with a low-cost color misregistration prevention means has been desired.

[0006]

In order to solve the above-mentioned problems, the present invention has a memory means for writing and reading image data, and an image extending in the main scanning direction and read from the memory means. In an image recording apparatus in which a plurality of recording units for forming an image in accordance with data are arranged in a conveying direction of a recording medium, a correction value corresponding to a shift amount in the sub-scanning direction of the plurality of recording units and a shift amount between the plurality of recording units. Correction value setting means for setting an address, and address control means for controlling an address of the memory means based on the correction value of the correction value setting means, wherein the address control means sets an address when reading image data from the memory means. Or the address is controlled when the image data is written to the memory means.

According to the present invention having the above-described configuration, when an image is formed in a recording section, an address for writing image data to a memory section is determined by an address control section based on a correction value corresponding to a shift amount of the recording section. Since the control is performed or the address at which the image data is read from the memory means is controlled, a recording result in which the displacement of the recording unit is corrected can be obtained.

[0008]

Embodiments of the present invention will be described below with reference to the drawings. Elements common to the drawings are denoted by the same reference numerals. FIG. 1 is a control block diagram showing a first embodiment of the present invention, FIG. 2 is a structural diagram showing a color image recording apparatus of the first embodiment, and FIG. FIG.

In FIG. 2, the color recording apparatus 1 has 4
A set of printing mechanisms P1, P2, P3, and P4 are arranged in order from the recording medium insertion side to the ejection side. First printing mechanism P
A first printing mechanism P2, a third printing mechanism P3, and a fourth printing mechanism P4 are electrophotographic LED (light emitting diode) printing mechanisms and have the same configuration. First printing mechanism P
Reference numeral 1 denotes an image forming unit 2, an LED head 3 for exposing a photoreceptor to be described later according to image data, and a transfer roller 4 for transferring a toner image formed by the image forming unit 2 to a recording medium.
It consists of.

The image forming section 2 includes a photosensitive member 6 rotating in the direction of arrow a about a shaft 5, a charging roller 7 for uniformly charging the surface of the photosensitive member 6, and a developing section 8. The developing unit 8 includes a developing roller 8a, a developing blade 8b, a sponge roller 8c, and a toner tank 8d. The non-magnetic one-component toner supplied from the toner tank 8d passes through the sponge roller 8c, reaches the developing blade 8b, is thinned on the periphery of the developing roller 8a, and reaches the contact surface with the photosensitive member 6. The toner is frictionally charged by being strongly rubbed by the developing roller 8a and the developing blade 8b when the thin layer is formed. In this embodiment, it is assumed that the toner is frictionally charged to a negative polarity. The sponge roller 8c conveys an appropriate amount of toner to the developing blade 8b. The developing roller 8a is made of a semiconductive rubber material.
When the toner runs out, the toner tank 8d
Is replaced, the toner can be newly supplied.

The LED head 3 comprises an LED array and this LE
A substrate 3a on which a drive IC for driving the D array is mounted, a selfoc lens array 3b for condensing the light of the LED array, and the like. Then, the surface of the photoconductor 6 is exposed to form an electrostatic latent image on the surface of the photoconductor 6. The toner on the periphery of the developing roller 8a adheres to the electrostatic latent image portion by electrostatic force to visualize the image.
A carrier belt 9 described later is movably disposed between the photoconductor 6 and the transfer roller 4.

The developing device 8 of the first printing mechanism P1 contains yellow (Y) toner, the developing device 8 of the second printing mechanism P2 contains magenta (M) toner, and the third printing mechanism P3 The developing device 8 of the fourth printing mechanism P4 contains cyan (C) toner, and the developing device 8 of the fourth printing mechanism P4 contains black (B) toner. Further, the yellow image signal of the color image signal is input to the LED head 3 of the first printing mechanism P1, the magenta image signal of the color image signal is input to the LED head 3 of the second printing mechanism P2, and the third The cyan image signal of the color image signal is input to the LED head 3 of the printing mechanism P3, and the black image signal of the color image signal is input to the LED head 3 of the fourth printing mechanism P4. The image forming section 2 of the first printing mechanism P1, the image forming section 2 of the second printing mechanism P2, the image forming section 2 of the third printing mechanism P3, and the image forming section 2 of the fourth printing mechanism P4 are attached to the case 40. As shown in FIG. 3, they are integrally formed in one color image forming unit 15, but the present invention is not limited to this.

In FIG. 1, members 18 and 19 position the color image forming unit 15 in the color recording apparatus 1, and the color image forming unit 15 can be attached to and detached from the color recording apparatus 1. In FIG. 3, a window 40a of each LED head 3 is formed in the case 40 of the color image forming unit 15. Also,
Guide pin holes 40b and 40c for each LED head 3 are provided, so that each LED head 3 can be positioned with respect to the color image forming unit 15.

The carrier belt 9 is made of a high-resistance semiconductive plastic film, is formed into a seamless endless shape, and is wound around a driving roller 11, a driven roller 10, and a tension roller 12. The resistance value of the carrier belt 9 is set so that a recording medium 27 described later can be electrostatically attracted to the carrier belt 9 and static electricity remaining on the carrier belt 9 when the recording medium 27 is separated from the carrier belt 9 can be neutralized. Range.
The driving roller 11 is connected to a motor (not shown), and the motor rotates the driving roller 11 in the direction of arrow b. The tension roller 12 is urged by a spring (not shown) in the direction of arrow c, whereby the carrier belt 9 is always tensioned. The upper surface 9a of the carrier belt 9 is provided with each printing mechanism P
1, P2, P3, and P4 are stretched between the photoconductor 6 and the transfer roller 4. The cleaning blade 13 is pressed against the drive roller 11 with the carrier belt 9 interposed therebetween. The cleaning blade 13 is made of a flexible rubber or plastic material. The tip of the cleaning blade 13 is pressed against the carrier belt 9 to remove residual toner adhering on the surface of the carrier belt 9 to a waste toner tank 14. To be cut off. In this embodiment, the photoconductor 6 and the transfer roller 4 are in contact with the carrier belt 9.

In FIG. 2, a paper feed mechanism 20 is provided at the lower right side of the color recording apparatus 1. The paper feed mechanism 20 includes a paper storage cassette, a hopping mechanism, and a registration roller. The paper storage cassette includes a recording medium storage box 21, a push-up plate 22, and pressing means 23. The hopping mechanism includes a discriminating means 24, a spring 25, and a paper feed roller 26,
With this hopping mechanism, the recording medium 27 is
The guide roller 29 is guided to reach a pair of registration rollers 30 and 31. First, the recording medium 27 stored in the recording medium storage box 21 is pressed against the paper feed roller 26 via the push-up plate 22 by the pressing means 23 and the spring 2
5, the sheet is discriminated one by one by the discriminating means 24 pressed against the sheet feeding roller 26. When the paper feed roller 26 is rotated in the direction of arrow e by a motor (not shown) in this state, the recording medium 27 sandwiched between the paper feed roller 26 and the discrimination means 24 is guided by guides 28 and 29,
Reach one. Further, when the registration rollers 30, 31 are rotated in the direction of arrow f by a motor (not shown), the recording medium 2 is rotated.
7 is guided to a carrier belt 9.

A charger 32 is provided on the upper surface 9a of the carrier belt 9 between the registration rollers 30, 31 and the first printing mechanism P1. The charging device 32 is connected to the sheet feeding mechanism 20.
The recording medium 27 sent by the printer is charged and electrostatically attracted to the upper surface of the carrier belt 9. Charger 3
A photo-interrupter 60 for detecting the leading end of the recording medium 27 is provided in front of 2. A static eliminator 33 is provided on the upper surface of the drive roller 11 via the carrier belt 9. This static eliminator 33 is attracted to the carrier belt 9 and
This removes the charge of the recording medium 27 that has been sent, cancels the attracted state, and facilitates separation from the carrier belt 9. A photointerrupter 61 for detecting the rear end of the recording medium 27 is provided on the left side of the static eliminator 33.

Further, on the left side of the static eliminator 33, a guide 3 is provided.
4 and a fixing device 35 are provided. The fixing device 35 fixes the toner image on the recording medium 27 to which the toner image has been transferred by being conveyed by the carrier belt 9. The fixing device 35 heats the toner on the recording medium 27 and the recording medium together with the heat roller 36. And a pressing roller 37 for pressing the pressing roller 27. A discharge port 38 is provided on the left side of the fixing device 35, and a discharge stacker 39 is provided outside the discharge port 38. The printed recording medium 27 is discharged to the discharge stacker 39.

Next, a control system according to the present embodiment will be described. Note that, in FIG. 1, symbols Y, M, C, and B are the first symbols.
Printing mechanism P1, second printing mechanism P2, third printing mechanism P3,
It corresponds to each printing mechanism of the fourth printing mechanism P4. In the figure, reference numeral 41 denotes a control circuit which comprises a microprocessor or the like and controls the operation of the entire color printing apparatus 1. Control circuit 4
1 includes an SP bias power supply 42Y, 42M, 42C, 42B for supplying power to the sponge roller 8c of the developing unit 8 of each of the printing mechanisms P1, P2, P3, and P4.
DB bias power supplies 43Y, 43M, 43 for supplying power to the developing rollers 8a of the developing devices 8 of P1, P2, P3, P4
C, 43B, charging power supplies 44Y, 44M for supplying power to the charging roller 7 of each of the printing mechanisms P1, P2, P3, P4.
44C, 44B, a transfer power supply 4 for supplying electric power for charging the transfer roller 4 of each of the printing mechanisms P1, P2, P3, P4.
5Y, 45M, 45C, and 45B are respectively connected.

The control circuit 41 includes a charging power supply 46 for supplying charging power to the adsorption charging device 32,
A power supply for static elimination 47 that supplies high-voltage electric power for static elimination to 3 is connected. Each of the power supplies described above is on / off controlled by an instruction from the control circuit 41.

Further, the control circuit 41 controls each printing mechanism P1,
Print control circuits 48 respectively corresponding to P2, P3, and P4
Y, 48M, 48C and 48B are connected. These print control circuits 48Y, 48M, 48C, 48B receive the image data from the memories 49Y, 49M, 49C, 49B and transmit these data to the LED head 3 according to an instruction from the control circuit 41. The exposure time of the LED is controlled to control the formation of an electrostatic latent image on the surface of the photoconductor 6. The memories 49Y, 49M, 49C, and 49B store image data sent from an external device via the interface unit 50.

The interface unit 50 separates image data transmitted from an external device, for example, a host computer for each color, and stores yellow image data in a memory 49Y.
, The magenta image data is stored in the memory 49M, the cyan image data is stored in the memory 49C, and the black image data is stored in the memory 49B.

The fixing device driver 51 drives a heater (not shown) in the heat roller 36 so as to keep the temperature of the heat roller 36 in the fixing device 35 constant. The motor drive circuit 52 includes a motor 53 for rotating the paper feed roller 26,
Registration rollers 30, 31, each printing mechanism P1, P2, P
3, P4 photoconductor 6, charging roller 7, developing roller 8a,
The motor 54 that rotates the sponge roller 8c, the transfer roller 4, the drive roller 10, and the heat roller 36 is driven. The rollers rotated by the motor 54 are connected by a gear or a belt (not shown). The sensor receiver driver 55 drives the photo-interrupters 60 and 61, receives the output waveforms from them, and sends them to the control circuit 41.

Reference numeral 56 denotes a deviation in the main scanning direction and the sub-scanning direction for each color, a tilt due to the mounting state of the LED head, and L.
This is a correction value memory as correction value setting means for storing each correction value for correcting a color shift due to disturbance of linearity of the ED array. The correction value memory 56 is a nonvolatile memory such as an EEPROM (electrically erasable and programmable).
The correction value can be written or read by the control circuit 41.

The timing generator 64 is composed of a programmable counter or the like, and generates pulse signals such as a clock signal CK, a load signal LD, and a line signal LS, which will be described later, in accordance with an instruction from the control circuit 41. Memory 49Y, 49M, 49C, 49B
To each element shown in FIG. It is sent to each circuit in FIG. 1 as needed. The clock signal CK (Y), the load signal LD (Y), and the line signal LS (Y) relate to yellow and are sent to the memory 49Y, and the clock signal CK
(M), load signal LD (M), line signal LS (M)
Is related to magenta and sent to the memory 49M, and the clock signal CK (C), load signal LD (C), and line signal LS (C) are related to cyan and sent to the memory 49C, and the clock signal CK (B) and load Signal LD
(B), the line signal LS (B) relates to black and is sent to the memory 49B.

The test pattern generation circuit 67 generates test pattern image data described later. The test pattern image data is stored in the memories 49Y, 49M, 49C, 4C through the interface unit 50 in accordance with an instruction from the control circuit 41.
9B, and the print control circuits 48Y, 48M, 4
8C and 48B so that the test pattern can be printed. The test switch 68 instructs the start of printing the test pattern.

Next, the memory 49 will be described. FIG. 4 is a block diagram of the memory 49. Memory 49
Since Y, 49M, 49C, and 49B have the same configuration, an example will be described. In FIG. 4, reference numeral 49a denotes a RAM (random access memory) which transfers image data from the interface unit 50 via a data bus B1 to a write signal W
It is written at the timing of R0. The written image data is transferred to the data bus B1 at the timing of the read signal RD0.
Is sent to the print control unit 48 via the. The L address counter 49b is reset by the line signal LS, the count value starts from “0”, and the clock signal CK
Counts up at the timing of and outputs to the bus B2.
The data is sent to the RAM 49a and the address memory 49c. The address memory 49c is configured by a RAM, and stores predetermined address data in advance. The address memory 49c outputs the predetermined address data stored at the address specified by the bus B2, which is the output of the L address counter 49b, to the bus B3 at the timing of the read signal RD1.

The H address counter 49d loads the initial address value sent from the control circuit 41 by the load signal LD, starts counting from the initial address value, and counts up at the timing of the line signal LS.
The lower part of the output is output to the bus B4 and sent to the M adder 49e. The upper part of the output is output to the bus B5 and the H adder 49
f. M adder 49e is connected to bus B2 and bus B4
And outputs the result of the addition to the bus B6 and sends it to the RAM 49a. H adder 49f is connected to bus B5
Is added to the carry signal Cy of the M adder 49e, and the addition result is output to the bus B7 and sent to the RAM 49a. Carry signal Cy of M adder 49e is a signal generated when the addition result overflows. Therefore, when an adder 49f generates a carry signal,
The value of the bus B5 is added by +1.

The output of the L address counter 49b specifies the lower address, the output of the M adder 49e specifies the middle address, the output of the H adder 49e specifies the upper address, and the RAM 49a
Writes and reads image data at addresses specified by the buses B2, B6, and B7 as described above. The bus B3, which is the output of the address memory 49c, is connected to the control circuit 41, and the control circuit 41 outputs the write signal W via the data bus B3.
The predetermined address data can be written to the address specified by the L address counter 49b at the timing of R1.

FIG. 5 shows an arrangement of image data to be recorded in the RAM 49a. The frame in the figure corresponds to one byte (8 bits) of image data. Here, in order to simplify the description, the LED head 3 is 12
It is assumed that an LED array for 8 dots, that is, 16 bytes is provided. Therefore, in the present embodiment, the RAM 49a
Is composed of image data of 16 bytes (128 columns) in the main scanning direction and n scans in the sub-scanning direction. The image data of the first scan includes addresses (0.0), (0.1), ..., (0.1).
5), and the image data of the second scan is stored in the address (1.
, (1.1),..., (1.15), and the image data of the third scan is stored at addresses (2.0), (2.0).
1), (2.2),..., (2.15). Similarly, if necessary, the image data up to the 263rd scan is stored in the RAM 49a at the address in order. In the address (i, n) in the figure, n is a lower address, that is, a byte address corresponding to a column in the main scanning direction,
i indicates an upper address, that is, a scanning line address in the sub-scanning direction. The image data is transmitted to the LED head 3 in each scanning unit.

As can be seen from FIGS. 4 and 5, the L address counter 49b has an address in the main scanning direction, that is, the first address.
A byte address of 0 to 15 (4 bits in this example) corresponding to 128 columns is designated, and an address in the sub-scanning direction is designated by the address memory 49d and the H address counter 49e.

The upper part of FIG.
The arrangement of the array is shown. In manufacturing the LED head 3, when the LED array chip is mounted on the substrate 3a, the linearity of the LED array chip is disturbed as shown in FIG. In the example shown in the figure, it is curved upward, but depending on the manufacturing, it may be curved downward, inclined in an oblique direction, and various linearity disturbances may occur. If the four LED heads 3 are used in the color image recording apparatus 1 in this state, it is apparent that color shift occurs in the sub-scanning direction on printing. According to the investigation by the present inventors, the error amount of the disturbance of the linearity is ± 150 μm or less, and the inclination error when the LED head 3 is attached to the color recording apparatus 1 is ± 15 μm.
0 μm or less, the mounting pitch error between the LED heads 3 is also ±
If it is about 150 μm, the manufacture of the LED head 3 and the device mechanism can be easily realized.

For example, if the resolution of the color recording apparatus 1 is 30
When 0 DPI (DOT PER INCH) is set, the error of the linearity disorder is ± 2 dots (line) or less, the inclination error is ± 2 dots (line) or less, and the mounting pitch error is ± 3 dots (line) or less. I do. That is, the total error amount is ± 7 lines. FIG. 5 shows an example in which the disturbance in the sub-scanning direction of the LED head 3 is MAX4 lines. The arrangement of the LED heads 3 shown in FIG.
The disturbance of the ED array is expressed as a resolution in the sub-scanning direction in units of a pitch of one dot (line). LED array units LM1, LM2, LM3, LM4, L shown in FIG.
M5, LM6, and LM7 indicate respective sections divided according to the disorder of the linearity of the LED head 3.

In the frame of the solid portion in the RAM arrangement in FIG.
It is assumed that the image data of the first line to be exposed by the LED head 3 is stored. The addresses of the filled portions are the same as those of the LED array portions LM1, LM2, LM3, L
This indicates an address where the scanning is shifted in accordance with the shift in the sub-scanning direction of M4, LM5, LM6, and LM7. In the upper address part of the address of the solid part, that is, the first scanning address (0.0), (0.1), ..., (0.1)
5), address (1.0), (1.1) of second scan,
..., (1.15), third scan address (2.0),
(2.1),... (2.14), (2.15), address of the fourth scan (3.0), (3.1),..., (3.5),
And (3.12), (3.12), ..., (3.15),
Addresses of the fifth scan (4.0), (4.1), (4.
2) and (4.6), and (4.12), (4.13),
(4 · 14), (4 · 15), address of the sixth scan (5
.14), (5.15), 7th scan address (6.1
5) stores non-exposure data “0”.

The image data of the second line to be exposed by the LED head 3 is stored at the address immediately below the solid portion. That is, addresses (6.0), (6
1), (6.2), (5.3), (5.4), (5.
5), (4.6), (4.7), (4.8), (4.
9), (4 · 10), (4 · 11), (5 · 12),
(6.13), (7.14), (8.15) LED
The image data of the second line to be exposed by the head 3 is stored. Similarly, each address immediately below each address where the image data of the second line is stored is LE.
The image data of the third line to be exposed by the D head 3 is stored.

First, the image data at the addresses (0.0), (0.1),..., (0.15) in the first scanning in the sub-scanning direction in FIG. Since the image data of the first scan is “0” which is not exposed, it is not exposed by the LED head 3. Next, the photosensitive drum 6 is rotated by one line in the direction of arrow a, and similarly, image data of the second scan in the sub-scanning direction is transmitted to the LED head 3 for exposure. Since the image data of the second scan is also all “0”, there is no exposure by the LED head 3. The photosensitive drum 6 is rotated by one line in the direction of arrow a, and the image data of the third scan in the sub-scanning direction is
Although transmitted to the head 3, the image data of the third scan is also all “0”, so that no exposure is performed by the LED head 3. Then, the photosensitive drum 6 is rotated by one line in the direction of arrow a, and similarly, the image data of the fourth scan in the sub-scanning direction is transmitted to the LED head 3 for exposure. As a result, the addresses (3.6), (3.7),
(3.8), (3.9), (3.10), (3.11)
Image data of the LED array unit LM3 of the LED head 3
Exposes the photosensitive drum 6. Other LED array part LM
1, LM2, LM4, LM5, LM6, and LM7 are not exposed because the non-exposure data "0" is sent.

Next, the photosensitive drum 6 is rotated by one line in the direction of the arrow a, and similarly, the image data of the fifth scan in the sub-scanning direction in FIG. Thereby, the addresses (4.3), (4.4),
The image data of (4.5) is exposed on the photosensitive drum 6 by the LED array section LM2 of the LED head 3, and the LED array section L is formed by the image data of the address (4.12) of the filling section.
The photosensitive drum 6 is exposed in M4. Also, the address (4
6), (4.7), (4.8), (4.9), (4.1)
Since (0) and (4 · 11) are the image data of the second line, the image data of the second line is simultaneously exposed by the LED array unit LM3. Other LED array part LM
1, LM5, LM6, and LM7 are not exposed because the non-exposure data "0" is sent.

Here, the LED array section LM3, the LED array section LM2, and the LED array section LM4 are shifted by one line in the sub-scanning direction, and the first
After the exposure of the image data of the line, the photosensitive drum 6 is rotated by one line in the direction of the arrow a, so that the image data of the first line previously exposed by the LED array LM3 and the current LED array The image data of the first line exposed by the LED array unit LM4 is aligned on the photosensitive drum 6 in a straight line.

Further, the photosensitive drum 6 is moved by one line with an arrow a.
The image data of the sixth scan in the sub-scanning direction in FIG. 5 is transmitted to the LED head 3 for exposure. This allows
Addresses (5 · 0), (5
The image data of (1) and (5.2) are the L of the LED head 3
In the ED array section LM1, the address (5.1
The image data of 3) is the LED array portion L of the LED head 3.
The photosensitive drum 6 is exposed at M5, and the addresses (5.3), (5.4), (5.5) and (5.1) of the second line are exposed.
The image data of 2) is exposed by the LED array unit LM2 and the LED array unit LM4, and the LED array unit LM3 outputs the addresses (5.6), (5.7) and (5) of the third line.
8), (5.9), (5.10), and (5.11) image data are exposed, and the LED array units LM6 and LM7 are not exposed because non-exposure data "0" is sent. .

The photosensitive drum 6 is rotated by one line in the direction of arrow a, and the image data of the seventh scan in the sub-scanning direction of FIG. Accordingly, the LED array unit LM1 supplies the addresses (6.0), (6) of the second line.
The image data of (1) and (6.2) are exposed, and the LED array unit LM2 exposes the addresses (6.3) and (6) of the third line.
The image data of (4) and (6.5) are exposed, and the LED array unit LM3 exposes the addresses (6.6) and (6) of the fourth line.
・ 7), (6.8), (6.9), (6/10), (6
・ Exposure of the image data of 11) to the LED array unit LM4
Exposes the image data of the address (6.12) on the third line, the LED array unit LM5 exposes the image data of the address (6.13) on the second line, and exposes the first line. Address of the shaded area (6.1
The image data of 4) is exposed, and the LED array section LM7 is not exposed because the non-exposure data is "0".

Further, the photosensitive drum 6 is moved by one line with an arrow a.
The image data of the eighth scan in the sub-scanning direction in FIG. 5 is transmitted to the LED head 3 for exposure. This allows
The LED array unit LM1 supplies the address (7 ·
0), (7.1) and (7.2) are exposed,
The LED array unit LM2 is connected to the address (7 ·
3) Expose the image data of (7.4) and (7.5)
The LED array unit LM3 supplies the address (7.
6), (7.7), (7.8), (7.9), (7.1)
0) and (7-11), the LED array unit LM4 exposes the image data of the fourth line address (7.12), and the LED array unit LM5 exposes the third line address ( Expose the image data of 7 ・ 13) and LE
The D array unit LM6 stores the address of the second line (7.1
The image data of 4) is exposed, and the LED array unit LM7 exposes the image data of the address (7.15) on the first line of the solid portion.

As described above, the image data of the first line of the solid portion is exposed on the photosensitive drum 6 in a straight line by delaying the exposure timing in accordance with the amount of the linearity disorder and the amount of inclination of the LED array. Will be done. Similarly, the image data of the second and subsequent lines is also exposed on a straight line. That is, even if the linearity of the LED array of the LED head 3 is disturbed as shown in the upper part of FIG. 5, the disturbance can be corrected. The detailed operation will be described later.

The operation of the first embodiment having the above configuration will be described below. First, a series of printing operations of the present apparatus will be briefly described. When the power of the color recording apparatus 1 (not shown) is turned on, the control circuit 41 executes predetermined initial settings, and then drives the fixing driver 51 to keep the heat roller 36 in the fixing device 35 at a predetermined temperature. Warm up. The control circuit 41 controls so that the heat roller 36 is always kept at a constant temperature. Heat roller 3
When the temperature reaches a predetermined temperature, the control circuit 41 drives the motor 54 via the motor drive circuit 52, rotates the drive roller 11, and moves the carrier belt 9 in the direction of arrow d. When the carrier belt 9 is fed for a little longer than one rotation, the motor 54 is stopped, and the movement of the carrier belt 9 is stopped. As a result, residual toner and dust adhering on the surface of the carrier belt 9 are scraped off to the waste toner tank 14 by the cleaning blade 13. Thus, the initialization of the color printing apparatus 1 is completed, and the apparatus waits for image data to be sent from an external apparatus via the interface unit 50.

When image data transmitted from an external device, that is, a host computer, is received through the interface unit 50, the control circuit 41 issues an instruction to the interface unit 50 and each of the memories 49Y, 49M, 49C, and 49B. By this instruction, the interface unit 50
Decomposes the received image data signal for each color, and stores the image data for each color in each memory 49Y, 49M, 49C, 4
9B. That is, the yellow image data is stored in the memory 49Y, and the magenta image data is stored in the memory 49M.
The cyan image data is stored in the memory 49C, and the black image data is stored in the memory 49B. Each of the memories 49Y, 49M, 49C, and 49B stores one page of image data of each color to be printed on the recording medium 27.

The operation of printing image data from this state will be briefly described. The control circuit 41 drives the motor 53 via the motor drive circuit 52 to rotate the paper feed roller 26. The paper storage box 2 is rotated by the rotation of the paper feed roller 26.
Only one recording medium 27 is sent to the guides 28 and 29, and the motor drive circuit 52 is controlled so that the recording medium 27 is transported slightly longer than the distance at which the leading end of the recording medium 27 reaches the registration rollers 30 and 31. As a result, the recording medium 27 is slightly bent by pressing the leading end between the registration rollers 30 and 31, and the skew of the recording medium 27 is corrected by this bending.

Next, the control circuit 41 includes a motor drive circuit 52
The motor 54 is driven via the
1. The photoconductor 6, the charging roller 7, the developing roller 8a, the sponge roller 8c, the transfer roller 4, the driving roller 11, and the heat roller 36 of the fixing device 35 of each of the printing mechanisms P1, P2, P3, and P4 are respectively rotated. At the same time, in order to supply voltages to the charging roller 7, the developing roller 8a, and the sponge roller 8c of each of the printing mechanisms P1, P2, P3, and P4, the control circuit 41 controls the charging power supplies 44Y and 44, respectively.
M, 44C, 44B, DB bias power supplies 43Y, 43
M, 43C, 43B, SP bias power supplies 42Y, 42
M, 42C and 42B are turned on. As described above, the surface of the photoconductor 6 of each of the printing mechanisms P1, P2, P3, and P4 is uniformly charged via the charging roller 7, and each of the printing mechanisms P1, P2,
P3, P4 sponge roller 8c and developing roller 8a
Is charged to a predetermined high voltage.

Next, the control circuit 41 issues a command to the memory 49Y storing the yellow image data, and transfers the yellow image data for one line from the memory 49Y to the first memory 49Y.
This is transmitted to the print control circuit 48Y of the printing mechanism P1. The printing control circuit 48Y of the first printing mechanism P1 changes the image data sent from the memory 49Y into a form that can be transmitted to the LED head 3 of the first printing mechanism P1 by a command from the control circuit 41, Transmit to head 3. The LED head 3 turns on an LED corresponding to the sent image data, and forms one line of an electrostatic latent image on the surface of the charged photoconductor 6 according to the image data. Thus, 1
The yellow image data sent from the memory 49Y for each line is formed into an electrostatic latent image on the surface of the photoconductor 6 one after another, and the yellow image data corresponding to the length in the sub-scanning direction is formed into a latent image, and exposure is performed. finish.

On the surface of the photoconductor 6 on which the electrostatic latent image is formed,
Yellow toner adheres to the charged developing roller 8a. With the rotation of the photoconductor 6, the electrostatic latent images are successively developed with yellow toner. When the leading end of the recording medium 27 reaches between the photosensitive member 6 and the transfer roller 4, the control circuit 4
1 turns on the transfer power supply 45Y of the first printing mechanism P1. Thus, the toner image on the surface of the photoconductor 6 is electrically transferred onto the recording medium 27 by the transfer roller 4. Due to the rotation of the photoconductor 6, the toner images are sequentially transferred onto the recording medium 27, and a one-page yellow image is recorded on the recording medium 27.
Is transferred to Thus, the transfer of the yellow toner image onto the recording medium 27 by the first printing mechanism P1 is completed. Then, when the rear end of the recording medium 27 reaches between the photoconductor 6 and the transfer roller 4, the control circuit 41 determines that the transfer power supply 45Y, the charging power supply 44Y, and the SP power supply of the first printing mechanism P1.
The bias power supply 42Y and the DB bias power supply 43Y are turned off.

The carrier belt 9 is continuously moving,
The recording medium 27 is provided between the first printing mechanism P1 and the second printing mechanism P1.
Then, the magenta toner image is transferred by the second printing mechanism P2.

The control circuit 41 issues a command to the memory 49M storing the magenta image data, and transmits one line of magenta image data from the memory 49M to the print control circuit 48M of the second printing mechanism P2. . The printing control circuit 48M of the second printing mechanism P2 converts the image data sent from the memory 49M according to a command from the control circuit 41,
The data is transmitted to the LED head 3 in a form that can be transmitted to the LED head 3 of the second printing mechanism P2. LED head 3
Turns on the LED corresponding to the sent image data, and forms one line of an electrostatic latent image corresponding to the image data on the charged photoreceptor 6 surface. In this manner, the magenta image data sent from the memory 49M for each line is sequentially formed into an electrostatic latent image on the surface of the photoconductor 6, and the magenta image data corresponding to the length in the sub-scanning direction is latently formed. The image is formed and the exposure is completed. Hereinafter, the operation relating to the transfer of magenta is the same as that of the above-described yellow, and the description is omitted.

The recording medium 27 further includes a second printing mechanism P2
To the third printing mechanism P3, and then the transfer of the cyan toner image by the third printing mechanism P3 is performed. When the transfer of the cyan toner image is completed, the recording medium 27 moves from the third printing mechanism P3 to the fourth printing mechanism P4, and then moves to the fourth printing mechanism P4.
The transfer of the black toner image is performed by the printing mechanism P4.

As described above, the toner images of each color are transferred onto the recording medium 27 in a superimposed manner. After that, the recording medium 27
The control circuit 41 turns on the power supply for static elimination 47 and eliminates the charge of the recording medium 27 by the carrier belt 9. As a result, the recording medium 27 is easily separated from the carrier belt 9, separated from the carrier belt 9 above the driving roller 11, and guided to the fixing device 35 by the paper guide 34. When the recording medium 27 is separated from the static eliminator 33, the control circuit 41 turns off the static elimination power supply.

In the fixing device 35, the toner image is fixed on the recording medium 27 by the heat roller 36 which has already reached the fixing temperature and the pressure roller 37 which is in pressure contact with the heat roller 36. When the fixing is completed, the recording medium 27 is discharged from the discharge stacker 3.
It is discharged to 9. This discharge is performed by the photo-interrupter 61 detecting the rear end of the recording medium 27 and the control circuit 41.
Can know.

When the discharge is completed, the control circuit 41 stops the motor 54 via the motor drive circuit 52. At the time when the transfer of the toner is completed in each printing mechanism, the charging power supplies 44Y, 44M, 44C, 44B, and the SP bias power supply 4
2Y, 42M, 42C, 42B, DB bias power supply 43
Y, 43M, 43C, 43B, transfer power supplies 45Y, 45
M, 45C and 45B are turned off.

The printing operation is executed as described above.
When the test switch 68 is turned on, the control circuit 41 allows the test pattern generation circuit 67 to write a test pattern in the memory 49 via the interface unit 50. I have. A color image is overprinted on the recording medium 27 by the test pattern image data.

For the sake of simplicity, the following description will be made assuming that the LED head 3 has an LED array of 128 dots, that is, 16 bytes and records an image of 256 lines as shown in FIG. Accordingly, the output value of the L address counter 49b is composed of 0 to 15, ie, 4 bits, and the address memory 49c is also of 0 to 15 (4 bits).
And the output value of the H address counter 49d is 0 to 2
55, that is, 8 bits. Of these, bus B
4 is 4 bits, and bus B5 is 4 bits. Bus B6,
B7 is also 4 bits, so that M adder 49e, H adder 4
9f is composed of a 4-bit adder.

First, when the test switch 68 is turned on, the control circuit 41 issues an instruction to the timing generator 64 and outputs a line signal LS to the L address counter 49 b of all the memories 49, and the L address counter 49
Clear b. Thereby, the L address counter 49
b prepares to count up from "0". The control circuit 41 outputs the write control signal WR1 to the address memory 49c to write the address data "0". Next, the control circuit 41 outputs one pulse of the clock signal CK from the timing generator 64, outputs the write control signal WR1 to the address memory 49c, and writes the address data “0”. Hereinafter, the clock signal CK is sequentially output from the timing generator 64 one pulse at a time, and the write control signal WR1 is output to the address memory 49c, and the address memory 49c becomes “0”, “0”,. Write address data in order. Thereby, all memories 4
Nineteen address memories 49c are written with 16 pieces of "0" data. Thus, the output of the M adder 49e outputs the value of the bus B4 as it is to the bus B6.

Next, the control circuit 41 outputs "0" as the initial address value shown in FIG. 4 and issues an instruction to the timing generator 64 to direct each memory to the H address counter 49d as shown in FIG. A load signal LD corresponding to the memory 49 is output, and a line signal LS of the first line corresponding to each memory 49 is output to the L address counter 49b of all the memories 49.
Clear b. Thus, the H address counter 49d
And the start output of the L address counter 49b becomes "0". As shown in FIG. 6, the line signal LS is output every time one line is written. The test pattern image data is sent from the test pattern generation circuit 67 to the memory 49 via the interface unit 50, and the write control signal WR0
Is written to the memory 49 at the same timing.
Hereinafter, this writing operation will be described with reference to FIG. FIG. 6 is a timing chart showing the operation of the first embodiment.

The start outputs of the H-address counter 49d and the L-address counter 49b are "0", and the address data stored in the address memory 49c are all "0". 49
The output of f is also “0”. Therefore, the test pattern image data transmitted at the beginning of the first line is written to the address (0, 0) shown in FIG. 5 designated by the buses B2, B6, and B7 at the timing of the write control signal WR0. Next, at the timing of "1" of the clock signal CK shown in FIG. 6, the L address counter 49b is incremented by 1, that is, "1" is output to the bus B2. The next transmitted test pattern image data is designated by the buses B2, B6 and B7 at the timing of the write control signal WR0 as shown in FIG.
・ 1) Stored at address. The L address counter 49b is incremented by 1 by the clock signal CK "2", "2" is output to the bus B2, and the test pattern image data is stored in the address (0.2) at the timing of the write control signal WR0. Is done. Hereinafter, the test pattern image data of the first line shown in FIG. 5 is sequentially stored while the L address counter 49b is incremented by 1 by the clock signal CK. Then, the L address counter 49b is incremented by 1 by the clock signal CK “15”, and the bus B2
Is output, and the test pattern image data is stored at address (0.15) at the timing of the write control signal WR0. As described above, all the test pattern image data of the first line is stored.

Next, the timing generator 64
The line signal LS of the line is output, whereby the H address counter 49d increases by one, and the L address counter 49b is cleared. Therefore, the bus B2 at this time
Is "0", the output of the bus B6 is "1", and the output of the bus B7 is "0". The test pattern image data transmitted at the beginning of the second line is written at the timing of the write control signal WR0 to the address (1, 0) designated by the buses B2, B6, and B7 shown in FIG. Next, the second type shown in FIG.
The L address counter 49b is incremented by 1 by the "1" of the clock signal CK of the line, that is, the bus B2
Outputs "1". At this time, the output of the bus B6 remains at "1" and the output of the bus B7 remains at "0" and does not change. The next transmitted test pattern image data is stored at the address (1.1) shown in FIG. 5 designated by the buses B2, B6 and B7 at the timing of the write control signal WR0. The L address counter 49b is incremented by 1 in response to "2" of the clock signal CK of the second line, "2" is output to the bus B2, and the test pattern image data is (1.2) at the timing of the write control signal WR0. ) Is stored at the address. Hereinafter, the test pattern image data of the second line shown in FIG. 5 is sequentially stored while the L address counter 49b is incremented by 1 by the clock signal CK. Then, the L address counter 49b is incremented by 1 by the clock signal CK “15” of the second line, and the bus B
2, "15" is output, and the test pattern image data is stored at the address (1.15) at the timing of the write control signal WR0. As described above, all the test pattern image data of the second line is stored.

Hereinafter, the test pattern image data from the third line to the 256th line is stored in the same manner.
As described above, the test pattern image data is stored in the RAM 49a shown in FIG. 5 in order. If the stored test pattern image data is transmitted to the LED head 3 in order from the first line to the 256th line to expose the photosensitive drum 6 and the toner image is recorded on the recording medium 27, LE
The disorder of the linearity of the LED array of the D head 3 is printed as it is.

While transmitting the test pattern image data stored in the memory 49 to the print control unit 48, the test pattern is printed according to the above-described printing operation. FIG. 7 is an explanatory diagram showing a print result of the test pattern printed in this manner. In FIG. 7, lines H1, H2, H3, H
4 indicates that the recording medium 27 is the printing mechanism P1, P2, P3, P4
When all the dots of one line of the LED array of the LED head 3 are driven between the respective photosensitive drums 6 and the respective transfer rollers 4, the electrostatic latent images are simultaneously formed on the respective photosensitive drums 6. This is a line in the main scanning direction obtained by attaching each color toner to the electrostatic latent image, transferring the toner to the recording medium 27 by the transfer roller 4, and fixing the toner by the fixing device 35. The H1 line is a yellow line printed by the first printing mechanism P1, and the H2 line is a second printing mechanism P1.
2 becomes the magenta line printed, and the H3 line becomes the third
The cyan line printed by the printing mechanism P3 becomes H4.
The line is a black line printed by the fourth printing mechanism P4.

If there is no disorder in the linearity of the LED head 3 and each of the printing mechanisms P1 to P4 is manufactured as ideal,
The main scanning direction lines of 1, H2, H3, and H4 should be straight lines with D intervals at equal pitches. However, an accuracy error occurs in each element part, and as shown in FIG. 7, linearity disorder and inclination occur. By reading the recording medium 27 on which the main scanning direction lines of H1, H2, H3, and H4 are printed by a high-performance scanner, the mounting errors (distance, inclination) of each printing mechanism P1 to P4 and the linearity of each LED head 3 are obtained. You can know the disorder.

In the example shown in FIG. 7, the line H1 is curved in the direction opposite to the medium traveling direction, the line H2 is curved in the medium traveling direction, and the line H3 is curved.
The line is waving in a sine curve, and the H4 line is almost straight, but is inclined upward to the right. If the top end of the yellow H1 line printed by the first printing mechanism P1 is selected as a reference point, the top end point of the H2 line is separated from the reference point of the H1 line by a distance D2, and the top end point of the H3 line is The reference point of the H1 line is separated by a distance D3, and the uppermost end point of the H4 line is separated by a distance D4 from the reference point of the H1 line.
The distances D2, D3, D4 read by these scanners
Is received by the control circuit 41 via the interface unit 50,
The information data is converted into resolution information of the color printing apparatus 1, that is, the number of dots or lines, and stored in the correction value memory 56.

By reading the recording medium 27 on which the main scanning direction lines H1, H2, H3, and H4 have been printed by a high-performance scanner, the second, third, and fourth printing mechanisms P2, P2, It is possible to know the distance, inclination and curvature of P3 and P4 apart. The control circuit 41 receives data read by the high-performance scanner from an external device such as a host computer via the interface unit 50 and stores the data in the correction value memory 56.

Next, the correction operation will be described with reference to the displacement amount shown in FIG. First, "memory clear" will be described. The control circuit 41 includes a timing generator 64
To the L address counter 49 of all the memories 49.
The line signal LS is output to the address b to clear the L address counter 49b. Thus, the L address counter 49b prepares to count up from “0”.
The control circuit 41 sends the write control signal WR1 to the address memory 4
In step 9c, address data "0" is written. Next, the control circuit 41 causes the timing generator 64 to output one pulse of the clock signal CK, and the write control signal WR
1 is output to the address memory 49c, and the address data "0" is written. Hereinafter, the clock signal CK is sequentially output from the timing generator 64 one pulse at a time,
While the write control signal WR1 is output to the address memory 49c, "0", "0",.
Address data "0" is written in order. As a result, 16 pieces of "0" data are written to the address memory 49c of all the memories 49. Thus, the output of the M adder 49e outputs the value of the bus B4 as it is to the bus B6.

Next, the control circuit 41 outputs "0" to the H address counter 49d as an initial address value.
The control circuit 41 issues an instruction to the timing generator 64, and as shown in FIG.
And outputs a load signal LD to the L address counter 49b of all the memories 49.
S is output to clear the L address counter 49b. As a result, the start outputs of the H address counter 49d and the L address counter 49b become "0". Then, the control circuit 41 outputs “0” data to all the memories 49 via the interface unit 50. After that, in the same manner as that shown in FIG. 6, via the interface unit 50, in accordance with the timing of the write control signal WR0,
The “0” data is sent to the memory 49 one after another and written. The line signal LS is output each time it is stored in the memory 49 for one scan. Hereinafter, the "0" data is similarly stored in the image data up to the 263rd scan, and the process is terminated. Thereby, all the memories 49 are cleared.

Next, the operation of correcting the yellow image data and storing it in the memory will be described. First, the reference line H1
The correction of the line will be described with reference to FIG. FIG. 8 shows the layout of the RAM 49a of the yellow memory 49Y and the LED head 3
3 shows an example of the disturbance of the linearity. 8, the LED array section LY1 of the LED head 3 and the LED
The array unit LY5 is shifted by one line upstream of the LED array unit LY6 in the rotation direction of the photosensitive drum 6, and
ED array section LY2 and LED array section LY4 are LEDs
The LED array unit LY3 is shifted from the array unit LY6 by two lines on the upstream side in the rotation direction of the photosensitive drum 6 in the rotational direction.
It is shifted from the ED array section LY6 by three lines on the upstream side in the rotation direction of the photosensitive drum 6. These three lines correspond to ΔD1 shown in FIG. Hereinafter, the correction operation will be described using the deviation amount of the above example of yellow. These pieces of deviation information are stored in the correction value memory 56.

The solid portion of the RAM arrangement in FIG. 8 corresponds to each LED array of the LED head 3. If the image data of the first line is stored at the address of the filling portion, the image data of the first line is corrected, and can be arranged on the photosensitive drum 6 in a straight line.
Further, data “0” which is not exposed due to the memory clear described above is stored in the upper address portion of the filled portion, and the address immediately below the filled portion is the address of the second line to be exposed by the LED head 3. Stores image data.
Similarly, the image data of the third line to be exposed by the LED head 3 is stored at each address immediately below the address where the image data of the second line is stored. Less than,
The same is stored for the fourth and subsequent lines.

Here, the correction value for the yellow H1 line is based on the LED array section LY6 on the most upstream side in the rotation direction of the photosensitive drum 6 shown in the upper part of FIG.
The shift amount in line units from the ED array unit LY6 is stored in the correction value memory 56 in byte units in the main scanning direction.
That is, in the example of FIG. 8, the first of the LED array section LY1
Bytes corresponding to the 8th column, the 9th to 16th columns, and the 17th to 24th columns include the LED array part LY6 of the correction reference.
Is shifted by one line with respect to “1”, “1”,
"1" is stored. 25th of LED array section LY2
In the bytes corresponding to the 32nd column, the 33rd to 40th columns, and the 41st to 48th columns, the LED array portion L
Since two lines are shifted from Y6, "2",
“2” and “2” are stored, and the fourth
Bytes corresponding to 9 to 56 columns, 57 to 64 columns, 65 to 72 columns, and 73 to 80 columns are shifted by three lines with respect to the correction reference LED array unit LY6. "3", "3", "3" are stored, and L
The 81st to 88th columns and 89th to 9th columns of the ED array section LY4
Since the byte corresponding to the six columns is shifted by two lines from the LED array unit LY6 of the correction reference, "2",
“2” is stored, and the 97th to 10th LED arrays LY5 are stored.
In the bytes corresponding to the four columns and the 105th to 112th columns, "1" and "1" are stored because the line is shifted by one line with respect to the LED array unit LY6 of the correction reference. ~ 120 column, 121st ~ 12th
The byte corresponding to 8 columns is a reference,
This means that "0" and "0" are stored. Therefore, the correction values for yellow are “1”, “1”,
"1", "2", "2", "2", "3", "3",
"3", "3", "2", "2", "1", "1",
The 16 correction data “0” and “0” are sent from the host computer and stored in the correction value memory 56.

It should be noted that the LED array section farthest from the yellow correction reference LED array section is always stored in the eighth scan image data. In the example of FIG.
The 49th to 56th columns and the 57th column corresponding to the array section LY3
Image data of columns 64 to 65, columns 72 to 72, and columns 73 to 80 are stored at addresses of image data of the eighth scanning line.

Next, a method of storing the yellow image data sent from the external device, that is, the host computer, as shown in FIG. 8, will be described. First, according to an instruction from the control circuit 41, the correction value data “1”, “1”,
"1", "2", "2", "2", "3", "3",
"3", "3", "2", "2", "1", "1",
“0” and “0” are written in the above-described procedure. As a result, the correction value data sequence is stored in order, such as "1" at address 0, "1" at address 1, "1" at address 2, "2" at address 3, and so on. Is done. Then, the control circuit 41 outputs “4” indicating the fifth scan as the initial address value shown in FIG. 4 and issues an instruction to the timing generator 64 to output H to the memory 49Y.
The load signal LD (Y) is output to the address counter 49d, and the L address counter 49 of the memory 49Y is output.
The line signal LS (Y) of the first line is output toward the line b, and the L address counter 49b is cleared. “4” indicating the fifth scan is derived from “7” indicating the eighth scan,
The value is obtained by subtracting the MAX value (three lines in the example of FIG. 8) of the disorder (shift amount) of the linearity of the LED array.

The operation of storing the received image data in the memory 49Y will be described below with reference to FIG. Upon receiving the first image data corresponding to the first to eighth columns of yellow, the interface unit 50 outputs a write control signal WR0 (Y) to the RAM 49a of the yellow memory 49Y. At this time, the output of the L address counter 49b is "0", and among the outputs of the H address counter 49d, "0" is output to the bus B5 and "4" is output to the bus B4. As a result, the correction value data "1" stored at address 0 is output from the address memory 49c to the bus B3, and the M adder 49e outputs the value "1" of the bus B3 and the value "4" of the bus B4. Are added, and the addition result “5” is output to the bus B6. While receiving the image data of the first line,
Since the line signal LS does not change, the bus B5 and the bus B4
Hold the state where "0" and "4" are output, respectively. Since the M addition result is "5", the carry Cy is "0", the output "0" of the bus B5 and the carry Cy value "0" are added in the H adder 49f, and the addition result "0" is added to the bus. Output to B7. Accordingly, the image data corresponding to the first yellow to first to eighth columns of the first yellow is transferred to the bus B7 = 0 and the bus B6 =
5, stored at the address (5.0) shown in FIG. 8 designated by the bus B2 = 0.

Next, the control circuit 41 outputs a clock signal CK (Y) via the timing generator 64. As a result, the L address counter 49b counts up by one, and "1" is output to the bus B2. Accordingly, since the correction value data "1" stored at address 1 is output from the address memory 49c, the image data corresponding to the next ninth to sixteenth columns is output at the timing of the write control signal WR0 (Y). 5.1) Stored at address. Then, the next clock signal CK is output to set the L address counter 49b to 1
, And "2" is output to the bus B2. Therefore, since "1" stored at address 2 is output from the address memory 49c, the image data corresponding to the next 17th to 24th columns is written in the write control signal WR0 (Y).
At the timing (5 · 2). When the data is stored, the next clock signal CK (Y) is output to count up the L address counter 49b by 1, and "3" is output to the bus B2. Therefore, the address memory 49c
Outputs the correction value data "2" stored at address 3, the M adder 49e adds the value "2" of the bus B3 and the value "4" of the bus B4, and the addition result "6""
Is output to the bus B6. The image data corresponding to the next 25th to 32nd columns is stored at address (6.3) at the timing of the write control signal WR0 (Y).

Similarly, the L address counter 49
b is incremented by one at the timing of the clock CK (Y), and the M adder 49e adds correction value data to an upper address indicating image data of the eighth scan as a reference, and
Since the image data is output to 9a, the yellow image data of the first line is stored one after another in the addresses of the solid portions shown in FIG.

When the control circuit 41 knows that the image data of the first line has been stored, it outputs a line signal LS (Y) via the timing generator 64. As a result, the H address counter 49d counts up by 1, and outputs "0" to the bus B5 and "5" to the bus B4. Similarly, the image data of the second line is stored in the address portion immediately below the solid portion shown in FIG. Hereinafter, the RAM 49 is similarly set for the third and subsequent lines.
a.

Here, the role of the H adder 49f will be described. While the image data is being stored one after another by the above operation, if the image data of the thirtieth scan is approached, the H address counter 49d sets “29”, that is, “00” in binary.
At this time, “1”, that is, “0001” in binary, is output to the bus B5, and “13”, that is, “1101”, in binary, is output to the bus B4. The address at which the image data of 49 to 56 columns is to be written, that is, the address (32.6) is designated, and at this time, "6", that is, "0110" in binary is output to the bus B2, and The correction value "3", that is, "0011" in binary, is output from the address memory 49c to the bus B3, so that the M adder 49e outputs "3" for the bus B3 and "13" for the bus B4.
Is added, the result of the addition is "16", that is, an overflow occurs, "0000" is output to the bus B6, the carry Cy = "1", and the H adder 49
At f, "0001" of the bus B5 and "1" of Cy are added, that is, incremented by 1, and the addition result is "0010".
And this value is output to the bus B7. As described above, the bus B7 outputs "0010", the bus B6 outputs "0000", and the bus B2 outputs "0110". This address is the address (32.6). From the above, it is understood that the most significant address is definitely determined by the carry Cy of the M adder 49e and the H adder 49f.

Next, the operation of correcting the magenta image data and storing it in the memory will be described. First, the correction of the magenta H2 line will be described with reference to FIG. FIG.
Is the layout of the RAM 49a of the magenta memory 49M and the LE
This shows disturbance of the linearity of the D head 3. As shown in the figure, the LED array unit LM2 and the LED array unit LM
4 is shifted from the LED array section LM3 by one line in the direction opposite to the rotation direction of the photosensitive drum 6, and the LED array sections LM1 and LM5 are
M2 is shifted by two lines in the direction opposite to the rotation direction of the photosensitive drum 6, and the LED array unit LM6 is shifted from the LED array unit LM3 by three lines in the direction opposite to the rotation direction of the photosensitive drum 6, LED array part LM7 is LE
It is shifted by four lines in the direction opposite to the rotation direction of the photosensitive drum 6 with respect to the D array unit LM3. These pieces of deviation information are stored in the correction value memory 56.

As described above, if the image data of the first line is stored in the solid portion of the RAM arrangement in FIG. Can be arranged. Further, non-exposure data “0” is stored in the upper address portion of the filled portion, and L is stored in the address immediately below the filled portion.
The image data of the second line to be exposed by the ED head 3 is stored. Similarly, each address immediately below the address where the image data of the second line is stored is indicated by an LED.
The image data of the third line to be exposed by the head 3 is stored. Hereinafter, the fourth and subsequent lines are similarly stored.

Here, the correction value for the magenta H2 line is based on the LED array section LM3 on the most upstream side in the rotation direction of the photosensitive drum 6 shown in the upper part of FIG.
The amount of deviation in line units from the ED array unit LM3 is stored in the correction value memory 56 in byte units in the main scanning direction.
That is, in the example of FIG. 5, the first of the LED array units LM1
In the bytes corresponding to the ８8th column, the ninth to 16th columns, and the 17th to 24th columns, the correction reference LED array unit LM3
Are shifted by two lines, so "2", "2",
“2” is stored. 25th of LED array unit LM2
In the bytes corresponding to the 32nd column, the 33rd to 40th columns, and the 41st to 48th columns, the LED array portion L
Since one line is shifted from M3, "1",
“1”, “1” is stored, and the fourth
9-56 columns, 57-64 columns, 65-72 columns, 73-80 columns, 81-88 columns, eighth
Since the bytes corresponding to 9 to 96 columns are reference, “0”, “0”, “0”, “0”, “0”, “0”
Is stored.

The 97th to 10th LED arrays LM4
Since the byte corresponding to the four columns is shifted by one line with respect to the correction reference LED array unit LM3, "1" is stored, and the bytes corresponding to the 105th to 112th columns of the LED array unit LM5 include: LED array part L for correction reference
Since two lines are shifted from M3, “2” is stored, and a byte corresponding to the 113th to 120th columns of the LED array unit LM6 is provided in the LED array unit LM3 of the correction reference.
Is shifted by 3 lines, so “3” is stored and L
Since bytes corresponding to the 121st to 128th columns of the ED array unit LM7 are shifted by 4 lines from the LED array unit LM3 serving as the correction reference, "4" is stored. Therefore, as the correction value for magenta,
“2”, “2”, “2”, “1”, “1”, “1”,
“0”, “0”, “0”, “0”, “0”, “0”,
The 16 correction data “1”, “2”, “3”, and “4” are sent from the host computer to the correction value memory 56.
To be stored.

It should be noted that also for magenta, among the image data of the first line, the LED array part farthest from the correction reference LED array part is always stored in the eighth scan image data. In the example of FIG. 5, the LED array unit L
The image data of the 121st to 128th columns corresponding to M7 is stored at the address of the image data of the eighth scanning line.

Here, as shown in FIG. 7, the distance D2 is between the LED array section LY3 for the yellow H1 line and the LED array section LM7 for the magenta H2 line. As described above, this information is stored in the correction value memory 56 as the resolution in the sub-scanning direction of the apparatus. Printing mechanism P1 and printing mechanism P when the precision of the apparatus is ideally manufactured
Assuming that the distance to D is D, (D-D2) is a deviation between the printing mechanisms P1 and P2.

As can be seen from FIG. 7, the distance between the LED array section LY3 of the yellow H1 line and the LED array section LM7 of the magenta H2 line is D2. Since the image data of the yellow LED array unit LY3 is stored at the same address of the eighth scanning, the image data of the eighth scanning of yellow is exposed on the photosensitive drum 6 of the first printing mechanism P1, and then the recording medium 2 is exposed.
7 is conveyed by D2 lines and the magenta eighth scanning image data is exposed on the photosensitive drum 6 of the second printing mechanism P2, the yellow LED array section LY3 and the magenta LED array section LM7 are exposed to the recording medium 27. The toner images transferred above will completely overlap.

The operation of storing the magenta image data received by the interface unit 50 in the memory 49M is the same as the case of the above-described yellow color, and the description is omitted. However, the initial address value is set to “3” and the memory 4
When the correction value data stored in the 9M address memory 49b is “2”, “2”, “2”, “1”, “1”, “1”,
“0”, “0”, “0”, “0”, “0”, “0”,
The operations are the same, although they are different from "1", "2", "3", and "4". As described above, the correction value data relating to magenta includes the disorder of the linearity of the magenta LED array and the distance D2. The correction value data relating to cyan includes disturbance of the linearity of the cyan LED array and the distance D3. As the correction value data for black, there are disturbances in linearity of the black LED array,
The distance becomes D4. These values are sent from an external device and stored in the correction value memory 56.

As described above, the yellow and magenta RAMs
The operation of reading and printing the image data written in 49a will now be described. The control circuit 41 issues an instruction to the timing generator 64, outputs a line signal LS to the L address counter 49b of the memories 49Y and 49M, and clears the L address counter 49b. Thus, the L address counter 49b prepares to count up from “0”. The control circuit 41 outputs the write control signal W
R1 is output to the address memory 49c of the memories 49Y and 49M, and the address data “0” is written. Next, the control circuit 41 outputs one pulse of the clock signal CK from the timing generator 64, outputs the write control signal WR1 to the address memory 49c, and writes the address data “0”. Hereinafter, the clock signal CK is sequentially output from the timing generator 64 one pulse at a time, and the write control signal WR1 is output to the address memory 49c, and the address memory 49c becomes “0”, “0”,. Write address data in order. Thereby, the memory 49
Sixteen "0" data are written in the Y, 49M address memory 49c. Thus, the output of the M adder 49e outputs the value of the bus B4 as it is to the bus B6.

Next, the control circuit 41 outputs "0" as an initial address value to the H address counter 49d of the memories 49Y and 49M. Further, the control circuit 41 issues an instruction to the timing generator 64, issues a load signal LD (Y) to the H address counter 49d of the memory 49Y, and outputs the first signal to the L address counter 49b of the memory 49Y as shown in FIG. The line signal LS of the line is output to clear the L address counter 49b of the memory 49Y. As a result, the start outputs of the H address counter 49d and the L address counter 49b of the memory 49Y become "0". Then, the control circuit 41 outputs the read control signal R
While sequentially outputting D0 (Y) to the RAM 49a of the memory 49Y, the read control signal R is sequentially read from the image data at the address (0,0) stored in the RAM 49a of the memory 49Y.
In accordance with the timing of D0 (Y), the print control circuit 48
The image data is transmitted to Y. The print control circuit 48 </ b> Y converts the sent image data into the yellow LED head 3.
To a form that can be sent to the yellow LED head 3
Send to The line signal LS (Y) is output each time it is stored in the memory 49 for one scan.

Next, the yellow image data up to the D2 scan is transmitted to the print control circuit 48Y in the same manner. Here, recording of magenta is also started.

While the yellow image data up to the D2 scan is read from the memory 49Y and transmitted to the LED head 3 to form an image, the yellow first scan image data is exposed and then the recording medium 27 is exposed. Is traveling on the D2 line, and here, the timing of exposing the image data of the first scan of magenta is adopted. Then, while rotating the photosensitive drum 6 of the second printing mechanism P2, the second magenta
The image data after the scanning is exposed one after another. During this time, the image data after the yellow D2 scan is also successively exposed while rotating the photosensitive drum 6 of the first printing mechanism P1.

As described above, for yellow, FIG.
When the image data of the eighth scan is exposed, the image of the first line is aligned on the photosensitive drum 6 of the first printing mechanism P1. Further, with respect to magenta, the image of the first line is aligned on the photosensitive drum 6 of the second printing mechanism P2 when the image data of the eighth scan in FIG. 5 is exposed. When the toner image on the first line of yellow is transferred onto the recording medium 27 and then the recording medium 27 is conveyed by D2 lines and the toner image on the first line of magenta is transferred onto the recording medium 27, the yellow first image is transferred. It is possible to completely coincide with and overlay the toner image on the line. The same applies to the second and subsequent lines. The following recording operation is as described in detail above. The same applies to cyan and black, and a description thereof will be omitted. As described above, yellow, magenta, cyan, and black images can be recorded with color misregistration corrected.

In the above embodiment, the control circuit 41 determines that the recording medium 27 has been transported by the distances D2, D3, and D4.
Must be detected. Generally, a timer is provided in the control circuit 41, and the timer detects that the recording medium 27 has been transported by the distance D2. Accordingly, as the number of timers, after the photo sensor 60 detects the leading end of the recording medium 27, the yellow first printing mechanism P
At least four timers are required: a timer for counting the distance up to one exposure start timing, a timer for counting the distance D2, a timer for counting the distance D3, and a timer for counting the distance D4.

As described above, according to the first embodiment,
The following effects are obtained. That is, when a color image is superimposed and a color image is to be recorded in a desired color, even if a color misregistration occurs due to a color image misregistration, the amount of color misregistration is stored in the correction value memory. By changing the address when writing the image data in the sub-scanning direction in accordance with the color misregistration information, it is possible to correct the displacement of the color image, so that the desired color reproduction can be easily realized. In addition, even if the linearity of the recording head is disturbed or the mounting is tilted during the manufacturing process, the amount of tilt, the amount of tilt and the direction of tilt can be easily corrected by electrical means instead of fine adjustment by mechanical means. There is an effect that the number of steps can be greatly reduced and an inexpensive color printing apparatus can be provided.

Next, the second embodiment of the present invention will be described with reference to FIGS.
An embodiment will be described. The second embodiment is based on the exposure start timing of the first printing mechanism.
The exposure start timing of each printing mechanism of No. 4 is fixed. The block diagram and mechanism used in the second embodiment are the same as those in the first embodiment described with reference to FIGS. Therefore, the operations of clearing the memory and writing and reading the image data to and from the memory are the same as those in the first embodiment, and the description thereof will be omitted.

FIG. 9 shows a RAM of a magenta memory 49M.
This shows the arrangement of the LED head 49a and the disorder of the linearity of the LED head 3. The arrangement of the RAM 49a of the yellow memory 49Y and the disorder of the linearity of the LED head 3 are the same as those shown in FIG. As shown in FIG. 9, the disorder of the linearity of the LED head 3 of the second printing mechanism P2 is the same as that described with reference to FIG. That is, the LED array units LM2 and LE
The D array unit LM4 is shifted by one line with respect to the LED array unit LM3 in the direction opposite to the rotation direction of the photosensitive drum 6, and the LED array units LM1 and LM5 are shifted from the LED array unit LM3 by the amount of the photosensitive drum 6. The LED array part L is shifted by two lines in the direction opposite to the rotation direction.
M6 is shifted by 3 lines in the direction opposite to the rotation direction of the photosensitive drum 6 with respect to the LED array section LM3, and the LED array section LM7 is shifted by 4 lines in the direction opposite to the rotation direction of the photosensitive drum 6 with respect to the LED array section LM3. Are off by minutes. These pieces of deviation information are stored in the correction value memory 56.

As shown in FIG. 5, if the image data of the first line is stored in the solid portion of the RAM arrangement in FIG. 9 corresponding to the disorder of the linearity of the magenta LED head 3, the first line The image data of the eyes can be corrected and aligned on the photosensitive drum 6 in a straight line. Further, non-exposure data “0” is stored in the upper address portion of the filling portion, and LE is stored in the address immediately below the filling portion.
The image data of the second line to be exposed by the D head 3 is stored. Similarly, the image data of the third line to be exposed by the LED head 3 is stored at each address directly below where the image data of the second line is stored.
Hereinafter, the fourth and subsequent lines are similarly stored.

The correction value for the magenta H2 line is based on the LED array section LM3 on the most upstream side in the rotation direction of the photosensitive drum 6 shown in the upper part of FIG.
The amount of deviation in line units from the ED array unit LM3 is stored in the correction value memory 56 in byte units in the main scanning direction.
This is also the same as FIG. That is, the correction reference LED
As the magenta correction value for the array unit LM3,
“2”, “2”, “2”, “1”, “1”, “1”,
“0”, “0”, “0”, “0”, “0”, “0”,
The 16 correction data “1”, “2”, “3”, and “4” are sent from the host computer to the correction value memory 56.
To be stored.

In the second embodiment, the displacement between the first and second printing mechanisms P1 and P2 described above is set to D-D2.
= + 2 lines will be described. That is, the description will be made on the assumption that the line is shifted by two lines shorter than the ideal. In the image data of the first line of magenta according to the present embodiment, the LED array unit farthest from the correction reference LED array unit is always stored at the address of the {8- (D-D2)} scan. And Therefore, in this example, the LED array unit LM
The image data of the 121st to 128th columns corresponding to No. 7 is stored at the address of the image data of the sixth scanning line. In addition, (D-
D2) is signed.

As described above, the LE of the yellow H1 line
A distance D2 is provided between the D array section LY3 and the magenta H2 line LED array section LM7.
The magenta image data of the first line of M7 is stored at the address of the sixth scan, and the yellow LED array unit LY3 is stored at the address of the eighth scan. This scanning difference has two lines, and magenta is stored at an address two lines ahead. After exposing the image data of the eighth scanning of yellow to the photosensitive drum 6 of the first printing mechanism P1, the recording medium 27 is transported to the ideal D line, and the image data of the sixth scanning of magenta is exposed to the photosensitive drum of the second printing mechanism P2. 6, the magenta exposure position is the position where the (D-2) line recording medium has been conveyed from the position where the image data of the first line of the eighth scanning of yellow was exposed. That is, since (D-2) is D2, the yellow LED array section LY3 and the magenta LE
The toner images exposed on the D array unit LM7 and transferred onto the recording medium 27 completely overlap. In this way, the shift in the sub-scanning direction can be corrected.

Next, the operation of the second embodiment will be described.
The operation of storing the magenta image data received by the interface unit 50 in the memory 49M is the same as that described above. The initial address value is “1”, and the correction value data stored in the address memory 49b of the memory 49M is “2”, “2”, “2”, “1”, “1”,
“1”, “0”, “0”, “0”, “0”, “0”,
Each image data is stored as “0”, “1”, “2”, “3”, and “4” in accordance with the operation described above. As a result, the image data of the first line is stored in the filling unit of FIG. The same applies hereinafter.

As described above, the correction value data relating to magenta includes the disturbance of the linearity of the magenta LED array and (D
−D2). The correction value data relating to cyan includes disturbance of the linearity of the cyan LED array,
The distance is (D-D3). The correction value data relating to black includes the disorder of the linearity of the black LED array and the distance of (D-D4). These values are sent from an external device and stored in the correction value memory 56.

As described above, the yellow and magenta RAMs
The operation of reading and printing the image data written in 49a will be described. The control circuit 41 issues an instruction to the timing generator 64, outputs a line signal LS to the L address counter 49b of the memories 49Y and 49M, and clears the L address counter 49b. Thus, the L address counter 49b prepares to count up from “0”. The control circuit 41 receives the write control signal WR
1 is output to the address memory 49c of the memories 49Y and 49M, and the address data “0” is written. Next, the control circuit 41 outputs one pulse of the clock signal CK from the timing generator 64, outputs the write control signal WR1 to the address memory 49c, and writes the address data “0”. Hereinafter, the clock signal CK is sequentially output from the timing generator 64 one pulse at a time, and the write control signal WR1 is output to the address memory 49c, and the address memory 49c becomes “0”, “0”,. Write address data in order. Thereby, the memory 49
Sixteen "0" data are written in the Y, 49M address memory 49c. Thus, the output of the M adder 49e outputs the value of the bus B4 as it is to the bus B6.

Next, the control circuit 41 outputs "0" as an initial address value to the H address counter 49d of the memories 49Y and 49M. Further, the control circuit 41 issues an instruction to the timing generator 64, issues a load signal LD (Y) to the H address counter 49d of the memory 49Y, and outputs the first signal to the L address counter 49b of the memory 49Y as shown in FIG. The line signal LS of the line is output to clear the L address counter 49b of the memory 49Y. As a result, the start outputs of the H address counter 49d and the L address counter 49b of the memory 49Y become "0". Then, the control circuit 41 outputs the read control signal R
While sequentially outputting D0 (Y) to the RAM 49a of the memory 49Y, the read control signal R is sequentially read from the image data at the address (0,0) stored in the RAM 49a of the memory 49Y.
In accordance with the timing of D0 (Y), the print control circuit 48
The image data is transmitted to Y. The print control circuit 48 </ b> Y converts the sent image data into the yellow LED head 3.
To a form that can be sent to the yellow LED head 3
Send to The line signal LS (Y) is output each time image data for one scan is read from the memory 49.

Thereafter, the yellow image data up to the D-th scanning is similarly transmitted to the print control circuit 48Y. Here, recording of magenta is also started.

While reading the yellow image data up to the D-th scan from the memory 49Y and transmitting it to the LED head 3 to form an image, the yellow first-scan image data is exposed and then the recording medium 27 is exposed. Is traveling on the D line, and here, the timing of exposing the image data of the first scan of magenta is adopted. Then, the second printing mechanism P2
While rotating the photosensitive drum 6, the image data after the second scan of magenta is sequentially exposed. During this time, the image data after the yellow Dth scan is also successively exposed while rotating the photosensitive drum 6 of the first printing mechanism P1.

As described above, for yellow, FIG.
When the image data of the eighth scan is exposed, the image of the first line is aligned on the photosensitive drum 6 of the first printing mechanism P1. As for magenta, the image of the first line is aligned on the photosensitive drum 6 of the second printing mechanism P2 when the image data of the sixth scan in FIG. 9 is exposed. After the yellow first line toner image is transferred onto the recording medium 27, the recording medium 27 is conveyed by D lines, and the first line toner image on the magenta straight line is transferred to the recording medium 27.
When the image is transferred to the toner image on the first line, the toner image can be completely overlapped with the toner image on the first line of yellow. Second
The same applies to the line and thereafter. The following recording operation is as described in detail above. The same applies to cyan and black. As mentioned above, yellow,
Magenta, cyan, and black images can be recorded with color misregistration corrected.

In the second embodiment, a timer is provided in the control circuit 41 so that the control circuit 41 detects that the recording medium 27 has been conveyed by the distance D. 27 detects that it has been transported by the distance D. Since each printing mechanism is arranged at equal intervals with a distance D, by repeatedly using this timer,
The recording medium 27 is transferred from the first printing mechanism P1 to the second printing mechanism P2.
Is detected by the control circuit 41, and the exposure of the second printing mechanism P2 is started.
The control circuit 41 detects that the recording medium 27 has been conveyed by the distance D from the second printing mechanism P3 to the third printing mechanism P3.
3, the control circuit 41 detects that the recording medium 27 has been conveyed by the distance D from the third printing mechanism P3 to the fourth printing mechanism P4, and starts exposing the fourth printing mechanism P4. , These timings can be set to a fixed value. Therefore, the timer count is a timer for counting the distance from the detection of the leading end of the recording medium 27 by the photo sensor 60 to the exposure start timing of the first printing mechanism P1 for yellow, and a timer for repeatedly counting the distance D. Months. This timer is a so-called counter means, and may be configured in the timing generator 64.

As described above, according to the second embodiment,
The following effects are obtained. That is, a plurality of printing mechanisms are arranged at equal intervals, and one counter means is provided with a fixed count value based on the exposure start timing of the upstream printing mechanism, that is, the image formation start timing, based on the reference. The image forming timing of the downstream printing mechanism can be determined based on the signal generated from the counter means, and the address is written when the image data in the sub-scanning direction is written in accordance with the color shift information of the correction value memory storing the color shift amount. By changing it, it was possible to correct the color image misalignment,
The desired color reproduction can be easily realized, and the number of the exposure start timing counter means can be reduced to one. Therefore, there is an effect that the apparatus configuration can be reduced in cost as compared with the first embodiment.

Next, a third embodiment of the present invention will be described. The configuration of the third embodiment is the same as the first and second embodiments. In the third embodiment, the first printing mechanism, the second printing mechanism, the third printing mechanism shown in FIG.
The fourth printing mechanism is disposed at equal intervals of the distance D line. This arrangement may have a mounting error. The gap is
Correction is performed in exactly the same way as in the second embodiment. Therefore,
The description of the correction operation is omitted.

Here, the distance D from the time when the photo sensor 60 disposed on the upstream side of the first printing mechanism detects the leading end of the recording medium 27 to the timing of starting the exposure of the first printing mechanism P1 for yellow is recorded. The medium 27 is transported. here,
The exposure based on the first scanning of the first printing mechanism P1 for yellow is started. From the start of exposure, the recording medium 27 is conveyed by a distance D5, and the image data of the first line, which is linearly exposed on the photosensitive drum 6 of the first printing mechanism P1 for yellow, is converted into yellow toner by the developing roller 8. Then, the yellow toner is transferred to a predetermined position of the recording medium 27 determined in advance. The above distance D5
Is equal to the distance from the position exposed on the photosensitive drum 6 to the position where the transfer roller 4 is opposed.

After the exposure based on the first scanning of the first printing mechanism P1 for yellow is started, the recording medium 2
7 by the distance D, and by the second printing mechanism P2,
The exposure based on the first scan of magenta is started. Further, after the exposure based on the first scan of the second printing mechanism P2 of magenta is started, the recording medium 27 is transported by the distance D, and the third printing mechanism P3 performs the printing based on the first scan of cyan. After the exposure based on the first scan of the third printing mechanism P3 for cyan is started,
The recording medium 27 is transported by the distance D, and the fourth printing mechanism P4
Starts the exposure based on the first scan of black. During this time, the exposure based on the second scan is also performed one after another in each printing mechanism. When the recording medium 27 is conveyed by a distance D5 after the exposure based on the first scanning of the second printing mechanism P2 of magenta is started, the yellow color transferred to a predetermined position of the recording medium 27 is transferred. 1
The toner image of the first magenta line is transferred onto the toner image of the line without any color shift. Hereinafter, cyan and black can be similarly transferred in an overlapping manner without color shift.

The photo sensor 60 is provided at a distance (D + D5) from the position where the photosensitive drum 6 of the first printing mechanism P1 and the transfer roller 4 face each other.

As described above, after the photo sensor 60 detects the leading end of the recording medium 27, the yellow first printing mechanism P
The timing until the start of one exposure can be taken at the distance D. Incidentally, the second printing from the start of the exposure of the first printing mechanism P1.
The timing of starting the exposure of the printing mechanism P2, the timing of starting the exposure of the third printing mechanism P3 from the start of the exposure of the second printing mechanism P2, and starting the exposure of the fourth printing mechanism P4 from the start of the exposure of the third printing mechanism P3. Since the timing is also taken at the distance D, all counting means for counting this distance can be shared.

According to the third embodiment, the following effects can be obtained. That is, the misalignment of the color image can be corrected and the recording medium 27 disposed upstream of the first printing mechanism P1.
Is provided, and the timing for starting the exposure of the first printing mechanism P1 on the basis of the output signal of the detecting means can be made the same as the timing for starting the exposure of each printing mechanism. There is an effect that the counter means can be shared, and the apparatus configuration can be reduced in cost compared to the second embodiment.

Next, a fourth embodiment will be described. FIG.
Shows the arrangement of image data to be recorded in the RAM 49a in the fourth embodiment. The frame in the figure corresponds to one byte (8 bits) of image data. The LED head 3 has an LED array of 128 dots, that is, 16 bytes. Therefore, in this example, the RAM 49a is configured with image data of 16 bytes (128 columns) in the main scanning direction and (256 + 14) scanning numbers in the sub-scanning direction. The first scan image data is stored at addresses (0.0), (0.1), ..., (0.15), and the second scan image data is stored at addresses (1.0), (1).
.., (1.15), and the image data of the third scan is stored at addresses (2.0), (2.1), (2).
· 2), ..., (2 · 15). Similarly, if necessary, the image data up to the 270th scan is RA
It is stored in the address of M49a in order.

As can be seen from FIGS. 4 and 10, the L address counter 49b specifies an address in the main scanning direction, that is, a byte address of 0 to 15 (4 bits in this example) corresponding to the 1st to 128th columns. The address in the sub-scanning direction is designated by the memory 49d and the H address counter 49e.

In the upper part of FIG. 10, the LE of the LED head 3 is shown.
The array of the D array is shown. As described above, the reason why the RAM configuration is set to the 270th scan for the image data of 256 lines is to correct the total error amount of the mounting pitch of the LED head 3 ± 7 lines, that is, the maximum 14 lines. It is. In addition, in the example of FIG.
4 shows an example in which there are four lines of disturbance in the sub-scanning direction. The resolution is set to a pitch unit of one line.

The correction method according to the fourth embodiment will be described below. In the example of FIG. 10, the image data of the first line to be exposed by the LED head 3 is stored at the row address of the sixth scan, and the image data of the first line to be exposed by the LED head 3 at the address of the seventh scan. The image data of the second line is stored.
The scanning address is the third line, and the ninth scanning address is the fourth line.
The image data of the 256th line is stored at the address of the 261st scan in the line,. In addition, the first scanning
The address of the fifth scan, that is, the address of the first scan (0
., (0.1),..., (0.15), second scan address (1.0), (1.1),..., (1.15), third scan address (2)・ 0), (2 ・ 1), ... (2 ・ 1)
4), (2.15), address of the fourth scan (3.0),
(3.1),..., (3.15), address of the fifth scan (4.0), (4.1),..., (4.12), (4.1)
Non-exposure data “0” is stored in 3), (4 · 14), and (4 · 15).

The address (3 ·
0), (3.1), (3.2), (4.3), (4.
4), (4.5), (5.6), (5.7), (5.
8), (5.9), (5.10), (5.11), (4)
・ 12), (3 ・ 13), (2 ・ 14), (1.15)
Is transmitted to the LED head 3 for exposure,
Since the image data of the first to fifth scans is “0” which is not exposed, it is not exposed by the LED head 3. LED
The addresses (5.6), (5.7), (5.8), (5.) of the image data of the first line by the array LM3.
Only the image data of (9), (5.10) and (5.11) are exposed.

Next, the photosensitive drum 6 is moved by one line with an arrow a.
In the same manner, the image data immediately below the solid portion in FIG. 10 is transmitted to the LED head 3 for exposure. That is, addresses (4.0), (4.1), (4.2),
(5.3), (5.4), (5.5), (6.6),
(6.7), (6.8), (6.9), (6.10),
(6.11), (5.12), (4.13), (3.1)
4) When the image data of (2.15) is transmitted to the LED head 3 and exposed, the image data corresponding to the first to fifth scans is "0" of non-exposure, so that the exposure is performed by the LED head 3. There is no. First by the LED array LM2
The (5.3), (5.4) and (5.5) image data of the line is exposed, and the (5.12) image data of the first line is exposed by the LED array LM4.
According to the array LM3, (6.6), (6.7), (6.8), (6.9),
The image data of (6 · 10) and (6 · 11) is exposed. At this time, the (5.
6), (5.7), (5.8), (5.9), (5.1)
0), (5 · 11) image data and the first exposure
(5.3), (5.4), (5.5), (5.
The image data of 12) is aligned on the photosensitive drum 6 in a straight line.

Further, the photosensitive drum 6 is rotated by one line in the direction of the arrow a, and similarly, image data two scans below the solid portion in FIG. 10 is transmitted to the LED head 3 for exposure. That is, the addresses (5. 0), (5. 1), (5.
2), (6.3), (6.4), (6.5), (7.
6), (7.7), (7.8), (7.9), (7.1)
0), (7.11), (6.12), (5.13),
The image data of (4.14) and (3.15) are transmitted to the LED head 3 for exposure. However, since the image data corresponding to the first to fifth scans is "0" of non-exposure, the LED head 3 There is no exposure. (5.0), (5.1), (5.2) of the first line by the LED array LM1
Is exposed, the LED array LM5 exposes the first line of (5 · 13) image data, and the LED array LM2 exposes the second line of the image of (6.3) and (6.4). , (6.5) image data is exposed, and the LED array LM4 exposes (6.12) image data in the second line image.
By the D array LM3, (7 ·
6), (7.7), (7.8), (7.9), (7.1)
0) and (7-11) image data are exposed.

At this time, the first line (5.3), (5.4), (5.5), (5.6),
(5.7), (5.7), (5.8), (5.9),
The image data of (5.10), (5.11), (5.12) and the currently exposed (5.0), (5.1), (5.
The image data of (2) and (5 · 13) are arranged in a straight line on the photosensitive drum 6, and (6 · 13) of the second line previously exposed
6), (6.7), (6.8), (6.9), (6.1)
0), (6 · 11) image data and the second exposure
The image data of the lines (6.3), (6.4), (6.5) and (6.12) are also aligned on the photosensitive drum 6 in a straight line. Similarly, while rotating the photosensitive drum 6 line by line, the image data is sent to the LED head 3 one after another and exposed, so that the image data of each line is aligned on the photosensitive drum 6 and exposed. Can be.

As described above, the image data is transmitted to the LED head 3 and exposed in accordance with the amount of the linearity disorder and the amount of inclination of the LED array. Exposure will be on a straight line. Similarly, the image data of the second and subsequent lines is also exposed on a straight line. That is, even if the linearity of the LED array of the LED head 3 is disturbed as shown in the upper part of FIG.

Next, a correction operation according to the fourth embodiment will be described. Note that the drawings used in the first embodiment are appropriately used. First, all memories are cleared, which is performed in the same manner as in the first embodiment. In the fourth embodiment, the data is cleared by storing "0" data in each address of the first to 270th scans of the entire memory 49.

A method of storing yellow image data sent from an external device, that is, a host computer, will be described below. First, “0”, “0”, “0”, and “0” are stored in the address memory 49c shown in FIG.
.., Address data "0" are written in order. Thereby, the address memory 49c of the memory 49Y has 1
Six data "0" are written. This allows
As for the output of the M adder 49e, the value of the bus B4 is
6 will be output.

Then, the control circuit 41 outputs "7" as the initial address value shown in FIG. 4 and issues an instruction to the timing generator 64 to output the load signal LD to the H address counter 49d. 4
The line signal LS of the first line is output to the 9Y L address counter 49b to clear the L address counter 49b.

The operation of storing the received image data in the memory 49Y will be described below with reference to FIGS. 6 and 11. FIG.
Reference numeral 1 denotes a yellow RAM arrangement and an LED according to the fourth embodiment.
FIG. 4 is an explanatory diagram showing a correspondence relationship between heads.

First, upon receiving the first image data corresponding to the first to eighth columns of yellow, the interface unit 50 changes the write control signal WR0 to the R of the yellow memory 49Y.
AM49c. At this time, the L address counter 49
The output of b is "0", and among the outputs of the H address counter 49d, "0" is output to the bus B5 and "7" is output to the bus B4. As a result, the data "0" stored at address 0 is output from the address memory 49c to the bus B3, and the M adder 49e adds the value "0" of the bus B3 and the value "7" of the bus B4. Then, the result "7" is output to the bus B6. During the reception of the image data of the first line, the line signal LS does not change.
The state where "0" and "7" are output to the buses B5 and B4, respectively, is maintained. Since the M addition result is "7", carry Cy is "0", and H adder 49f outputs bus B
5 is added to the carry Cy value "0", and the addition result "0" is output to the bus B7. Therefore, the image data corresponding to the first to eighth columns of the first yellow is designated by the buses B7 = 0, B6 = 7, and B2 = 0 at the timing of the write control signal WR0 as shown in FIG.
0) Stored at address.

Next, the control circuit 41 issues a clock signal CK via the timing generator 64. As a result, the L address counter 49b counts up by one,
"1" is output to the bus B2. Therefore, the data "0" stored at address 1 is read from the address memory 49c.
Is output, the image data corresponding to the next ninth to sixteenth columns is (7.1) at the timing of the write control signal WR0.
Stored at the address. Then, the next clock signal CK is output to count up the L address counter 49b by 1, and "2" is output to the bus B2. Therefore, since "0" stored at address 2 is output from the address memory 49c, the image data corresponding to the next 17th to 24th columns is (7.2) at the timing of the write control signal WR0.
Stored at the address.

When the data is stored, the next clock signal CK is output to count up the L address counter 49b by 1, and "3" is output to the bus B2. Accordingly, since the data "0" stored at address 3 is output from the address memory 49c, the M adder 49e adds the value "0" of the bus B3 and the value "7" of the bus B4, and the addition is performed. The result "7" is output to the bus B6. The image data corresponding to the next 25th to 32nd columns is stored at address (7.3) at the timing of the write control signal WR0. Similarly, the L address counter is incremented by one at the timing of the clock CK, and the M adder 49e outputs the upper address indicating the reference eighth image data to the RAM 49a. The yellow image data is stored one after another in the eighth scanning line shown in FIG.

When the control circuit 41 knows that the image data of the first line has been stored, it outputs a line signal LS (Y) via the timing generator 64. As a result, the H address counter 49d counts up by 1, and outputs "0" on the bus B5 and "8" on the bus B4. Thereafter, similarly to the image data of the first line, the image data of the second line is stored at the row address of the ninth scan shown in FIG. Hereinafter, the third and subsequent lines are similarly stored in the RAM 49a.

As described above, when writing the yellow image data into the memory 49Y, the image data of the first line is always stored at the address of the eighth scan, and thereafter, the second line of image data is stored.
The image data of the line is stored in the address of the ninth scan, and the image data of the third line is stored in the address of the tenth scan.

Next, the operation of recording yellow image data will be described. Note that also in the fourth embodiment, the LED heads 3 of the respective printing mechanisms are assumed to have linearity disorder as shown in FIG. As shown in FIG. 11, the LED array units LY1 and LY5 are
The LED array unit LY2 and the LED array unit LY4 are shifted one line upstream from the LED array unit LY3 in the rotation direction of the photosensitive drum 6 with respect to Y3. Offset, LED
The array part LY6 is shifted by three lines from the LED array part LY3 to the upstream side in the rotation direction of the photosensitive drum 6. These three lines correspond to ΔD1 shown in FIG. The deviation information of each LED array unit is stored in the correction value memory 56.

The addresses of the filled portions in the RAM arrangement shown in FIG. 8 correspond to the deviations of the respective LED array portions of the yellow LED head 3, and the image data sequence of the filled portions is first sent to the LED head 3, and thereafter, If the image data immediately below is sent, the image data of each line is corrected, and can be arranged on the photosensitive drum 6 in a straight line.

Here, the correction value for yellow is calculated as shown in FIG.
1 at the most downstream side in the rotation direction of the photosensitive drum 6
With reference to the ED array unit LY3, the amount of deviation in line units from the LED array unit LY3 is stored in the correction value memory 56 in byte units in the main scanning direction. That is, in the example of FIG. 11, the bytes corresponding to the first to eighth columns, the ninth to sixteenth columns, and the seventeenth to twenty-fourth columns of the LED array unit LY1 are shifted by two lines with respect to the correction reference LED array unit LY3. Therefore, “2”, “2”, and “2” are stored. Since the bytes corresponding to the 25th to 32nd columns, the 33rd to 40th columns, and the 41st to 48th columns of the LED array section LY2 are shifted by one line with respect to the LED array section LY3 of the correction reference, "1" “1”, “1” are stored, and the 49th to 56th columns of the LED array section LY3,
Columns 57-64, Columns 65-72, Columns 73-8
Since the byte corresponding to column 0 has no shift with respect to the LED array unit LY3 of the correction reference, “0”, “0”,
“0”, “0” is stored, and the eighth of the LED array unit LY4 is stored.
Since the bytes corresponding to the 1st to 88th columns and the 89th to 96th columns are shifted by one line with respect to the LED array unit LY3 of the correction reference, "1" and "1" are stored, and the bytes of the LED array unit LY5 are stored. 97th to 104th columns, 105th to 11th
Since the byte corresponding to the two columns is shifted by two lines from the LED array unit LY3 of the correction reference, "2",
“2” is stored, and the 113th to 1st of the LED array unit LY6 are stored.
In the bytes corresponding to the 20th column and the 121st to 128th columns, "3" and "3" are stored because the lines are shifted by three lines with respect to the LED array unit LY3 as the correction reference.

Accordingly, the correction values for yellow are “2”, “2”, “2”, “1”, “1”,
“1”, “0”, “0”, “0”, “0”, “1”,
Sixteen correction data “1”, “2”, “2”, “3”, “3” are sent from the host computer and stored in the correction value memory 56.

The LED array on the most upstream side in the rotation direction of the yellow photosensitive drum 6 is always stored as image data of the eighth scan, and is always read out in the scanning direction as shown in FIG.
The image data is read out in the form of the address of
Transmit to the ED head 3. Hereinafter, a method of sequentially reading the yellow image data stored in the memory 49Y by the above-described operation will be described.

First, the correction value data "2", "2",
“2”, “1”, “1”, “1”, “0”, “0”,
“0”, “0”, “1”, “1”, ““ 2 ”,“ 2 ”,
“3” and “3” are written in the above-described procedure. As a result, the correction value data sequence is stored in order, such as "2" at address 0, "2" at address 1, "2" at address 2, and "1" at address 3 in the address memory 49c. Is done. Then, the control circuit 41 outputs "0" indicating the row of the first scan as the initial address value in FIG. 4, and issues an instruction to the timing generator 64 to output the load signal LD to the H address counter 49d. And outputs the line signal LS of the first line to the L address counter 49b of the memory 49Y,
Clear

The operation of reading image data from the memory 49Y and transmitting it to the LED head 3 will be described below with reference to FIG. To read the first image data corresponding to the first to eighth columns of yellow, a read control signal RD0
To the RAM 49c of the yellow memory 49Y. At this time, the output of the L address counter 49b is "0", and among the outputs of the H address counter 49d, "0" is output to the bus B5 and "0" is output to the bus B4. As a result, the correction value data "2" stored at address 0 is output from the address memory 49c to the bus B3, and the M adder 49e outputs the value "2" of the bus B3 and the value "0" of the bus B4. Are added, and the addition result “2” is output to the bus B6. During the reading of the first image data, since the line signal LS does not change, the state in which “0” and “0” are output to the buses B5 and B4, respectively, is maintained.
Since the M addition result is “2”, the carry Cy is “0”, the output “0” of the bus B5 and the carry Cy value “0” are added in the H adder 49f, and the addition result “0” is added to the bus. Output to B7. Therefore, the first yellow first to first
The image data corresponding to eight columns is bus B7 = 0, bus B6 = 2, and bus B2 = 0 at the timing of the read control signal RD0.
Is read from the address (2.0) shown in FIG.

Next, the control circuit 41 issues a clock signal CK via the timing generator 64. As a result, the L address counter 49b counts up by one,
"1" is output to the bus B2. Therefore, the correction value data “2” stored at the address 1 is output from the address memory 49c, and the image data corresponding to the next ninth to sixteenth columns is (2 ·) at the timing of the read control signal RD0.
1) Read from address. Then, the next clock signal CK is output to count up the L address counter 49b by 1, and "2" is output to the bus B2. Therefore, since "2" stored at address 2 is output from the address memory 49c, the image data corresponding to the next seventeenth to twenty-fourth columns is read from the address (2.2) at the timing of the read control signal RD0. It is. After the reading, the next clock signal CK is output and the L address counter 49b is output.
Is incremented by one, and "3" is output to the bus B2. Therefore, the correction value data “1” stored at address 3 is output from the address memory 49c.
The adder 49e adds the value "1" of the bus 3 and the value "0" of the bus B4, and outputs the addition result "1" to the bus B6. The image data corresponding to the next 25th to 32nd columns is read from the address (1.3) at the timing of the read control signal RD0.

Similarly, the L address counter increases by one at the timing of the clock CK, and the M adder 4
In 9e, the correction value data is added to the upper address indicating the image data of the first scan as the addition reference, and the addition result is R
Output to AM49a. The first yellow image data is (2.0), (2.1), (2.2), (1.
3), (1.4), (1.5), (0.6), (0.
7), (0.8), (0.9), (1.10), (1.
11), (2 ・ 12), (2 ・ 13), (3 ・ 14),
The data is read from the address (3 · 15). However, since the image data at these addresses are all “0”, even if this “0” data is sent to the LED head 3, no exposure is performed.

When the control circuit 41 knows that the first yellow image data has been read, it resets the photosensitive drum 6 to one.
It rotates in the direction of arrow a for the number of lines, and outputs a line signal LS via the timing generator 64. As a result, the H address counter 49d counts up by one, and outputs "0" to the bus B5 and "1" to the bus B4. Similarly, while rotating the photosensitive drum 6 by one line in the direction of arrow a, the second time, the third time,
The fourth image data is read from the RAM array in FIG. 11 and sent to the LED head 3, but the data read so far is "0" and is not exposed.

Next, the photosensitive drum 6 is rotated in the direction of arrow a by one line, and the read control signal RD0 is
Put out to the 9Y RAM 49c. At this time, the output of the L address counter 49b is "0", and among the outputs of the H address counter 49d, "0" is output to the bus B5 and "4" is output to the bus B4. This output indicates the fifth scan as the addition reference. Thereby, the address memory 49c
, The correction value data “2” stored at address 0 is output to the bus B3, and the M adder 49e adds the value “2” of the bus 3 and the value “4” of the bus B4, and the addition is performed. The result "6" is output to the bus B6. During reading of the fifth image data, the line signal LS does not change, so that the state where "0" and "4" are output to the buses B5 and B4, respectively, is maintained.

Since the result of M addition is "6", carry C
y is "0", and the H adder 49f adds the output "0" of the bus B5 and the carry Cy value "0", and outputs the addition result "0" to the bus B7. Therefore, the image data corresponding to the first to eighth columns of yellow is read control signal R
At the timing of D0, the data is read from the address (6.0) shown in FIG. 11 designated by the bus B7 = 0, the bus B6 = 6, and the bus B2 = 0. Next, the control circuit 41 issues a clock signal CK via the timing generator 64. As a result, the L address counter 49b counts up by one, and "1" is output to the bus B2. Accordingly, since the correction value data "2" stored at the address 1 is output from the address memory 49c, the image data corresponding to the next ninth to sixteenth columns is (6.1) at the timing of the read control signal RD0. It is read from the address. Then, the next clock signal CK is output to count up the L address counter 49b by 1, and "2" is output to the bus B2.
Therefore, since "2" stored at address 2 is output from the address memory 49c, the image data corresponding to the next 17th to 24th columns is read from address (6.2) at the timing of the read control signal RD0. It is.

After the reading, the next clock signal CK is issued to count up the L address counter 49b by 1, and "3" is output to the bus B2. Therefore, since the correction value data “1” stored in the address 3 is output from the address memory 49c, the M adder 49e
Is added to the value "1" of the bus B4, and the addition result "5" is output to the bus B6. Next 25th-3rd
Image data corresponding to two columns is read from the address (5.3) at the timing of the read control signal RD0. Similarly, the L address counter is incremented by 1 at the timing of the clock CK, and the M adder 49e adds the correction value data to the upper address indicating the image data of the fifth scan serving as the addition reference, and the addition result is obtained. Since the image data is output to the RAM 49a, the fifth yellow image data is sequentially read from the address of the solid portion shown in FIG. Only when the image data at the address of the solid portion is exposed, the image data at the addresses (714) and (715) in the first line is exposed.

When the control circuit 41 knows that the fifth image data has been read, the photosensitive drum 6 is rotated by one line in the direction of arrow a, and a line signal LS is output via the timing generator 64. As a result, the H address counter 49d counts up by one, and the bus B
5 is output as "0" and the bus B4 is output as "5".
Similarly, the sixth image data is read from the address portion immediately below the solid portion shown in FIG. Hereinafter, the data is similarly read from the RAM 49a after the seventh time. The read image data is stored in the print control circuit 48.
Y and is exposed one after another by the LED pad 3.
As described above, while rotating the photosensitive drum 6 line by line, the image data is sent to the LED head 3 one after another and exposed, so that the image data of each line is aligned on the photosensitive drum 6 and exposed. Can be.

If data describing a straight line is stored as image data of the j-th line, the straight line is a straight line L1 shown in FIG. That is, when the LED array LY3 on the most downstream side in the rotation direction of the photosensitive drum 6, which is the correction reference, is exposed,
The state in which the lines of the line are aligned on a straight line, and the line is transferred to the recording medium is the L1 line in FIG.

Here, the role of the H adder 49f will be described. When the image data of the thirtieth scan is approached while the image data is sequentially read out by the above operation, the H address counter 49d sets “29”, that is, “00” in binary.
At this time, “1”, that is, “0001” in binary, is output to the bus B5, and “13”, that is, “1101”, in binary, is output to the bus B4. An address from which image data of 121 to 128 columns is read, that is, an address (32 · 15) is designated, at which time “15”, that is, “1111” in binary is output to the bus B2, and The correction value "3", that is, "0011" in binary, is output from the address memory 49c to the bus B3, so that the M adder 49e outputs "3" of the bus B3 and the bus B4.
Is added, the result of the addition is "16", that is, an overflow occurs, and "000" is added to the bus B6.
0 "is output and carry Cy =" 1 ".
"0001" of the bus B5 and "1" of Cy by the adder 49f.
Are added, that is, incremented by 1, and the addition result is “0”.
010 ", and this value is output to the bus B7. From the above, the bus B7 is" 0010 "and the bus B6 is" 000 ".
0 "and" 1111 "are output to the bus B2.This address is the address (32.15). From the above, the carry Cy of the M adder 49e and the H adder 49f definitely determine the highest address. It is understood that it is done.

Next, a method of storing magenta image data sent from an external device, that is, a host computer, will be described. FIG. 10 shows a magenta memory 49M.
3 shows the arrangement of the RAM 49a and the disorder of the linearity of the LED head 3. FIG. As shown in FIG.
M1 and the LED array unit LM5 are located upstream of the correction reference LED array unit LM7 in the rotation direction of the photosensitive drum 6.
LED array part LM2 and LED
The array unit LM4 is shifted by three lines upstream of the photosensitive drum 6 with respect to the correction reference LED array unit LM7, and LE
The D array unit LM3 is shifted by four lines upstream of the photosensitive drum 6 with respect to the correction reference LED array unit LM7.
The ED array unit LM6 is shifted by one line upstream of the photosensitive drum 6 with respect to the correction reference LED array unit LM7.
These pieces of deviation information are stored in the correction value memory 56.

Here, as shown in FIG. 7, the yellow H
The distance between the one-line reference LED array LY6 and the magenta H2 line reference LED array LM3 is D2.
As described above, this information is stored in the correction value memory 56 as the resolution in the sub-scanning direction of the apparatus. Assuming that the distance between the printing mechanism P1 and the printing mechanism P2 when the precision of the apparatus is ideally manufactured is D, (D-D2) is a deviation in the sub-scanning direction between the printing mechanisms P1 and P2. .

If the yellow H1 line correction reference LED
Assuming that the distance between the array unit LY3 and the correction reference LED array unit LM7 for the magenta H2 line is the ideal value L,
The magenta image data on the first line of the LED array section LM7 is stored at the same address where the yellow reference LED array section LY3 is stored in the eighth scanning address in FIG. Then, after exposing the image data of the eighth scanning of yellow to the photosensitive drum 6 of the first printing mechanism P1, the recording medium 27 is exposed.
Is conveyed to the photosensitive drum 6 of the second printing mechanism P2 when the image data of the eighth scanning of magenta is exposed to the L line, and the reference LED array part LY3 for yellow and the reference LED for magenta
The toner images exposed on the array portion LM7 and transferred onto the recording medium 27 overlap on a straight line. For example, if the distance D2 is shorter than the ideal distance D by two lines, FIG.
As shown by 0, the image data of the first line is stored at the address of the sixth scan which is shorter by two lines than the ideal address of the eighth scan.

The operation of storing the magenta image data received by the interface unit 50 in the memory 49M is the same as that for the above-described yellow color, and a description thereof will be omitted. However, the operation is the same except that the initial address value is “5”.

As correction value data for magenta,
Disorder of the linearity of the magenta LED array and (D-D
The displacement amount is 2). The correction value data for cyan includes the disturbance of the linearity of the cyan LED array and (D-D
The displacement amount is 3). As the correction value data for black, there are disturbances in linearity of the black LED array,
(D-D4). These values are sent from an external device and stored in the correction value memory 56. When the distance D2 is longer than the ideal distance D by two lines, the tenth line 10 which is two lines longer than the ideal address of the eighth scan.
The image data of the first line is stored at the scanning address.

Next, the operation of recording magenta image data will be described. As described above, if the image data sequence of the solid portion of the RAM arrangement in FIG. Thus, the photosensitive drum 6 can be arranged in a straight line.

Here, the correction value of magenta is shown in FIG.
0 at the most downstream side in the rotation direction of the photosensitive drum 6 shown in the upper part of FIG.
With reference to the ED array unit LM7, the amount of deviation in line units from the LED array unit LM7 is stored in the correction value memory 56 in byte units in the main scanning direction. That is, in the example of FIG. 10, the bytes corresponding to the first to eighth columns, the ninth to sixteenth columns, and the seventeenth to twenty-fourth columns of the LED array unit LM1 are shifted by two lines with respect to the correction-standard LED array unit LM7. Therefore, “2”, “2”, and “2” are stored. Since the bytes corresponding to the 25th to 32nd columns, the 33rd to 40th columns, and the 41st to 48th columns of the LED array unit LM2 are shifted by 3 lines with respect to the correction reference LED array unit LM7, "3", "3", "3" are stored, and the 49th to 56th columns of the LED array unit LM3,
Columns 57-64, Columns 65-72, Columns 73-8
Bytes corresponding to the 0th column, the 81st to 88th columns, and the 89th to 96th columns are provided with a correction reference LED array unit LM7.
Are shifted by 4 lines, so "4", "4",
“4”, “4”, “4”, “4” are stored.

The byte corresponding to the 97th to 104th columns of the LED array unit LM4 is shifted by 3 lines with respect to the correction reference LED array unit LM7. Bytes corresponding to 105 to 112 columns include an LED array unit LM7 for correction reference.
Is shifted by two lines, "2" is stored, and L
Since the byte corresponding to the 113th to 120th columns of the ED array unit LM6 is shifted by one line with respect to the correction reference LED array unit LM7, "1" is stored, and the bytes 121 to 128 of the LED array unit LM7 are stored. Since the byte corresponding to the column does not deviate from the correction reference LED array unit LM7, "0" is stored. Therefore, the correction value for magenta disturbance is “2”,
“2”, “2”, 3 ”,“ 3 ”,“ 3 ”,“ 4 ”,
"4", "4", "4", "4", "4", "3",
Sixteen correction data “2”, “1”, and “0” are sent from the host computer and stored in the correction value memory 56.

Hereinafter, a method of sequentially reading the magenta image data stored in the memory 49M by the above-described operation will be described. First, in accordance with an instruction from the control circuit 41, the memory 4
In the 9M address memory 49c, the magenta correction value data “2”, “2”, “2”, 3 ”,“ 3 ”,
"3", "4", "4", "4", "4", "4",
“4”, “3”, “2”, “1”, and “0” are written in the above-described procedure. As a result, 0 of the address memory 49c is stored.
The magenta correction value data string is stored in order such as "2" at address, "2" at address 1, "2" at address 2, and "3" at address 3. And the control circuit 4
1 outputs "0" indicating the row of the first scan as the initial address value in FIG. 4, and issues an instruction to the timing generator 64 to output the load signal LD to the H address counter 49d. Line signal LS of the first line to the 49M L address counter 49b
Is output to clear the L address counter 49b.

The operation of reading magenta image data from the memory 49M and transmitting it to the LED head 3 will be described below with reference to FIG. In order to read the first image data corresponding to the first to eighth columns of magenta, a read control signal RD0 is output to the RAM 49c of the magenta memory 49M. At this time, the L address counter 4 of the memory 48M
9b is "0" and the H address counter 49d
Are "0" on the bus B5 and "0" on the bus B4.
Is output. Thereby, the address memory 49c
, The correction value data “2” stored at address 0 is output to the bus B3, and the M adder 49e adds the value “2” of the bus B3 and the value “0” of the bus B4, and the addition is performed. The result "2" is output to the bus B6. During the reading of the first image data, since the line signal LS does not change, the state in which “0” and “0” are output to the buses B5 and B4, respectively, is maintained. Since the M addition result is “2”, the carry Cy is “0”, the output “0” of the bus B5 and the carry Cy value “0” are added in the H adder 49f, and the addition result “0” is added to the bus. Output to B7. Therefore, the image data corresponding to the first to eighth columns of the first yellow is transferred to the bus B7 = 0, at the timing of the read control signal RD0.
The data is read out from the address (2 · 0) shown in FIG. 10 designated by the bus B6 = 2 and the bus B2 = 0.

Next, the control circuit 41 issues a clock signal CK via the timing generator 64. As a result, the L address counter 49b counts up by one,
"1" is output to the bus B2. Accordingly, since the correction value data "2" stored at the address 1 is output from the address memory 49c, the image data corresponding to the next ninth to sixteenth columns is (2) at the timing of the read control signal RD0.
1) Read from address. Then, the next clock signal CK is output to count up the L address counter 49b by 1, and "2" is output to the bus B2. Therefore, since "2" stored at address 2 is output from the address memory 49c, the image data corresponding to the next seventeenth to twenty-fourth columns is read from the address (2.2) at the timing of the read control signal RD0. It is. After the reading, the next clock signal CK is output and the L address counter 49b is output.
Is incremented by one, and "3" is output to the bus B2. Accordingly, the correction value data “3” stored at address 3 is output from the address memory 49c.
The adder 49e adds the value "3" of the bus B3 and the value "0" of the bus B4, and outputs the addition result "3" to the bus B6. The image data corresponding to the next 25th to 32nd columns is read from the address (3.3) at the timing of the read control signal RD0.

Similarly, the L address counter increases by one at the timing of the clock CK, and the M adder 4
In 9e, the correction value data is added to the upper address indicating the image data of the first scan as the addition reference, and the result is output to the RAM 49a. The first yellow image data is (2
0), (2.1), (2.2), (3.3), (3.
4), (3.5), (4.6), (4.7), (4.
8), (4.9), (4.10), (4.11), (3)
・ 12), (2 ・ 13), (1.14), (0.15)
Are read from each address, and the image data at these addresses are all "0". Therefore, even if this "0" data is sent to the LED head 3, no exposure is performed.

When the control circuit 41 knows that the first yellow image data has been read, it rotates the photosensitive drum 6 by one line in the direction of arrow a, and outputs a line signal LS via the timing generator 64. Let it. At this time, the output of the L address counter 49b is "0",
Of the output of the H address counter 49d, "0" is output to the bus B5 and "1" is output to the bus B4. This output indicates the second scan as a reference for addition. This allows
The correction value data “2” stored at address 0 is output from the address memory 49 c to the bus B 3,
e is the value "2" of the bus B3 and the value "1" of the bus B4.
Are added, and the addition result “3” is output to the bus B6. During reading of the second image data, since the line signal LS does not change, the state in which “0” and “1” are output to the buses B5 and B4, respectively, is maintained. Since the M addition result is “3”, the carry Cy is “0”,
In the H adder 49f, the output “0” of the bus B5 and the carry C
The y value “0” is added, and the addition result “0” is output to the bus B7.
Is output to Therefore, the image data corresponding to the first to eighth columns of magenta for the second time is designated by the bus B7 = 0, the bus B6 = 3, and the bus B2 = 0 at the timing of the read control signal RD0, as shown in FIG. 0) Read from address.

Next, the control circuit 41 issues a clock signal CK via the timing generator 64. As a result, the L address counter 49b counts up by one,
"1" is output to the bus B2. Therefore, since the correction value data "2" stored at the address 1 is output from the address memory 49c, the image data corresponding to the next ninth to sixteenth columns is (3)
1) Read from address. Then, the next clock signal CK is output to count up the L address counter 49b by 1, and "2" is output to the bus B2. Therefore, since "2" stored at address 2 is output from the address memory 49c, the image data corresponding to the next 17th to 24th columns is read from address (3.2) at the timing of the read control signal RD0. It is. After the reading, the next clock signal CK is output and the L address counter 49b is output.
Is incremented by one, and "3" is output to the bus B2. Accordingly, the correction value data “3” stored at address 3 is output from the address memory 49c.
The adder 49e adds the value "3" of the bus B3 and the value "1" of the bus B4, and outputs the addition result "4" to the bus B6. The image data corresponding to the next 25th to 32nd columns is read from the address (4.3) at the timing of the read control signal RD0.

Similarly, the L address counter increases by one at the timing of the clock CK, and the M adder 4
In 9e, the correction value data is added to the upper address indicating the image data of the second scan serving as the addition reference, and the result is output to the RAM 49a.
The addresses are sequentially read out from the address of the solid portion indicated by 0. Only when the image data at the address of the filled portion is exposed, (5.6), (5.
7), (5.8), (5.9), (5.10), (5.
The image data at the address 11) is exposed.

When the control circuit 41 knows that the second image data has been read, it rotates the photosensitive drum 6 by one line in the direction of arrow a, and outputs a line signal LS via the timing generator 64. As a result, the H address counter 49d counts up by one, and the bus B
5, "0" is output, and "2" is output to bus B4.
Similarly, the second image data is read from the address portion immediately below the solid portion shown in FIG. Hereinafter, the data is similarly read from the RAM 49a after the third time. The read magenta image data is sent to the print control circuit 48M, and is sequentially exposed by the LED head 3.

As described above, while rotating the photosensitive drum 6 one line at a time, the image data is sent to the LED head 3 one after another and exposed, so that the magenta image data of each line is aligned on the photosensitive drum 6 in a straight line. Can be exposed side by side. If data for drawing a straight line is stored as image data of the m-th line, the straight line is a straight line L2 shown in FIG. That is, the LE on the most downstream side in the rotation direction of the photosensitive drum 6 as the correction reference
When the D array LM7 is exposed, the lines of the m-th line that have been exposed before are aligned, and the state in which the lines are transferred to the recording medium is the line L2 in FIG.

In the above description, the operation of printing yellow and magenta separately has been described. However, after the first exposure operation based on the first scanning of yellow is performed as described above,
At the time when the D-th scanning exposure is performed, that is, at the time when the recording medium 27 travels on the ideal D line from the first exposure, the first exposure operation based on the first magenta scanning is performed. Take the timing to do it. Then, while rotating the photosensitive drum 6 of the second printing mechanism P2, image data after the second scan of magenta is sequentially exposed. During this time, the image data after the (D + 1) -th scanning of yellow is also successively exposed while rotating the photosensitive drum 6 of the first printing mechanism P1.

As described above, for yellow, FIG.
At the time when the image data of the first and eighth scans is exposed, the image of the first line is aligned on the photosensitive drum 6 of the first printing mechanism P1. Further, with respect to magenta, the image of the first line is aligned on the photosensitive drum 6 of the second printing mechanism P2 when the image data of the sixth scan in FIG. 10 is exposed.
In this example, since the distance between yellow and magenta is two lines shorter than the ideal D line, the magenta image is exposed two scans, that is, two lines faster. Thus, when the image data of the first line of magenta is transferred to the recording medium 27, the image data of the first line of yellow that has already been transferred can be completely coincident with and overlaid. The same applies to the second and subsequent lines.

Since the same applies to cyan and black, the description is omitted. As described above, yellow, magenta, cyan, and black images can be recorded with color misregistration corrected.

In the fourth embodiment, after the leading edge of the recording medium 27 is detected by the photo interrupter 60, the first printing mechanism P for yellow is fixed at a fixed timing.
The exposure of the LED head 3 of the second printing mechanism P2 related to magenta is started at the fixed timing when the D-line recording medium 27 is run, and then the D-line recording medium 27 is run. The exposure of the cyan LED head 3 of the third printing mechanism P3 is started at the fixed timing, and the LED of the black fourth printing mechanism P4 is finally driven at the fixed timing when the D-line recording medium 27 is run.
Another feature is that exposure of the head 3 can be started.

In the examples shown in FIGS. 10 and 11, the eighth scan is used as the reference for yellow, so that a range of up to ± 7 lines can be corrected.

According to the fourth embodiment, the following effects can be obtained. That is, since the address is changed when reading the image data in the sub-scanning direction in accordance with the color shift information in the correction value memory, the positional shift of the color image can be corrected.
Color shift can be prevented, and desired color reproduction can be easily realized.

Next, a fifth embodiment will be described. FIG.
FIG. 2 is a block diagram illustrating a control circuit according to a fifth embodiment. In the figure, a timing generator 64 is composed of a programmable counter and the like.
1, the clock signal CK and the load signal L
D, a line signal LS, a pulse signal such as a signal R / W, etc., and each memory 49Y, 49M, 49C, 49
B to each element shown in FIG. It is sent to each circuit in FIG. 1 as needed. Clock signal CK (Y), load signal LD (Y), line signal LS (Y), signal R / W
(Y) relates to yellow and is sent to the memory 49Y, where the clock signal CK (M), the load signal LD (M),
The line signal LS (M) and the signal R / W (M) relate to magenta and are sent to the memory 49M, and the clock signal CK
(C), load signal LD (C), line signal LS
(C) and the signal R / W (C) relate to cyan and are sent to the memory 49C, and the clock signal CK (B), the load signal LD (B), the line signal LS (B), and the signal R / W
(B) relates to black and is sent to the memory 49B.

FIG. 13 is a block diagram of the memory 49. The AND circuit 49g has a line signal LS and a signal R /
The logical sum of W is obtained, and the output result CT is output to the clock of the H address counter 49d. The H address counter 49d loads the initial address value sent from the control circuit 41 by the load signal LD, and
The counting starts from the initial address value and counts up at the timing of the output signal CT of the AND circuit 49g. Other configurations are the same as those of the first embodiment.

FIG. 14 shows the arrangement of image data to be recorded in the fifth embodiment in the RAM 49a in the memory 49. As in the above embodiments,
The RAM 49a is composed of image data of 16 bytes (128 columns) in the main scanning direction, and the image data of the first scanning is stored at addresses (0.0), (0.1), ..., (0.15), The image data of the second scan has an address (1 ·
, (1.1),..., (1.15), and the image data of the third scan is stored at addresses (2.0), (2.0).
1), (2.2), ..., (2.15)
The image data up to the 286th scan is stored in the RAM 4 as required.
The data is stored at the address 9a in order.

In the upper part of FIG.
The arrangement of the D array is shown. In the example of FIG.
An example is shown in which the D head 3 has four lines of disturbance in the sub-scanning direction. In the fifth embodiment, as described later, printing is performed twice by the LED head 3 during one line, and the disturbance of the LED array is set to a resolution of 0.5 dots (lines) in the sub-scanning direction. Thus, the printing quality is improved.

The addresses (9.0), (9.1), (8.2), (7.3),
(7.4), (6.5), (5.6), (5.7),
(5.8), (6.9), (6.10), (7.1)
1), (8.12), (9.13), (10.14),
(11 · 15) stores the image data of the first line to be exposed by the LED head 3. Also, the addresses on the upper side of the filled-in portion include the addresses of the first scan (0.0), (0.1), ..., (0.15), the addresses of the second scan (1.0), (1).・ 1), ..., (1 ・ 1
5), third scanning address (2.0), (2.1),...
(2.14), (2.15), address (3
・ 0), (3.1), ..., (3.5), ..., (3.1)
5), address of the fifth scan (4.0), (4.1),
(4.2), ..., (4.13), (4.14), (4.
15), address of the sixth scan (5.0), (5.1),
..., (5.5) and (5.9), (5/10), ...,
(5.15), address (6.0) of the seventh scan, (6.
1), ..., (6.4) and (6.11), (6.1)
2),..., (6 · 15), the address (7 ·
0), (7.1), (7.2) and (7-12), (7
.13), (7-14), (7.15), ninth scan address (8.0), (8.1) and (8.13), (8
.14), (8.15), 10th scan address (9.
14), (9 • 15), address of the eleventh scan (10 •
15) stores non-exposure data “0”.

The address of the diagonally shaded portion immediately below the filled portion for two scans stores the image data of the second line to be exposed by the LED head 3. That is, the addresses (11.0), (11.1.), (10.2), (9.
3), (9.4), (8.5), (7.6), (7.
7), (7.8), (8.9), (8.10), (9.
11), (10 ・ 12), (11 ・ 13), (12 ・ 1)
4) and (13.15) store the image data of the second line to be exposed by the LED head 3. The address between the first line and the second line is "0" which is not exposed.
Data is stored.

Similarly, the image data of the third line to be exposed by the LED head 3 is stored at each address of the grid portion under the second scan in which the image data of the second line is stored. The non-exposure "0" data is stored in the address immediately below. Hereinafter, the image data of the next line is stored every two scans, and the non-exposed “0” data is stored in the meantime.

Next, the stored image data is displayed by an LED.
The operation of sending the light to the head for exposure will be described. First,
The address (0.0) of the first scan in the sub-scanning direction in FIG.
The image data of (0.1),... (0.15) is transmitted to the LED head 3 for exposure. However, since the image data of the first scan is "0" of non-exposure, it is exposed by the LED head 3. Never. Next, the photosensitive drum 6 is rotated in the direction of arrow a by 0.5 line, and similarly, the image data of the second scan in the sub-scanning direction is transmitted to the LED head 3 for exposure. Since the image data of the second scan is also all “0” data, it is not exposed by the LED head 3. Further, the photosensitive drum 6 is rotated by 0.5 lines in the direction of arrow a, and the image data of the third scan in the sub-scanning direction is
Although transmitted to the head 3, the image data of the third scan is also all “0” data, and is not exposed by the LED head 3. Hereinafter, the photosensitive drum 6 until the fifth scan
Is rotated by 0.5 lines in the direction of the arrow a, and the image data of each scan is transmitted to the LED head 3. Since all the image data of each scan is "0" data,
There is no exposure by the head 3.

Then, the photosensitive drum 6 is rotated by 0.5 lines in the direction of arrow a, and similarly, image data of the sixth scan in the sub-scanning direction is transmitted to the LED head 3 for exposure. As a result, the addresses (5.6), (5.7),
The LED of the LED head 3 according to the image data of (5.8)
The photosensitive drum 6 is exposed by the array unit LM5. Other LED
Array units LM1, LM2, LM3, LM4, LM6, L
M7, LM8, LM9, LM10 and LM11 are not exposed because the non-exposure data “0” is sent.

Next, the photosensitive drum 6 is rotated by 0.5 lines in the direction of arrow a, and similarly, the image data of the seventh scan in the sub-scanning direction of FIG. As a result, the addresses (6.5) and (6.
9), LED head 3 based on the image data of (6.10)
The photosensitive drum 6 is exposed by the LED array units LM4 and LM6. Here, the LED array unit LM4
And the LED array unit LM6 is shifted by 0.5 line in the sub-scanning direction with respect to the LED array unit LM5.
Since the photosensitive drum 6 is rotated by 0.5 lines in the direction of arrow a, the image data of the first line previously exposed by the LED array unit LM5 and the current LED array unit LM4
The image data of the first line exposed by the LED array unit LM6 is aligned on the photosensitive drum 6 in a straight line. Other LED array units LM1 to LM3, LM7
Since LM11 receives the non-exposure data “0”,
Not exposed.

Further, the photosensitive drum 6 is rotated by 0.5 lines in the direction of the arrow a, and the image data of the eighth scan in the sub-scanning direction of FIG. Thus, the addresses (7.0), (7.1) and (7.2)
Are sent to the LED array unit LM1 and the LED array unit LM2 of the LED head 3, and the image data of the address (7.3) and (7.4) of the solid portion of the first line is The non-exposed image data of the address (7.5) is sent to the LED array unit LM3, and the non-exposed image data of the address (7.5) is sent to the LED array unit LM4.
7), the image data of the second line of (7.8) is LED
It is sent to the array unit LM5, and the addresses (7.9), (7.
The non-exposure image data of 10) is sent to the LED array unit LM6 of the LED head 3, and the image data of the first line at the address (7.11) is sent to the LED array unit LM of the LED head 3.
M7, the address (7.12), (7.13),
The non-exposed image data of (7.14) and (7.15) respectively correspond to the LED array units LM8, LM9, LM10 and LM1.
Sent to 1.

As a result, the image data of the first line previously exposed by the LED array unit LM5 and the previous L
The image data of the first line exposed by the ED array unit LM4 and the LED array unit LM6 and the addresses (7.3), (7.4) of the solid portion of the first line exposed by the current LED array units LM3 and LM7 ), (7.1)
The image data 1) is aligned on the photosensitive drum 6 in a straight line. In the same manner, by rotating the photosensitive drum by 0.5 line at a time and sequentially sending image data of each scan, each line can be exposed without color shift.

As described above, the image data is stored in the RAM in accordance with the amount of the linearity disorder and the amount of inclination of the LED array.
When sending the data to the LED head, the data is sent in the order of scanning shown in FIG. Will be. Similarly, the image data of the second and subsequent lines is also exposed on a straight line. That is,
Even if the linearity of the LED array of the LED head 3 is disturbed as shown in the upper part of FIG. 14, the disturbance can be corrected. The detailed operation will be described later.

Next, the printing operation of test pattern image data in the fifth embodiment will be described. For simplicity of explanation, as shown in FIG. 14, the LED head 3 has 128 dots, that is, 16 bytes of LEDs in the main scanning direction.
The following description will be made on the assumption that an array is provided and an image of 537 lines is recorded in the sub-scanning direction. Therefore, the output value of the L address counter 49b shown in FIG. 13 is composed of 0 to 15, that is, 4 bits, and the address memory 49c also has 0 to 15 bits.
15 (4 bits) and outputs the H address counter 49d
Is composed of 0 to 537, that is, 10 bits. Of these, the bus B4 has 4 bits and the bus B5 has 6 bits. Therefore, the M adder 49e is a 4-bit adder,
The H adder 49f is composed of a 6-bit adder.

First, when the test switch 68 is turned on, the control circuit 41 issues an instruction to the timing generator 64 to output a line signal LS to the L address counter 49b of all the memories 49,
Clear b. Thereby, the L address counter 49
b prepares to count up from "0". The control circuit 41 outputs the write control signal WR1 to the address memory 49c, and stores the address data "0" in the address memory 49c.
Write to. Next, the control circuit 41 outputs one pulse of the clock signal CK from the timing generator 64, outputs the write control signal WR1 to the address memory 49c, and writes the address data “0” to the address memory 49c. Hereinafter, the clock signal CK is sequentially output from the timing generator 64 one pulse at a time, and the write control signal W
While outputting R1 to the address memory 49c, address data “0”, “0”,..., “0” is sequentially written to the address memory 49c. As a result, 16 pieces of "0" data are written to the address memory 49c of all the memories 49. Thus, the output of the M adder 49e outputs the value of the bus B4 as it is to the bus B6.

After writing "0" data in the address memory 49c, the control circuit 41 outputs "0" as an initial address value to the H address counters 49d of all the memories 49. Further, the control circuit 41 issues an instruction to the timing generator 64, issues a load signal LD to the H address counter 49d as shown in FIG.
The line signal LS of the line is output to clear the L address counter 49b. During the memory clear operation, the signal R
/ W outputs a high level as shown in FIG. As a result, the line signal LS is directly output as the output CT of the AND circuit 49g as shown in FIG. Then, the control circuit 41 controls the interface unit 5
“0” data is output to all the memories 49 via “0”.

Since the start outputs of the H address counter 49d and the L address counter 49b are "0" and the address data stored in the address memory 49c are all "0", the two adders 49e, 49
The output of f is also “0”. Therefore, the control circuit 41 transmits the “0” data transmitted via the interface unit 50 to the buses B2, B6, B at the timing of the write control signal WR0.
7 is written to the address (0, 0) shown in FIG. Next, the L address counter 49b is incremented by 1 at the timing of "1" of the clock signal CK shown in FIG. 15, that is, "1" is output to the bus B2. Next, the "0" data transmitted via the interface unit 50 is transferred to the buses B2 and B2 at the timing of the write control signal WR0.
6 and B7 are stored at the address (0.1) shown in FIG. The L address counter 49b is incremented by 1 by the clock signal CK "2", "2" is output to the bus B2, and "0" data is written in the write control signal WR0.
At the address (0.2). Hereinafter, the L address counter 49b is set to 1 by the clock signal CK.
The data “0” sent one after another via the interface unit 50 is stored while the data is only up. And
The L address counter 49b is incremented by 1 by the clock signal CK "15", "15" is output to the bus B2, and "0" data is stored at the address (0.15) at the timing of the write control signal WR0. Is done. As described above, all the “0” data of the first scan is stored.

Next, the timing generator 64
The scanning line signal LS is output. As a result, the AND circuit 49g outputs the output CT shown in FIG. 15 (i) to the H address counter 49d, and one pulse is input to the clock of the H address counter 49d, so that the H address counter 49d increases by one. , And the L address counter 49b is cleared. Therefore, at this time, the bus B5 is "0", the bus B4 is "1", the bus B2 is "0",
"0" is output to the bus B3, and the output of the bus B6 becomes "1" as a result of adding the buses B3 and B4.
The output of the bus B7 becomes "0". The image data transmitted at the beginning of the second line is written into the (1.0) address designated by the buses B2, B6, and B7 shown in FIG. 14 at the timing of the write control signal WR0. Thereafter, similarly, the “0” data transmitted via the interface unit 50 is sequentially transmitted to and written into the memory 49 in synchronization with the timing of the write control signal WR0. The line signal LS is 1
It is output each time the data is stored in the memory 49 for the scanning.

Thereafter, "0" data is stored in the image data up to the 537th scan in the same manner, and the processing is terminated. Thereby, all the memories 49 are cleared.

Next, the writing operation of the test pattern image data will be described. The control circuit 41 outputs "0" as the initial address value shown in FIG. 13, issues an instruction to the timing generator 64, and sends the load signal corresponding to each memory 49 to the H address counter 49d as shown in FIG. An LD is output, and a line signal LS of the first line corresponding to each memory 49 is output to the L address counter 49b of all the memories 49.
Clear As a result, the start outputs of the H address counter 49d and the L address counter 49b become "0". Further, as shown in FIG. 15, the line signal LS is output every time one line is written. The test pattern generating circuit 67 sends the test pattern image data to the memory 49 one after another in accordance with the timing of the write control signal WR0 via the interface unit 50 and writes the same. Incidentally, the timing generator 64 outputs a signal R / W following the line signal LS. Hereinafter, this writing operation will be described with reference to FIG.

Since the start outputs of the H-address counter 49d and the L-address counter 49b are "0" and the address data stored in the address memory 49c are all "0", the two adders 49e, 49
The output of f is also “0”. Therefore, the test pattern image data transmitted at the beginning of the first line is written at the timing (0, 0) shown in FIG. 14 designated by the buses B2, B6, and B7 at the timing of the write control signal WR0. next,
At the timing of "1" of the clock signal CK shown in FIG. 15, the L address counter 49b increases by 1, that is, "1" is output to the bus B2. The next transmitted test pattern image data is stored at the address (01) shown in FIG. 14 designated by the buses B2, B6 and B7 at the timing of the write control signal WR0. The L address counter 49b is incremented by 1 by the clock signal CK "2", "2" is output to the bus B2, and the test pattern image data is (0.multidot.0) at the timing of the write control signal WR0.
2) Stored at address. Hereinafter, while the L address counter 49b is incremented by 1 by the clock signal CK,
The test pattern image data of the first line shown in FIG. 14 is stored one after another. Then, “1” of the clock signal CK
5, the L address counter 49b is incremented by one, "15" is output to the bus B2, and the test pattern image data becomes (0.
15) Stored at address. As described above, all the test pattern image data of the first line is stored.

Next, the timing generator 64
The line signal LS of the line is output, and then the signal W / R shown in FIG. 15 is output. As a result, the AND circuit 49g outputs the output CT to the H address counter 49 as shown in FIG.
d, and the clock of the H address counter 49d is 2
Pulses are input, the H address counter 49
d increases by 2 and the L address counter 49b is cleared. Therefore, at this time, "0" is output to the bus B5, "2" is output to the bus B4, "0" is output to the bus B2, and "0" is output to the bus B3.
And the result of adding the bus B4 is "2", and the output of the bus B7 is "0". The image data transmitted at the beginning of the second line is transferred to the bus B at the timing of the write control signal WR0.
It is written to the address (2 · 0) shown in FIG. 14 designated by 2, B6 and B7.

Next, the L address counter 49b is incremented by 1 in response to the "1" of the clock signal CK on the second line shown in FIG. 15, that is, "1" is output to the bus B2. At this time, the output of the bus B6 is "2",
Output remains at "0" and does not change. The next transmitted test pattern image data is stored at the address (2.1) shown in FIG. 14 designated by the buses B2, B6 and B7 at the timing of the write control signal WR0. The L address counter 49b is set in response to the clock signal CK “2” of the second line.
Rises by one, "2" is output to the bus B2, and the test pattern image data is stored at the address (2.2) at the timing of the write control signal WR0. Hereinafter, the test pattern image data of the second line shown in FIG. 14 is successively stored while the L address counter 49b is incremented by 1 by the clock signal CK. Then, the L address counter 49b is incremented by 1 by the clock signal CK "15" of the second line, "15" is output to the bus B2, and the test pattern image data is written in the write control signal WR.
It is stored at address (2.15) at the timing of 0. As described above, the test pattern image data of the second line is all stored in the second scan.

Hereinafter, since two pulses CT are input to the clock of the H address counter 49d, the test pattern image data from the third line to the 256th line is scanned by one while the H address counter 49d is incremented by two. Is stored everywhere. Here, while rotating the photosensitive drum 6 by 0.5 lines, the stored test pattern image data is transmitted to the LED head 3 in order from the first line to the 256th line, and the photosensitive drum 6 is exposed and recorded. If the toner image is recorded on the medium 27, the disorder of the linearity of the LED array of the LED head 3 is printed as it is.

The image data of the test pattern stored in the memory 49 is transmitted to the print control unit 48, and the test pattern shown in FIG. 7 is printed. H1, H2, H3, H shown in FIG.
4 is read by the high-performance scanner on the recording medium 27 on which the main scanning direction line 4 is printed, and the read information of the distances D2, D3, and D4 and the information on the disorder of the linearity of the LED head 3 are sent to the control circuit 41 via the interface unit 50. send. When the control circuit 41 receives these pieces of information, it converts the information data into resolution information of the color recording apparatus 1, that is, the number of dots or lines, and stores the information in the correction value memory 56.

By reading the recording medium 27 on which the main scanning direction lines H1, H2, H3, and H4 have been printed with a high-performance scanner, the second, third, and fourth printing mechanisms P2, P2, It is possible to know the distance and inclination of P3 and P4 apart. Data read by this high-performance scanner is converted into 0.5-line units, and the data is transferred from an external device such as a host computer to the interface unit 50.
Is received by the control circuit 41 and stored in the correction value memory 56.

Hereinafter, these correction operations will be described with reference to the displacement amounts shown in FIG. First, the operation of correcting the yellow image data and storing it in the memory will be described. First, correction of the H1 line serving as a reference line will be described with reference to FIG. FIG. 16 shows the RAM 49 of the yellow memory 49Y.
3 shows an example of the arrangement of “a” and the disorder of the linearity of the LED head 3. As shown in the figure, the LED array section LY12
Is shifted by 0.5 lines upstream of the rotation direction of the photosensitive drum 6 with respect to the LED array unit LY13, the LED array unit LY11 corresponds to one line, the LED array unit LY10 corresponds to 1.5 lines, and the LED array unit LY1 and the LED array unit LY9 correspond to two lines, and the LED array units LY2 and L
The ED array section LY8 has 2.5 lines, the LED array section LY3 and the LED array section LY7 have 3 lines,
The array section LY4 and the LED array section LY6 correspond to 3.5 lines, and the LED array section LY5 corresponds to 4 lines.
It is shifted to the upstream side in the rotation direction of the photosensitive drum 6 with respect to the ED array section LY13. Four lines of the displacement amount of the LED array section LY5 correspond to # D1 shown in FIG. These pieces of deviation information are stored in the correction value memory 56.

If the image data of the first line is stored in the solid portion of the RAM arrangement in FIG. 16, the image data of the first line can be corrected and aligned on the photosensitive drum 6 in a straight line. become. Further, data “0” which is not exposed by the above-mentioned memory clear is stored in the upper address portion of the filling portion, and the second address to be exposed by the LED head 3 at the address of the filling portion under two scans is stored.
The image data of the line is stored. Similarly, the image data of the third line to be exposed by the LED head 3 is stored at each address in the second scan where the image data of the second line is stored. Hereinafter, similarly, the image data of each line is sequentially stored every other scan. As mentioned above,
The deviation amount of 0.5 line corresponds to one scan on the RAM arrangement.

Here, the correction value for the yellow H1 line is set to 0 from this LED array unit LY13 based on the LED array unit LY13 on the most upstream side in the rotation direction of the photosensitive drum 6 shown in the upper part of FIG. The deviation amount in .5 line units is stored in the correction value memory 56 in byte units in the main scanning direction. That is, in the example of FIG. 16, the bytes corresponding to the first to eighth columns and the ninth to 16th columns of the LED array unit LY1 are shifted by four scans (two lines) with respect to the LED array unit LY13 of the correction reference. So, "4",
“4” is stored in the correction value memory 56. In the byte corresponding to the 17th to 24th columns of the LED array unit LY2, "5" is stored because the scan is shifted by 5 scans (2.5 lines) with respect to the LED array unit LY13 of the correction reference.
The bytes corresponding to the 25th to 32nd and 33rd to 40th columns of the ED array section LY3 include the LED array section L of the correction reference.
Since it is shifted 6 scans (3 lines) from Y13,
"6" is stored, and the 41st to 48th of the LED array unit LY4 are stored.
The byte corresponding to the column is shifted by 7 scans (3.5 lines) with respect to the LED array unit LY13 of the correction reference, so that "7" is stored and the 49th of the LED array unit LY5 is stored.
"8" and "8" are stored in the bytes corresponding to the ~ 56th column and the 57th to 64th columns, since they are shifted by 8 scans (4 lines) with respect to the correction reference LED array unit LY13.

The bytes corresponding to the 65th to 72nd columns of the LED array unit LY6 include the correction reference LED array unit L
Since it is shifted by 7 scans (3.5 lines) with respect to Y13, “7” is stored and the 73rd to 73th LED arrays LY7 are stored.
Since the byte corresponding to 80 columns is shifted by 6 scans (3 lines) with respect to the LED array unit LY13 of the correction reference, "6" is stored therein, and the 81st of the LED array unit LY8 is stored.
Bytes corresponding to ~ 88 columns have correction reference LEDs
Since it is shifted by 5 scans (2.5 lines) with respect to the array unit LY13, "5" is stored, and the byte corresponding to the 89th to 96th columns of the LED array unit LY9 is stored in the correction reference LED array unit LY13. Is shifted by 4 scans (2 lines), so “4” is stored and the LED array section LY1 is stored.
In the byte corresponding to the 97th to 104th columns of 0, three scans (1.5
Since the line is shifted, “3” is stored, and 2 bytes are stored in the byte corresponding to the 105th to 112th columns of the LED array unit LY11 with respect to the correction reference LED array unit LY13.
Since the scanning is shifted (one line), “2” is stored and L
Since the byte corresponding to the 113th to 120th columns of the ED array unit LY12 is shifted by one scan (0.5 line) with respect to the correction reference LED array unit LY13, it is “1”.
Is stored, and the 121st to 128th of the LED array unit LY13 are stored.
Since the byte corresponding to the column is a reference, "0"
Is stored. Therefore, the correction values for yellow are “4”, “4”, “5”, “6”,
"6", "7", "8", "8", "7", "6",
16 correction data items “5”, “4”, “3”, “2”, “1”, “0” are sent from the host computer,
It is stored in the correction value memory 56.

It is assumed that the LED array section farthest from the yellow correction reference LED array section is always stored in the image data of the 16th scan in a thick dotted line frame. FIG.
In the example, the 49th to 5th corresponding to the LED array section LY5
The image data of the six columns and the 57th to 64th columns is stored at the address of the image data of the 16th scanning line.

A method of storing yellow image data sent from an external device, that is, a host computer, as shown in FIG. 16, will be described below. First, in accordance with an instruction from the control circuit 41, the correction value data “4”, “4”,
"5", "6", "6", "7", "8", "8",
"7", "6", "5", "4", "3", "2",
“1” and “0” are written in the above-described procedure. As a result, the correction value data sequence is sequentially stored in the address memory 49c, such as "4" at address 0, "4" at address 1, "5" at address 2, and "6" at address 3. Is done. Then, the control circuit 41 outputs “7” indicating the eighth scan as the initial address value shown in FIG. 4 and issues an instruction to the timing generator 64 to output H to the memory 49Y.
The load signal LD (Y) is output to the address counter 49d, and the H address counter 49d is started from the initial address "7". Further, the line signal LS of the first line is sent to the L address counter 49b of the memory 49Y.
(Y) is output to clear the L address counter 49b. “7” indicating the eighth scan is different from “15” indicating the sixteenth scan from MA of the disorder of the linearity of the LED array.
This is a value obtained by subtracting the X value 8 (8 in the example of FIG. 16 because it corresponds to 4 lines).

Hereinafter, the operation of storing the received image data in the memory 49Y will be described with reference to FIG. Upon receiving the first image data corresponding to the first to eighth columns of yellow, the interface unit 50 receives the write control signal WR0 (Y).
To the RAM 49c of the yellow memory 49Y. At this time, the output of the L address counter 49b is "0", and among the outputs of the H address counter 49d, "0" is output to the bus B5 and "7" is output to the bus B4. As a result, the correction value data "4" stored at address 0 is output from the address memory 49c to the bus B3, and the M adder 49e outputs the value "4" of the bus 3 and the value "7" of the bus B4. Are added, and the addition result “11” is output to the bus B6. While receiving the image data of the first line,
Since the line signal LS does not change, the bus B5 and the bus B4
Hold the state where "0" and "7" are output, respectively. Since the M addition result is "11", the carry Cy is "0", and the H adder 49f adds the output "0" of the bus B5 and the carry Cy value "0". Output to B7. Therefore, the image data corresponding to the first to eighth columns of the first yellow is transferred to the bus B7 = 0 and the bus B6 = 1 at the timing of the write control signal WR0.
1, designated by bus B2 = 0 (11.
0) is stored at the address.

Next, the control circuit 41 issues a clock signal CK (Y) via the timing generator 64. As a result, the L address counter 49b counts up by one, and "1" is output to the bus B2. Accordingly, since the correction value data "1" stored at the address 1 is output from the address memory 49c, the image data corresponding to the next ninth to sixteenth columns is output at the timing of the write control signal WR0 (Y). 11.1) Stored at address. Then, the next clock signal CK is output to count up the L address counter 49b by 1, and "2" is output to the bus B2. Therefore, the address memory 49c outputs "5" stored at the address 2, so that the next 17th to 24th data is output.
The image data corresponding to the column is a write control signal WR0
It is stored at the address (12.2) at the timing of (Y).

When stored, the next clock signal CK
(Y) is issued, the L address counter 49b is incremented by 1, and "3" is output to the bus B2. Therefore, since the correction value data “6” stored in the address 3 is output from the address memory 49c, the M adder 49e
Adds the value "6" of the bus B3 and the value "7" of the bus B4, and outputs the addition result "13" to the bus B6. The image data corresponding to the next 25th to 32nd columns is stored at the address (13.3) at the timing of the write control signal WR0 (Y). Similarly, the L address counter is incremented by one at the timing of the clock CK (Y), and the M adder 49e adds the correction value data to the upper address indicating the image data of the eighth scan serving as the reference, and adds the correction value data to the RAM 49a. Output, the yellow image data of the first line is
6 are stored one after another at the addresses of the painted portions.

When the control circuit 41 knows that the image data of the first line has been stored, it outputs a line signal LS (Y) and a signal R / W via the timing generator 64. As a result, the H address counter 49d counts up by 2, and outputs "0" on the bus B5 and "9" on the bus B4. Similarly, the image data of the second line is stored in the address portion immediately below the solid portion shown in FIG. Hereinafter, the third and subsequent lines are similarly stored in the RAM 49a.

Here, the role of the H adder 49f will be described. While the image data is being stored one after another by the above operation, if the image data of the 28th scan is approached, the H address counter 49d sets “27”, that is, “00” in binary.
In this case, "1", that is, "0001" in binary, is output to the bus B5, and "11", that is, "1011" in binary, is output to the bus B4. The address at which the image data of 17 to 24 columns is to be written, that is, the address (32.2) is designated, and at that time, "2", that is, "0010" in binary is output to the bus B2. Based on the correction value "5", that is, the binary number "0101" is output from the address memory 49c to the bus B3, so that in the M adder 49e, "5" of the bus B3 and "11" of the bus B4.
Is added, the result of the addition is "16", that is, an overflow occurs, "0000" is output to the bus B6, the carry Cy = "1", and the H adder 49
At f, "0001" of the bus B5 and "1" of Cy are added, that is, incremented by 1, and the addition result is "0010".
And this value is output to the bus B7. As described above, the bus B7 outputs "0010", the bus B6 outputs "0000", and the bus B2 outputs "0010". This address is the address (32.2). From the above, it is understood that the most significant address is definitely determined by the carry Cy of the M adder 49e and the H adder 49f.

Next, the operation of correcting magenta image data and storing it in the memory will be described. First, the correction of the magenta H2 line will be described with reference to FIG. As shown in FIG. 14, the LED array units LM4 and LM6
The LED array units LM3 and LM7 are shifted by 0.5 line from the ED array unit LM5 in the direction opposite to the rotation direction of the photosensitive drum 6, and the LED array units LM2
And LM8 for 1.5 lines, LED array section LM1
And LM9 are LED array units LM5 for two lines, respectively.
Is shifted in a direction opposite to the rotation direction of the photosensitive drum 6. These pieces of deviation information are stored in the correction value memory 56.

As described above, if the image data of the first line is stored in the solid portion of the RAM arrangement in FIG. Can be arranged. Further, non-exposure data “0” is stored in the address above the solid portion, and LE is stored in the address immediately below the solid portion.
The image data of the second line to be exposed by the D head 3 is stored. Similarly, the image data of the third line to be exposed by the LED head 3 is stored in each address of the lattice portion. Hereinafter, the image data of the fourth line and thereafter are stored in the same manner every two scans. As described above, the deviation amount of 0.5
The line corresponds to one scan on the RAM arrangement.

Here, as a correction value for the magenta H2 line, with reference to the LED array section LM5 on the most upstream side in the rotation direction of the photosensitive drum 6 shown in the upper part of FIG. The deviation amount in .5 line units is stored in the correction value memory 56 in byte units in the main scanning direction. That is, in the example of FIG. 14, the LED array unit LM1
In the bytes corresponding to the 1st to 8th columns and the 9th to 16th columns, "4" and "4" are stored because they are shifted by 4 scans (2 lines) with respect to the correction reference LED array unit LM5. doing. Bytes corresponding to the 17th to 24th columns of the LED array unit LM2 include a correction reference LED array unit LM.
Because it is shifted by 3 scans (1.5 lines) from 5,
"3" is stored, and the 25th to 32nd LED arrays LM3 are stored.
Column, the bytes corresponding to the thirty-third to fortieth columns are shifted by two scans (one line) with respect to the correction reference LED array unit LM5, and therefore “2” and “2” are stored.
Since the byte corresponding to the 41st to 48th columns of the array unit LM4 is shifted by one scan (0.5 line) with respect to the correction reference LED array unit LM5, “1” is stored.
49th to 56th columns and 57th to 6th columns of the ED array unit LM5
Bytes corresponding to 4 columns and 65th to 72th columns include:
Since it is a reference, "0", "0", "0" are stored.

Since the bytes corresponding to the 73rd to 80th columns and the 81st to 88th columns of the LED array unit LM6 are shifted by one scan (0.5 line) with respect to the correction reference LED array unit LM5, " 1 ”,“ 1 ”is stored and LED
The byte corresponding to the 89th to 96th columns of the array unit LM7 is shifted by two scans (one line) with respect to the LED array unit LM5. The bytes corresponding to the columns
Since 3 scans (1.5 lines) are shifted from LM5, “3” is stored and the 105th of the LED array unit LM9 is stored.
Since "4" is stored in the byte corresponding to ~ 112 columns because it is shifted by 4 scans (2 lines) with respect to LM5,
Since the byte corresponding to the 113th to 120th columns of the LED array unit LM10 is shifted by 5 scans (2.5 lines) with respect to the LM5, "5" is stored, and the bytes 121 to 128 of the LED array unit LM11 are stored. Since the byte corresponding to the column is shifted by 6 scans (3 lines) from LM5, "6" is stored. Therefore, the correction values for magenta are “4”, “4”, “3”,
“2”, “2”, “1”, “0”, “0”, “0”,
"1", "1", "2", "3", "4", "5",
The 16 correction data “6” are sent from the host computer and stored in the correction value memory 56.

The description will be made on the assumption that the displacement amount between the printing mechanisms P1 and P2 described above is (D−D2) = + 2 lines. That is, the description will be made assuming that the ideal distance D is shorter by two lines. Of the image data of the first line of magenta of the present embodiment, the image data corresponding to the LED array unit located on the most downstream side from the correction reference LED array unit is always {16− (D−D2) × 2}. It shall be stored at the scanning address. Here, the value “16” in the above equation indicates the sixteenth scan. In this example, the image data of the first line corresponding to the LED array unit LM11 is stored at the address of the twelfth scan, and accordingly, the image data of the 49th to 72th columns corresponding to the correction reference LED array unit LM5 is It is stored at the address of 6 scans. (D-D2) has a minus sign.

The distance D2 between the H1 line printed by the yellow reference LED array section LY5 and the H2 line printed by the magenta reference LED array section LM11 shown in FIG. The magenta image data of the first line is stored at the address of the twelfth scan, and the yellow LED array unit LY5 is stored at the address of the sixteenth scan. The difference between the scans corresponds to four scans, that is, two lines, and magenta is stored at an address two lines upstream. After exposing the yellow 16th scan image data to the photosensitive drum 6 of the first printing mechanism P1, the recording medium 27 is transported to the ideal D line, and the magenta sixth scan image data is transferred to the photosensitive drum 6 of the second printing mechanism P2. 6, the magenta exposure position is the position where the (D-D2) line recording medium 27 has been conveyed from the position where the image data of the first line of the eighth scanning of yellow was exposed. That is, (D-
Since 2) is D2, the yellow LED array section LY
5 and the toner image transferred on the recording medium 27 after being exposed by the magenta LED array unit LM11 completely overlap. In this way, the deviation in the sub-scanning direction is corrected.

The operation of storing the magenta image data received by the interface unit 50 in the memory 49M is the same as the case of the above-described yellow color, and the description is omitted. However, the initial address value is set to “5” and the memory 4
The correction value data stored in the 9M address memory 49b is “4”, “4”, “3”, “2”, “2”, “1”,
“0”, “0”, “0”, “1”, “1”, “2”,
The operations are the same, although they are different from “3”, “4”, “5”, and “6”. As described above, the correction value data for magenta includes the disorder of the linearity of the magenta LED array and the distance of (D-D2). In addition, the correction value data for cyan includes disturbance of the linearity of the cyan LED array and a distance of (D-D3). The correction value data relating to black includes disturbance of linearity of the black LED array and a distance of (D-D4). These values are sent from an external device and stored in the correction value memory 56.

By the above, yellow and magenta RAM
The operation of reading and printing the image data written in 49a will be described. The control circuit 41 issues an instruction to the timing generator 64, outputs a line signal LS to the L address counter 49b of the memories 49Y and 49M, and clears the L address counter 49b. Thus, the L address counter 49b prepares to count up from “0”. The control circuit 41 receives the write control signal WR
1 is output to the address memory 49c of the memories 49Y and 49M, and the address data “0” is written. Next, the control circuit 41 outputs one pulse of the clock signal CK from the timing generator 64, outputs the write control signal WR1 to the address memory 49c, and writes the address data “0”. Hereinafter, the clock signal CK is sequentially output from the timing generator 64 one pulse at a time, and the write control signal WR1 is output to the address memory 49c, and the address memory 49c becomes “0”, “0”,. Write address data in order. Thereby, the memory 49
Sixteen "0" data are written in the Y, 49M address memory 49c. Thus, the output of the M adder 49e outputs the value of the bus B4 as it is to the bus B6.

Next, the control circuit 41 outputs "0" as an initial address value to the H address counter 49d of the memories 49Y and 49M. Further, the control circuit 41 issues an instruction to the timing generator 64, issues a load signal LD (Y) to the H address counter 49d of the memory 49Y, and outputs the first signal to the L address counter 49b of the memory 49Y as shown in FIG. The line signal LS of the line is output to clear the L address counter 49b of the memory 49Y. As a result, the start outputs of the H address counter 49d and the L address counter 49b of the memory 49Y become "0". Then, the control circuit 41 outputs the read control signal R
While sequentially outputting D0 (Y) to the RAM 49a of the memory 49Y, the read control signal R is sequentially read from the image data at the address (0,0) stored in the RAM 49a of the memory 49Y.
In accordance with the timing of D0 (Y), the print control circuit 48
The image data is transmitted to Y. The print control circuit 48 </ b> Y converts the sent image data into the yellow LED head 3.
To a form that can be sent to the yellow LED head 3
Send to The line signal LS (Y) is output each time it is stored in the memory 49 for one scan.

Hereinafter, the yellow image data up to the 2 × D scanning is similarly transmitted to the print control circuit 48Y. Here, recording of magenta is also started.

While reading the yellow image data up to the 2 × D scanning from the memory 49Y and transmitting it to the LED head 3 to form an image, after exposing the yellow first scanning image data to the recording medium Since the reference numeral 27 is traveling on the D line, the timing for exposing the image data of the first scan of magenta is adopted here. Then, the second printing mechanism P2
While rotating the photosensitive drum 6, the image data after the second scan of magenta is sequentially exposed. During this time, the image data after the 2 × D scanning of yellow is also successively exposed while rotating the photosensitive drum 6 of the first printing mechanism P1. As described above, for yellow, the first color in FIG.
At the time when the image data of six scans is exposed, the first printing mechanism P
The images of the first line are aligned on one photosensitive drum 6. Further, with respect to magenta, the image of the first line is aligned on the photosensitive drum 6 of the second printing mechanism P2 when the image data of the twelfth scan in FIG. 14 is exposed. After the yellow first line image is formed on the photosensitive drum 6 of the first printing mechanism P1, the recording medium 27 is transported by D lines, and the magenta first line image data is
When the image data is transferred to No. 7, the image data can be completely coincident with the image data of the first line of yellow. The same applies to the second and subsequent lines. The following recording operation is as described in detail above.

The same applies to cyan and black, and a description thereof will be omitted. As described above, yellow, magenta, cyan, and black images can be recorded with color misregistration corrected.

In this embodiment, a timer is provided in the control circuit 41 in order to detect that the recording medium 27 has been conveyed by the distance D lines, and the recording medium 27 is moved by the timer. It detects that the D line has been conveyed. Since the printing mechanisms are arranged at equal intervals in the distance D line, by repeatedly using this timer, the recording medium 27 is conveyed from the first printing mechanism P1 to the second printing mechanism P2 by the distance D line. The control circuit 41 detects that the recording medium 27 is exposed by the distance D from the second printing mechanism P2 to the third printing mechanism P3.
The control circuit 41 detects that the line has been conveyed, starts exposure of the third printing mechanism P3, and further controls that the recording medium 27 has been conveyed by the distance D lines from the third printing mechanism P3 to the fourth printing mechanism P4. The circuit 41 detects and detects the fourth printing mechanism P4
, And these timings can be set to a fixed value. Therefore, as the number of timers, after the photo sensor 60 detects the leading end of the recording medium 27,
Only a timer for counting the distance to the exposure start timing of the first printing mechanism P1 for yellow and a timer for repeatedly counting the distance D line are required. This timer is a so-called counting means, and may be configured in the timing generator 64.

According to the fifth embodiment, the following effects can be obtained. That is, when a color image is superimposed and a color image is to be recorded in a desired color, even if a color misregistration occurs due to a misregistration of the color image, the amount of color misregistration is stored in the correction value memory at twice the density of the sub-scanning resolution. By storing and then changing the address when writing image data in the sub-scanning direction in accordance with the color shift information in the correction value memory, the color image misalignment can be corrected in 0.5-line units, so that fine color shift adjustment is possible. And desired color reproduction can be easily realized.

In the fifth embodiment, an example is shown in which one line in the sub-scanning direction is divided into two, and one line is divided into two times. The correction may be performed in line units. In this manner, as long as the capacity of the memory is allowed, the accuracy can be improved by making the correction unit smaller.

In each of the above embodiments, a nonvolatile memory is used as the correction setting means. However, a dip switch may be provided, and the correction amount may be set in the dip switch.

Although the light emitting element of the LED head has been described as having 128 dots, actually, for example, if the recording medium is A4 size, the resolution is 300 DPI and the resolution is 2560 dots.
That is, 2560 arrangements may be used.

In the above-described embodiment, the address memory for storing the correction value data has a capacity in the unit of bytes in the main scanning direction. You may make it increment by a unit. For example, in the case where there are 2560 recording elements, the capacity of the address memory is 32 in byte units.
Although 0 bytes are required, and a shift of 160 lines can be corrected in theory, however, such a shift does not actually occur so much, so the block is divided into blocks of 128 dots, that is, 16 bytes (4 bits). As a result, the number of block divisions becomes 20, and the capacity of the address memory for storing the correction value data is only 20 bytes, so that the configuration of the LSI circuit is simplified and the device can be constructed at low cost. In particular, as the resolution of the apparatus improves and the number of recording elements increases, the effect increases. In this case, as the address for the address memory, the lower 4 bits of the address specifying the byte in the main scanning direction may be discarded.

Further, the high-performance scanner may be directly connected to the interface section 50 so that the control circuit receives the read data.

Next, a sixth embodiment of the present invention will be described. FIG. 17 is a block diagram illustrating a print control circuit according to the sixth embodiment. In the sixth embodiment, a step of a printing result generated from a linear inclination of a print head is reduced. The print control circuit according to the sixth embodiment is provided for each image forming unit, as in the above-described embodiments, and converts the image data sent from the memory according to the designation from the control circuit that controls the entire apparatus. LED for image forming unit
The data is transmitted to the LED head in a form that can be transmitted to the head.

In FIG. 17, a print control circuit 71 according to the sixth embodiment includes a read address generation unit 72 used when reading image data from a memory (not shown) and a write address used when writing image data into the memory. A generating unit 73, an address selector 74 for switching addresses, and a data converting unit 75 for converting data read from the memory into a form to be transferred to an LED head (not shown)
It has.

The CPU A / D is an address and data bus from a control circuit (not shown), and is used to set in advance the number of dots of one line, the number of dots for switching diagonal correction lines, and the like. The setting of the line switching dot number for oblique correction is performed when the LED head is linearly inclined, the degree of the inclination is measured in advance, and the line switching timing described later is determined based on the measurement result. The number of dots is set.

At the time of image input, the READ / WRITE signal is set to the WRITE side, and WDATA and WCLK are sent from the host computer. Based on this, the timing for writing data to the memory and the count-up of the address are performed. .
When data is written, the READ / WRITE signal is set to the READ side,
A read address is generated and counted up based on a data load signal such as HDLD and HDCLK to the LED head and a data transfer clock. Although not shown in FIG. 17, the address is divided into a line address and a read address, and the line address on the read side is increased by 2 bits. It is to be regarded as a line.

FIG. 18 is a block diagram showing a main part of read address generating section 72. In the figure, the read address generator 72 includes a flip-flop 81, a line counter 82, a latch 83, an incrementer 84, a dot counter 85, and an equal comparator 86.

Next, the operation of the sixth embodiment will be described.
First, reset the entire system with PAGERESET before starting data transfer. Next, the transfer clock HDCLK to the LED head
, The dot counter 85 counts the dots. The value counted here is output to the equal comparator 86. The number of line switching dots is input to the equal comparator 86, and the equal comparator 86 compares the count value with the number of line switching dots, and outputs a positive value when the count value becomes the same value as the number of line switching dots.

The output of the equal comparator 86 is input to the dot counter 85 and the line counter 82. With this input, the dot counter 85 is reset and counts up to the next switching point. When the output of the equal comparator 86 is input to the line counter 82, the line counter 82 counts up or down. When the line counter 82 counts down, the LED head is tilted upward to the right with respect to the recording medium conveyance direction. When the line counter 82 counts up, the LED head is tilted downward to the right with respect to the recording medium conveyance direction. In this case, whether to count down or count up is determined in advance by a previous line-next line signal.

FIG. 19 is an explanatory diagram showing transfer data.
This example shows transfer data when the LED head is tilted to the right with respect to the recording medium conveyance direction. As shown in the figure, the data to be transferred is switched to the next line on the way, and the data of one line is transferred separately four times.

The output of the line counter 82 is used as a line address by truncating the lower two bits. When the transfer of one line of data is completed, the HDLD signal for transferring data to the LED head becomes positive. Based on this, a line address serving as a reference is loaded into the line counter 82. The flip-flop 81 generates this load timing. The latch 83 is for holding a reference address. The incrementer 84 adds 1 to the address for counting up the reference address. With the above operation, a read line address and a dot address are generated. Although not shown in the figure, the dot address is used by cutting off the lower 3 bits when the memory data access is 8 bits.

FIG. 20 shows an LED according to the sixth embodiment.
FIG. 3 is an explanatory diagram illustrating a positional relationship between a head and image data. In FIG. 20, the cells in the horizontal direction correspond to the lines, the LED head 3 is inclined downward and to the right, and the hatched portions indicate the data positions. As shown in the figure, one line is printed four times, and if the resolution in the sub-scanning direction is 1200 DPI, one line of data is printed four times in a 300 DPI width with a ４ light amount.

FIG. 21 is an explanatory diagram showing a print result. As shown in the figure, in the sixth embodiment, since the printing is performed at four times the resolution, the step of the horizontal line when the LED head is inclined is small.

As described above, according to the sixth embodiment,
When the LED head is inclined linearly, the same line is switched to an adjacent line in the middle and printing is performed a plurality of times, thereby making it possible to reduce a step generated in a printing result.

In the above embodiments, a color electrophotographic printer has been described as an example. However, the present invention can be applied to a line type ink jet printer, a thermal transfer printer, and the like.

[0239]

As described above in detail, according to the present invention, it is possible to easily correct color misregistration caused by a recording head when a color image is superimposed and printed by an electric means, and to provide an inexpensive color recording apparatus. realizable.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a control unit according to a first embodiment.

FIG. 2 is a structural diagram illustrating a color printing apparatus according to the first embodiment.

FIG. 3 is a partially cutaway perspective view showing a color image forming unit.

FIG. 4 is a block diagram illustrating a memory according to the first embodiment;

FIG. 5 is an explanatory diagram showing a correspondence relationship between a magenta RAM arrangement and an LED head.

FIG. 6 is a timing chart showing the operation of the first embodiment.

FIG. 7 is an explanatory diagram showing a print result of a test pattern.

FIG. 8 is an explanatory diagram showing a correspondence relationship between a yellow RAM arrangement and an LED head.

FIG. 9 is an explanatory diagram illustrating a correspondence relationship between a magenta RAM arrangement and an LED head according to the second embodiment.

FIG. 10 illustrates a magenta RAM according to a fourth embodiment.
It is explanatory drawing which shows the correspondence of arrangement | positioning and LED head.

FIG. 11 illustrates a yellow RAM according to a fourth embodiment.
It is explanatory drawing which shows the correspondence of arrangement | positioning and LED head.

FIG. 12 is a block diagram illustrating a control system according to a fifth embodiment.

FIG. 13 is a block diagram illustrating a memory according to a fifth embodiment;

FIG. 14 illustrates a magenta RAM according to the fifth embodiment.
It is explanatory drawing which shows the correspondence of arrangement | positioning and LED head.

FIG. 15 is a timing chart showing the operation of the fifth embodiment.

FIG. 16 is an explanatory diagram showing a yellow RAM arrangement and a disorder of an LED head according to the fifth embodiment.

FIG. 17 is a block diagram illustrating a print control circuit according to a sixth embodiment.

FIG. 18 is a block diagram illustrating a main part of a read address generation unit according to a sixth embodiment.

FIG. 19 is an explanatory diagram showing transfer data in a sixth embodiment.

FIG. 20 is an explanatory diagram showing a positional relationship between an LED head and data in the sixth embodiment.

FIG. 21 is an explanatory diagram illustrating a print result according to the sixth embodiment.

[Explanation of symbols]

 41 control circuit 48Y, 48M, 48C, 48B print control circuit 49Y, 49M, 49C, 49B memory 49a RAM 49b L address counter 49c address memory 49d H address counter 49e M adder 49f H adder

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Shuichiro Ogata 4-11-22 Shibaura, Minato-ku, Tokyo Inside the company offshore data (72) Inventor Hiroyuki Inoue 4-11-22 Shibaura, Minato-ku, Tokyo Shares (72) Inventor Daisuke Kobayashi 4-11-11 Shibaura, Minato-ku, Tokyo, Japan Incorporated Data (72) Inventor Kazuyoshi Yoshida 4-11-22, Shibaura, Minato-ku, Tokyo Stock Company Oki data

Claims (5)

[Claims] 1. A printing apparatus, comprising: a memory unit capable of writing and reading image data; and a recording unit extending in a main scanning direction and forming an image in accordance with image data read from the memory unit. A plurality of image recording apparatuses, wherein: a correction value setting unit configured to set a correction value according to a shift amount in the sub-scanning direction of the plurality of printing units and a shift amount between the plurality of printing units; An image recording apparatus comprising: an address control unit that controls an address of the memory unit based on a correction value and writes image data to the memory unit. 2. The recording medium according to claim 1, further comprising: a plurality of recording units arranged at predetermined regular intervals in a transport direction of the recording medium, and a timer for measuring a time for transporting the recording medium at the predetermined regular intervals. 2. The image recording apparatus according to claim 1, wherein, based on an image formation start timing of an uppermost recording section, a start of image formation of a downstream recording section is instructed in accordance with a result of measuring the time by the timing section. 3. A signal generating means for arranging the plurality of recording units at predetermined regular intervals in a recording medium conveyance direction and generating a signal for detecting a leading end of the recording medium upstream of the most upstream recording unit. And a timing unit that counts the time until the image formation start timing of the recording unit on the most upstream side based on the signal from the signal generation unit. The most upstream side according to the result of the time measurement by the timer unit Along with instructing the start of image formation of the recording section, the timer measures the time for the recording medium to be conveyed at the predetermined equal intervals, and instructs the image forming start of the downstream recording section according to the result of the time measurement. The image recording device according to claim 1. 4. The image recording apparatus according to claim 1, wherein said correction value setting means sets a correction value of a shift amount of said plurality of recording units in a sub-scanning direction at a density of an integral multiple of a resolution in a sub-scanning direction. 5. A recording unit which has a memory unit capable of writing and reading image data and extends in the main scanning direction and forms an image in accordance with the image data read from the memory unit. A plurality of image recording apparatuses, wherein: a correction value setting unit configured to set a correction value according to a shift amount in the sub-scanning direction of the plurality of printing units and a shift amount between the plurality of printing units; An image recording apparatus, comprising: an address control unit that controls an address of the memory unit based on a correction value and reads image data from the memory unit.