JPH11331711A - Device and method for picking up image - Google Patents

Device and method for picking up image

Info

Publication number
JPH11331711A
JPH11331711A JP11059459A JP5945999A JPH11331711A JP H11331711 A JPH11331711 A JP H11331711A JP 11059459 A JP11059459 A JP 11059459A JP 5945999 A JP5945999 A JP 5945999A JP H11331711 A JPH11331711 A JP H11331711A
Authority
JP
Japan
Prior art keywords
signal charge
signal
accumulation period
charge accumulation
period
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11059459A
Other languages
Japanese (ja)
Other versions
JP3179438B2 (en
Inventor
Hiroto Kobuchi
寛仁 菰渕
Yuji Matsuda
祐二 松田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP05945999A priority Critical patent/JP3179438B2/en
Publication of JPH11331711A publication Critical patent/JPH11331711A/en
Application granted granted Critical
Publication of JP3179438B2 publication Critical patent/JP3179438B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To prevent color slurrings on an image-pickup screen by independently transferring readout electric charges and making uniform a 1st pixel signal charge storage period (T 11) read charges, a signal charge storage period (T 21) shorter than T 11, and a signal charge storage period (T 22) shorter than a 2nd pixel signal charge storage period (T 12). SOLUTION: Incident light is photoelectrically converted by a one-unit pixel photoelectric conversion part and its charges are transferred to an HCCD and passed through a CDS and a clamp circuit, and a signal circuit makes a decision regarding signal saturation, a signal selecting circuit selects the output and a signal process circuit performs an arithmetic process to reproduce an image. The signal process circuit converts a T 21 (T 22) storage period signal voltage into Vsig (T 21). Since the pixel information is read out independently, the calculation Vsig'(T 11)=b.V(T 11) can be performed, taking in consideration the ratio (b=T 12/T 11) of the storage periods and the T 21 and T 22 signal charge storage periods which can be made uniform in the timing from TAS 1 to TAS 12 with the clocks.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、入射光量取扱い範
囲を高照度側に拡大するための固体撮像装置およびその
駆動方法、特に、映像信号のフィールドあるいはフレー
ム等に代表される一定の信号電荷蓄積期間に対し、少な
くとも2回以上の信号電荷蓄積期間を設定した上、前記
信号電荷蓄積期間におけるそれぞれの信号電荷を外部の
フィールドメモリあるいはフレームメモリを用いず再生
する事により、入射光量取扱範囲を高照度側へ拡大する
事を特徴とした固体撮像装置とその駆動方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device and a driving method thereof for expanding the handling range of incident light amount to a high illuminance side, and more particularly, to a fixed signal charge represented by a field or a frame of a video signal. By setting at least two signal charge accumulation periods for the period, and reproducing each signal charge in the signal charge accumulation period without using an external field memory or frame memory, the incident light amount handling range can be increased. The present invention relates to a solid-state imaging device characterized by being enlarged to the illuminance side and a driving method thereof.

【0002】[0002]

【従来の技術】従来技術においては、入射光量取扱い範
囲を拡張する際、1フレームあるいは1フィールド期間
中に少なくとも2回以上の互いに異なる蓄積期間を設
定、例えば、1フィールド期間TF中において、従来の
垂直走査期間に相当する第1の蓄積期間T1と垂直ブラ
ンク期間中に前記第1の蓄積期間よりも短い第2の蓄積
期間T2の設定を行い、第1の蓄積期間中に得られた信
号電荷Q1は利得1にて、第2の蓄積期間中に得られた
信号電荷Q2は利得(T1/T2)倍にて再生する。こ
こで、信号電荷Q1が飽和電荷量に達している場合に
は、信号電荷Q2の信号情報を用いることにより、結果
として、従来比(T1/T2)倍の入射光量取扱い範囲
を実現する。
2. Description of the Related Art In the prior art, when extending the incident light amount handling range, at least two or more different accumulation periods are set in one frame or one field period. The first accumulation period T1 corresponding to the vertical scanning period and the second accumulation period T2 shorter than the first accumulation period are set during the vertical blank period, and the signal charges obtained during the first accumulation period are set. Q1 has a gain of 1, and the signal charge Q2 obtained during the second accumulation period is reproduced at a gain (T1 / T2) times. Here, when the signal charge Q1 has reached the saturated charge amount, by using the signal information of the signal charge Q2, as a result, an incident light amount handling range that is (T1 / T2) times as large as that of the related art is realized.

【0003】上述の入射光量取扱い範囲の拡大のための
素子駆動方法に関しては、外部フレームメモリを用いず
に済ませる提案例(特開昭63−250980号公報)
がある。前記提案例は、現行CCDの構成における4画
素、計8枚の転送電極で3つの信号パケットをつくり、
第1の蓄積期間による2画素混合の信号電荷を2パケッ
ト、第2の蓄積期間による4画素混合の信号電荷を1パ
ケットとして用いることにより1フィールド期間TF中
2回に分割された蓄積期間において得られる信号電荷を
連続して垂直CCDにて転送する手法が記載されてい
る。
With respect to the above-described element driving method for expanding the incident light amount handling range, a proposal example in which an external frame memory is not required (Japanese Patent Laid-Open No. 63-250980).
There is. In the proposed example, three signal packets are created with a total of eight transfer electrodes, that is, four pixels in the current CCD configuration,
By using two packets of signal charges of two pixels mixed in the first accumulation period as two packets and one packets of signal charges of four pixels mixed in the second accumulation period, it is obtained in two accumulation periods divided in one field period TF. A method is described in which the received signal charges are continuously transferred by a vertical CCD.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、前記4
画素混合の信号電荷を加算混合するためには、時刻的に
ΔTずれた状態で2回読み出す必要がある為、同一パケ
ットの中に蓄積期間がT2と(T2+ΔT)の互いに異
なった2種の信号電荷が存在する事となる。互いに期間
ΔTずつ異なる2種の蓄積期間による前記4画素混合の
信号電荷を、前記利得(T1/T2)倍で区別なく演算
すれば、被写体光量に応じて前記第2の蓄積期間T2を
調整した場合、色ずれ、輝度ずれ等の不都合が生じる。
SUMMARY OF THE INVENTION
In order to add and mix the signal charges of the pixel mixture, it is necessary to read twice with a time shift of ΔT. Therefore, two different signals having different accumulation periods T2 and (T2 + ΔT) in the same packet. There will be charges. If the signal charges of the four pixels mixed by the two kinds of accumulation periods different from each other by the period ΔT are calculated without distinction by the gain (T1 / T2) times, the second accumulation period T2 is adjusted according to the amount of light of the subject. In such a case, inconveniences such as color shift and brightness shift occur.

【0005】本発明は、このような従来の撮像方法の課
題を考慮し、そのような課題を解消した撮像方法を提供
することを目的とする。
An object of the present invention is to provide an imaging method that solves such a problem in consideration of the problems of the conventional imaging method.

【0006】[0006]

【課題を解決するための手段】本発明は、VCCDの方
向に連続する2単位画素を構成する第1および第2の画
素のうち、前記第1の画素に対して、信号電荷蓄積期間
(T11)と前記信号電荷蓄積期間(T11)よりも短
い信号電荷蓄積期間(T21)を設定し、前記第2の画
素に対しては、信号電荷蓄積期間(T12)と前記信号
電荷蓄積期間(T12)よりも短い信号電荷蓄積期間
(T22)を設定し、前記4つの各蓄積期間内で蓄積さ
れた電荷を前記VCCDに前記信号電荷蓄積期間(T1
1)、前記信号電荷蓄積期間(T12)、前記信号電荷
蓄積期間(T21)、前記信号電荷蓄積期間(T22)
の順番で読み出し、前記信号電荷蓄積期間(T21)に
読み出された電荷と前記信号電荷蓄積期間(T22)に
読み出された電荷は加算し、前記信号電荷蓄積期間(T
11)に読み出された電荷と前記信号電荷蓄積期間(T
12)に読み出された電荷と前記加算された電荷の3つ
の電荷をVCCD内において独立に転送し、前記信号電
荷蓄積期間(T11)に読み出された電荷と前記信号電
荷蓄積期間(T21)と前記信号電荷蓄積期間(T2
2)を揃えることにより色ずれを抑えることを特徴とす
るCCDの駆動方法である。
According to the present invention, a signal charge accumulation period (T11) is applied to the first pixel of the first and second pixels constituting two continuous unit pixels in the direction of the VCCD. ) And a signal charge accumulation period (T21) shorter than the signal charge accumulation period (T11). For the second pixel, a signal charge accumulation period (T12) and the signal charge accumulation period (T12) are set. A shorter signal charge accumulation period (T22) is set, and charges accumulated in each of the four accumulation periods are stored in the VCCD in the signal charge accumulation period (T1).
1) The signal charge accumulation period (T12), the signal charge accumulation period (T21), the signal charge accumulation period (T22)
, And the charge read during the signal charge accumulation period (T21) and the charge read during the signal charge accumulation period (T22) are added, and the signal charge accumulation period (T
11) and the signal charge accumulation period (T
The charge read out in 12) and the added charge are independently transferred in the VCCD, and the charge read out in the signal charge accumulation period (T11) and the signal charge accumulation period (T21). And the signal charge accumulation period (T2
This is a CCD driving method characterized in that the color shift is suppressed by aligning the method 2).

【0007】また、VCCDの方向に連続する2単位画
素を構成する第1および第2の画素のうち、前記第1の
画素に対して、信号電荷蓄積期間(T11)と前記信号
電荷蓄積期間(T11)よりも短い信号電荷蓄積期間
(T21)を設定し、前記第2の画素に対しては、信号
電荷蓄積期間(T12)と前記信号電荷蓄積期間(T1
2)よりも短い信号電荷蓄積期間(T22)を設定し、
前記4つの各蓄積期間内で蓄積された電荷を前記VCC
Dに前記信号電荷蓄積期間(T11)、前記信号電荷蓄
積期間(T12)、前記信号電荷蓄積期間(T21)、
前記信号電荷蓄積期間(T22)の順番で読み出し、前
記信号電荷蓄積期間(T21)に読み出された電荷と前
記信号電荷蓄積期間(T22)に読み出された電荷は加
算し、前記信号電荷蓄積期間(T11)に読み出された
電荷、及び前記信号電荷蓄積期間(T12)に読み出さ
れた電荷、及び前記加算された電荷の3つの電荷をVC
CD内において独立に転送し、前記信号電荷蓄積期間
(T11)に読み出された電荷と前記信号電荷蓄積期間
(T21)と前記信号電荷蓄積期間(T22)を揃える
ことを特徴とするCCDの駆動手段を有することにより
色ずれを抑えることを特徴とした固体撮像装置である。
Further, of the first and second pixels constituting two unit pixels continuous in the direction of the VCCD, a signal charge accumulation period (T11) and a signal charge accumulation period (T11) are applied to the first pixel. A signal charge accumulation period (T21) shorter than T11) is set. For the second pixel, a signal charge accumulation period (T12) and the signal charge accumulation period (T1) are set.
A signal charge accumulation period (T22) shorter than 2) is set,
The charge accumulated in each of the four accumulation periods is referred to as VCC.
D indicates the signal charge accumulation period (T11), the signal charge accumulation period (T12), the signal charge accumulation period (T21),
The signal charges are read out in the order of the signal charge storage period (T22), and the charge read out during the signal charge storage period (T21) and the charge read out during the signal charge storage period (T22) are added to form the signal charge storage period. The charge read during the period (T11), the charge read during the signal charge accumulation period (T12), and the added charge are denoted by VC.
A CCD drive characterized in that the charges are transferred independently in a CD, and the charges read in the signal charge accumulation period (T11) are aligned with the signal charge accumulation period (T21) and the signal charge accumulation period (T22). This is a solid-state imaging device characterized by suppressing color misregistration by having means.

【0008】[0008]

【発明の実施の形態】以下、本発明の一実施の形態につ
いて、図面を参照しながら説明する。 図1に本発明の
一実施の形態に係る撮像方法に用いられる固体撮像装置
の1例を示す。100;単位画素には110;VCCD
における4枚の転送電極が対応し、連続する2単位画素
に対応する合計8枚の転送電極に対しては、それぞれ、
101;φV1転送電極、102;φV2転送電極、1
03;φV3転送電極、104;φV4転送電極、10
5;φV5転送電極、106;φV6転送電極、10
7;φV7転送電極、108;φV8転送電極の8相の
転送クロックが印加される。102;φV2転送電極お
よび106;φV6が印加される電極には、109;読
み出しゲートが形成される。第1図においては、1層目
のポリシリコンを用いて1つの読み出し電極に対して、
2つの読み出しゲートが設けられているが、読み出し電
極は1層目あるいは2層目どちらのポリシリコンを利用
してもよい。また、従来のCCDを用いた場合でもVC
CD方向において隣接する2画素を一括して1画素と考
えても差し支えない。図2以降の素子駆動例において
は、図1の構造によるもので説明をおこなっている。
An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows an example of a solid-state imaging device used in an imaging method according to an embodiment of the present invention. 100; 110 for unit pixel; VCCD
, Four transfer electrodes correspond to each other. For a total of eight transfer electrodes corresponding to two consecutive unit pixels,
101; φV1 transfer electrode, 102; φV2 transfer electrode, 1
03; φV3 transfer electrode, 104; φV4 transfer electrode, 10
5; φV5 transfer electrode, 106; φV6 transfer electrode, 10
7; φV7 transfer electrode, 108; 8-phase transfer clock of φV8 transfer electrode is applied. A readout gate 109 is formed on the electrode to which 102; φV2 transfer electrode and 106; φV6 are applied. In FIG. 1, for one readout electrode using the first layer of polysilicon,
Although two read gates are provided, the read electrode may use either the first layer or the second layer of polysilicon. In addition, even when a conventional CCD is used, VC
Two pixels adjacent in the CD direction may be considered as one pixel at a time. In the example of driving the elements shown in FIG. 2 and subsequent figures, the description is based on the structure shown in FIG.

【0009】図2、図3、図4には、図1に於て示した
固体撮像素子を用いて、本発明の実施の形態を示す。図
2に、通常のTVフレームの201;A-FIELDお
よび203;B−FIELDにおける232;奇数ライ
ン画素と233;偶数ライン画素、それぞれの信号電荷
蓄積ならびに読み出し、転送のタイミングを示す。23
2;奇数ライン画素と233;偶数ライン画素は、あら
かじめ、公知の縦抜き電子シャッター動作(VOD-s
weep)により蓄積期間開始のタイミングを一致させ
ておく。233;偶数ライン画素は224;T11の期
間中に入射した信号により205;偶数ライン第1信号
電荷を得る。VCCDへの読み出し動作は210;TAF
1のタイミングで行われる。一方、232;奇数ライン
画素は225;T12の期間中に入射した信号により2
06;奇数ライン第1信号電荷を得、VCCDへの読み
出し動作は211;TAF21のタイミングで行われる。さ
らに、202;V-Blank期間において、233;
偶数ライン画素は227;T21の期間中に入射した信
号により207;偶数ライン第2信号電荷を得る。VC
CDへの読み出し動作は212;TAS1のタイミングで
行われる。一方、232;奇数ライン画素は227;T
21と同一の蓄積期間に設定された228;T22の期
間中に入射した信号により208;奇数ライン第2信号
電荷を得、VCCDへの読み出し動作は213;TAS21
のタイミングで行われる。ここで、202;V-Bla
nk期間中において、被写体の高輝度な領域を撮像する
ために行う227;T21および228;T22の蓄積
時間の制御は全フィールド期間226;TFに占める2
29;VOD-sweep期間を調整することにより行
う。203;B-FIELDに関しても、同様の操作を
行うが、図2に示す様に、214;奇数ライン第1信号
電荷の蓄積期間と215;偶数ライン第1信号電荷の蓄
積期間を入れ換えても良い。
FIGS. 2, 3 and 4 show an embodiment of the present invention using the solid-state imaging device shown in FIG. FIG. 2 shows the timings of signal charge accumulation, readout, and transfer of 232; odd-line pixels and 233; even-line pixels in a normal TV frame 201; A-field and 203; B-field 232; 23
2; Odd line pixels and 233; Even line pixels are set in advance by a known vertical electronic shutter operation (VOD-s
(weep) to match the start timing of the accumulation period. 233; Even line pixel 224; Obtains even line first signal charge 205 by signal incident during period T11. Read operation to VCCD is 210; TAF
It is performed at the timing of 1. On the other hand, 232; an odd line pixel is 225;
06: The first signal charge of the odd-numbered line is obtained, and the read operation to the VCCD is performed at the timing of 211; TAF21. Further, in the 202; V-Blank period, 233;
The pixel of the even-numbered line obtains 207; second-line signal charge of the even-numbered line according to the signal input during the period of 227; T21. VC
The read operation to the CD is performed at the timing of 212; TAS1. On the other hand, 232; odd line pixel is 227; T
228 set in the same accumulation period as 21; 208 by the signal incident during the period of T22; the second signal charge of the odd-numbered line is obtained, and the reading operation to the VCCD is 213; TAS21.
It is performed at the timing of. Here, 202; V-Bla
During the nk period, the control of the accumulation time of 227; T21 and 228; T22, which is performed to image a high-luminance area of the subject, is performed in the total field period 226;
29: Performed by adjusting the VOD-sweep period. The same operation is performed for 203; B-FIELD, but as shown in FIG. 2, 214: the storage period of the odd-line first signal charges and 215; the storage period of the even-line first signal charges may be switched. .

【0010】図3、図4に読み出しおよび転送のタイミ
ングを示す。210;TAF1のタイミングで読み出され
た240;信号電荷はVCCD内を1画素分転送され、
211;TAF21のタイミングでは、241;信号電荷が
読み出される。図3においては、210;TAF1のタイ
ミングから211;TAF21のタイミングまで、20クロ
ックで行っている。このあと、212;TAS1のタイミ
ングから213;TAS21のタイミングまでを、20クロ
ックで揃えることにより、227;T21と228;T
22の蓄積期間を揃える事が可能となる。さらに、20
7;偶数ライン第2信号電荷に相当する242;信号電
荷は20クロック期間において1画素分転送された後、
図3に示すように、212;TAS21のタイミングで20
8;奇数ライン第2信号電荷に相当する243;信号電
荷を重畳して読み出すことにより混合され、以降VCC
D内を8相クロックにより転送される。この例において
は、227;T21と228;T22の蓄積期間を20
クロックとしたが、クロック数の限定を受けない事は言
うまでもない。また、さきに述べたように、227;T
21と228;T22の蓄積期間は211;TAF21より
212;TAS1までの期間を増減することにより制御さ
れ、これに応じて229;VOD-sweep期間の増
減を行う。
FIGS. 3 and 4 show timings of reading and transferring. 210; 240 read out at the timing of TAF1; signal charges are transferred by one pixel in the VCCD;
At the timing of 211; TAF21, 241; signal charges are read. In FIG. 3, from the timing of 210; TAF1 to the timing of 211; TAF21, the operation is performed at 20 clocks. Thereafter, the timing from 212; TAS1 to the timing of 213; TAS21 is adjusted by 20 clocks, thereby obtaining 227; T21 and 228;
It is possible to make 22 accumulation periods uniform. In addition, 20
7; 242 corresponding to the second signal charge of the even-numbered line; after the signal charge is transferred by one pixel in the 20 clock period,
As shown in FIG. 3, at the timing of 212;
8; 243 corresponding to the odd-numbered line second signal charges; mixed by reading out the signal charges in a superimposed manner;
D is transferred by an eight-phase clock. In this example, the accumulation period of 227; T21 and 228;
Although the clock is used, it goes without saying that the number of clocks is not limited. Also, as mentioned earlier, 227; T
21 and 228; the accumulation period of T22 is controlled by increasing or decreasing the period from 211; TAF21 to 212; TAS1, and accordingly the 229; VOD-sweep period is increased or decreased.

【0011】図5に、本発明の実施の形態を示す。ま
た、取り扱い入射光量範囲拡大の効果を図6に示す。入
射光は、300;1単位画素光電変換部において、光電
変換され、301;電子シャッター時二画素混合信号電
荷、302;フィールド信号電荷1、303;フィール
ド信号電荷2はそれぞれ、304;HCCD1、30
5;HCCD2、306;HCCD3により転送され、
307;CDS&クランプ回路を通過したのち、30
9;信号判断回路により、信号飽和に関する判定をう
け、308;信号選択回路にてその出力を選択された
後、310;信号処理回路にて後述する演算処理を施さ
れ、画像信号再生を行う。
FIG. 5 shows an embodiment of the present invention. FIG. 6 shows the effect of expanding the range of the incident light quantity handled. The incident light is photoelectrically converted at 300; one unit pixel photoelectric conversion unit, 301; two-pixel mixed signal charge at electronic shutter, 302; field signal charge 1, 303; field signal charge 2, respectively; 304; HCCD 1, 30
5; HCCD2, 306; transferred by HCCD3,
307; 30 after passing through the CDS & clamp circuit
9: The signal determination circuit determines the signal saturation, 308; the output of the signal is selected by the signal selection circuit, and 310: The signal processing circuit performs an arithmetic processing described later to reproduce the image signal.

【0012】次に、画像の再生処理方法の一例を示す。
以下の条件式に於て、VTは素子の飽和電荷量に対応し
た電圧を示す。
Next, an example of an image reproduction processing method will be described.
In the following conditional expressions, VT indicates a voltage corresponding to the saturation charge of the device.

【0013】まず、T11およびT12の蓄積期間にお
ける信号電圧V(T11)、V(T12)が(数1)の
条件が真となる場合、308;信号選択回路により、V
(T11)、V(T12)の信号が選択されるが、(数
1)の条件が偽となる場合、308;信号選択回路は3
01;電子シャッター時二画素混合信号電荷を選択し、
310;信号処理回路では(数2)の演算により、T2
1(T22)の蓄積期間の信号電圧はVsig(T21)
に換算される。ここでは、aは(数3)と定義したが、
その他の最適な値、たとえば、(数4)等を用いても良
い。
First, when the signal voltages V (T11) and V (T12) in the accumulation period of T11 and T12 satisfy the condition of (Equation 1), 308;
(T11), the signal of V (T12) is selected. If the condition of (Equation 1) is false, 308;
01: Select two pixel mixed signal charge at electronic shutter,
310: The signal processing circuit calculates T2
The signal voltage during the accumulation period of 1 (T22) is Vsig (T21)
Is converted to Here, a is defined as (Equation 3),
Other optimal values, for example, (Equation 4) may be used.

【0014】[0014]

【数1】 max(V(T11)、V(T12))<VTMax (V (T11), V (T12)) <VT

【0015】[0015]

【数2】Vsig(T21)=a・V(T21)Vsig (T21) = a · V (T21)

【0016】[0016]

【数3】a=T11/T21## EQU3 ## a = T11 / T21

【0017】[0017]

【数4】a=T12/T22 本実施の形態による入射光量範囲の拡大に関し、図6を
用いて説明する。
A = T12 / T22 The expansion of the incident light amount range according to the present embodiment will be described with reference to FIG.

【0018】従来CCDにおける2画素混合による読み
出しおよび転送動作により得られる出力信号電荷量は3
20;従来二画素混合型飽和電荷量として示している。
第2(a)図における224;T11および225;T
12の蓄積期間中における信号電荷の飽和電荷量は、図
1に示した100;1単位画素における転送電極1枚に
対応した値となる為、従来二画素混合型飽和電荷量の約
1/4となるが、輝度信号を作成する場合には、24
0;信号電荷と241;信号電荷が外部回路において加
算処理されるため、結局、従来二画素混合型飽和電荷量
の約1/2の値となる。この値を、321;全画素独立
読み出し時飽和電荷量として示す。
In the conventional CCD, the output signal charge amount obtained by the reading and transferring operation by mixing two pixels is 3
20: conventionally shown as a two-pixel mixed type saturated charge amount.
224; T11 and 225; T in FIG. 2 (a)
Since the saturated charge amount of the signal charge during the accumulation period of No. 12 is a value corresponding to one transfer electrode in 100; one unit pixel shown in FIG. 1, about 1 / of the conventional two-pixel mixed type saturated charge amount. However, when creating a luminance signal, 24
0; the signal charge and 241; the signal charge are added in an external circuit, so that the value eventually becomes about の of the conventional two-pixel mixed type saturated charge amount. This value is shown as 321; the saturated charge amount at the time of independent reading of all pixels.

【0019】ここで、本実施の形態における素子および
駆動方法においては、同時に227;T21の蓄積期間
における207;偶数ライン第2信号電荷と、228;
T22の蓄積期間における208;奇数ライン第2信号
電荷を混合した信号電荷も同時に独立して読み出す事が
可能なため、322;電子シャッター2画素混合時飽和
電荷量を得ることが可能である。ここで、227;T2
1ならびに228;T22の期間は、例えば、1/50
0秒から1/2000秒まで変化させることが可能なた
め、図6において、325;variableで表現し
たような効果を得ることが可能となる。従って、32
4;従来型取り扱い入射光量上限よりも、大きな32
3;取り扱い入射光量拡大範囲を達成可能となる。
Here, in the element and the driving method of the present embodiment, at the same time, 227; 207 during the accumulation period of T21;
In the accumulation period of T22, 208; the signal charges obtained by mixing the odd-numbered line second signal charges can be simultaneously and independently read out, and 322; the saturated charge amount can be obtained when two pixels of the electronic shutter are mixed. Here, 227; T2
1 and 228; the period of T22 is, for example, 1/50
Since it can be changed from 0 second to 1/2000 second, it is possible to obtain the effect represented by 325; variable in FIG. Therefore, 32
4: 32 which is larger than the conventional upper limit of the incident light amount
3: It is possible to achieve a wide range of handling incident light amount.

【0020】図7、図8、図9には、VOD-swee
pを用いない場合の実施の形態を示す。図7は、通常の
TVフレームの401;A-FIELDおよび403;
B−FIELDにおける432;奇数ライン画素と43
3;偶数ライン画素、それぞれの信号電荷蓄積ならびに
読み出し、転送のタイミングを示したものである。
FIGS. 7, 8, and 9 show VOD-sweep.
An embodiment in which p is not used will be described. FIG. 7 shows a normal TV frame 401; A-Field and 403;
432 in B-FIELD; odd line pixel and 43
3: Even line pixels, each showing signal charge accumulation, readout, and transfer timing.

【0021】この場合、432;奇数ライン画素と43
3;偶数ライン画素の蓄積期間開始のタイミングは互い
に異なる。433;偶数ライン画素は424;T11の
期間中に入射した信号により405;偶数ライン第1信
号電荷を得る。VCCDへの読み出し動作は410;T
AF1のタイミングで行われる。一方、432;奇数ライ
ン画素は425;T12の期間中に入射した信号により
406;奇数ライン第1信号電荷を得、VCCDへの読
み出し動作は411;TAF21のタイミングで行われる。
さらに、402;V-Blank期間において、43
3;偶数ライン画素は427;T21の期間中に入射し
た信号により407;偶数ライン第2信号電荷を得る。
VCCDへの読み出し動作は412;TAS1のタイミン
グで行われる。一方、432;奇数ライン画素は42
7;T21と同一の蓄積期間に設定された428;T2
2の期間中に入射した信号により408;奇数ライン第
2信号電荷を得、VCCDへの読み出し動作は413;
TAS21のタイミングで行われる。ここで、424;T1
1と425;T12の期間は互いに異なり、さらに、4
01;A-FIELDおよび403;B-FIELDで異
なるため、同じ蓄積時間を有する427;T21と42
8;T22の期間を制御した場合、4フィールド間にお
いて色ずれ、輝度ずれが生じる可能性がある。しかしな
がら、本発明においては、画素情報を独立に読み出して
いるため、蓄積期間の比率(数5)を考慮した演算(数
6)が可能となる。したがって、T12の蓄積期間に換
算した値Vsig’(T11)を用いることにより色ず
れ、輝度ずれが生じることはない。
In this case, 432; an odd line pixel and 43
3: The start timing of the accumulation period of the even-numbered line pixels is different from each other. 433; The even-line pixel obtains 405; even-line first signal charge according to the signal incident during the period 424; T11. Read operation to VCCD is 410; T
It is performed at the timing of AF1. On the other hand, 432; the odd line pixel is 425; the first signal charge of the odd line 406 is obtained by the signal incident during the period of T12, and the reading operation to the VCCD is performed at the timing of 411; TAF21.
Further, 402; 43 in the V-Blank period.
3: Even-line pixels 427; 407; Even-line second signal charge is obtained by a signal incident during period T21.
The read operation to the VCCD is performed at the timing of 412; TAS1. On the other hand, 432;
7; 428 set to the same accumulation period as T21; T2
408; the second signal charge of the odd-numbered line is obtained by the signal incident during the period 2, and the read operation to the VCCD is 413;
This is performed at the timing of TAS21. Here, 424; T1
1 and 425; the periods of T12 are different from each other,
01; A-Field and 403; 427 having the same accumulation time because they differ in B-Field; T21 and 42
8: When the period of T22 is controlled, there is a possibility that a color shift and a brightness shift occur between four fields. However, in the present invention, since the pixel information is read out independently, an operation (Equation 6) in which the ratio of the accumulation period (Equation 5) is considered is possible. Therefore, by using the value Vsig '(T11) converted to the accumulation period of T12, no color shift or luminance shift occurs.

【0022】[0022]

【数5】b=T12/T11## EQU5 ## b = T12 / T11

【0023】[0023]

【数6】Vsig’(T11)=b・V(T11) 図8、図9に読み出し、および転送のタイミングを示
す。410;TAF1のタイミングで読み出された44
0;信号電荷はVCCD内を1画素分転送され、41
1;TAF21のタイミングでは、441;信号電荷が読み
出される。図3においては、410;TAF1のタイミン
グから411;TAF21のタイミングまで、20クロック
で行っている。このあと、412;TAS1のタイミング
から413;TAS21のタイミングまでを、20クロック
で揃えることにより、427;T21と428;T22
の蓄積期間を揃える事が可能となる。さらに、407;
偶数ライン第2信号電荷に相当する442;信号電荷は
20クロック期間において1画素分転送された後、図3
に示すように、412;TAS21のタイミングで408;
奇数ライン第2信号電荷に相当する443;信号電荷を
重畳して読み出すことにより混合され、以降VCCD内
を8相クロックにより転送される。この例においては、
427;T21と428;T22の蓄積期間を20クロ
ックとしたが、クロック数の限定を受けない事は言うま
でもない。
Vsig ′ (T11) = b · V (T11) FIGS. 8 and 9 show timings of reading and transferring. 410; 44 read at the timing of TAF1
0: The signal charge is transferred by one pixel in the VCCD, and 41
1; At the timing of TAF21, 441; signal charges are read. In FIG. 3, from the timing of 410; TAF1 to the timing of 411; TAF21, the operation is performed at 20 clocks. Thereafter, the timings from 412; TAS1 to 413; TAS21 are aligned by 20 clocks, whereby 427; T21 and 428;
Can be made uniform. Further, 407;
442 corresponding to the second signal charge of the even-numbered line; after the signal charge is transferred by one pixel in the 20 clock period,
412; TAS21 timing 408;
443 corresponding to the odd-numbered second signal charge; mixed by reading the signal charge in a superimposed manner, and thereafter transferred within the VCCD by an eight-phase clock. In this example,
427; T21 and 428; the accumulation period of T22 is set to 20 clocks, but it goes without saying that the number of clocks is not limited.

【0024】図10は、図7に示した414;奇数ライ
ン第1信号電荷の蓄積期間と415;偶数ライン第1信
号電荷の蓄積期間を入れ換えた場合を示す。ここで、5
05;偶数ライン第1信号電荷は524;T11の期間
中に入射した信号により得られた信号電荷であり、VC
CDへの読み出しは、510;TAF1のタイミングで行
われる。506;奇数ライン第1信号電荷は525;T
12の期間中に入射した信号により得られた信号電荷で
あり、VCCDへの読み出しは、511;TAF2のタイ
ミングで行われる。507;偶数ライン第2信号電荷は
527;T21の期間中に入射した信号により得られた
信号電荷であり、VCCDへの読み出しは、512;T
AS1のタイミングで行われる。508;奇数ライン第2
信号電荷は528;T22の期間中に入射した信号によ
り得られた信号電荷であり、VCCDへの読み出しは、
513;TAS2のタイミングで行われる。
FIG. 10 shows a case in which the storage period of 414; the first signal charge of the odd-numbered line and the storage period of 415; the first signal charge of the even-numbered line shown in FIG. Where 5
05; the first signal charge of the even-numbered line is a signal charge obtained by a signal incident during the period of 524;
Reading to the CD is performed at the timing of 510; TAF1. 506; odd signal first signal charge is 525; T
The signal charge obtained by the signal incident during the period 12 is read out to the VCCD at the timing of 511; TAF2. 507; the second signal charge of the even-numbered line is a signal charge obtained by a signal incident during the period of 527; T21, and the readout to the VCCD is 512;
This is performed at the timing of AS1. 508; odd line second
The signal charge is a signal charge obtained by a signal incident during the period of 528; T22.
513: Performed at the timing of TAS2.

【0025】本発明では、524;T11、525;T
12の期間は同一の長さに設定することが可能なため、
(数6)の換算は不要である。
In the present invention, 524; T11, 525;
Since the 12 periods can be set to the same length,
Conversion of (Equation 6) is unnecessary.

【0026】[0026]

【発明の効果】以上のように、本発明に於ては、外部の
フィールドメモリあるいはフレームメモリを用いる事な
く、入射光量取扱範囲を高照度側へ拡大する事が可能で
ある。
As described above, according to the present invention, it is possible to extend the incident light amount handling range to the high illuminance side without using an external field memory or frame memory.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の撮像方法の一実施の形態に用いられる
固体撮像装置を示す図
FIG. 1 is a diagram showing a solid-state imaging device used in an embodiment of an imaging method according to the present invention.

【図2】本発明の一実施の形態の第1の駆動方法の説明
FIG. 2 is an explanatory diagram of a first driving method according to the embodiment of the present invention;

【図3】本発明の一実施の形態の第1の駆動実施の形態
のAフィールドを示す図
FIG. 3 is a diagram showing an A field according to the first driving embodiment of the embodiment of the present invention;

【図4】本発明の一実施の形態の第1の駆動実施の形態
のBフィールドを示す図
FIG. 4 is a diagram showing a B field according to the first driving embodiment of the embodiment of the present invention;

【図5】本発明の一実施の形態の第1の固体撮像装置の
1例を示す図
FIG. 5 is a diagram illustrating an example of a first solid-state imaging device according to an embodiment of the present invention;

【図6】本発明の第1の実施の形態の効果の説明図FIG. 6 is an explanatory diagram of an effect of the first embodiment of the present invention.

【図7】本発明の第2の方法の説明図FIG. 7 is an explanatory view of a second method of the present invention.

【図8】本発明の第2の実施の形態のAフィールドFIG. 8 shows an A field according to the second embodiment of the present invention.

【図9】本発明の第2の実施の形態のBフィールドFIG. 9 shows a B field according to the second embodiment of the present invention.

【図10】本発明の第3の実施の形態の方法の説明図FIG. 10 is an explanatory diagram of a method according to a third embodiment of the present invention.

【符号の説明】[Explanation of symbols]

100;1単位画素 101;φV1転送電極 102;φV2転送電極 103;φV3転送電極 104;φV4転送電極 105;φV5転送電極 106;φV6転送電極 107;φV7転送電極 108;φV8転送電極 109;読み出しゲート 110;VCCD 201、401、501;A-FIELD 202、204、402、404、502、504;V
-Blank 203、403、503;B-FIELD 205、215、405、415、505、514;偶
数ライン第1信号電荷 206、214、406、414、506、515;奇
数ライン第1信号電荷 207、217、407、417、507、516;偶
数ライン第2信号電荷 208、218、408、416、508、517;奇
数ライン第2信号電荷 209、218、409、418、509、518;V
CCD転送期間 210、410、510;TAF1 211、411、511;TAF21 212、412、512;TAS1 213、413、513;TAS21 219、419、519;TBF1 220、420、520;TBF21 221、421、521;TBS1 222、422、522;TBS21 223、229;VOD-sweep 224、424、524;T11 225、425、525;T12 226、426、526;TF 227、427、 527;T21 228、428、528;T22 232;奇数ライン画素 233;偶数ライン画素 240、241、242、243、250、251、2
52、253;信号電荷 300;1単位画素光電変換部 301;電子シャッター時二画素混合信号電荷 302;フィールド信号電荷1 303;フィールド信号電荷2 304;HCCD1 305;HCCD2 306;HCCD3 307;CDS&クランプ回路 308;信号選択回路 309;信号判断回路 310;信号処理回路 320;従来二画素混合型飽和電荷量 321;全画素独立読み出し時飽和電荷量 322;電子シャッター2画素混合時飽和電荷量 323;取り扱い入射光量拡大範囲 324;従来型取り扱い入射光量上限 325;variable
100; 1 unit pixel 101; φV1 transfer electrode 102; φV2 transfer electrode 103; φV3 transfer electrode 104; φV4 transfer electrode 105; φV5 transfer electrode 106; φV6 transfer electrode 107; φV7 transfer electrode 108; φV8 transfer electrode 109; readout gate 110 VCCD 201, 401, 501; A-FIELD 202, 204, 402, 404, 502, 504;
-Blank 203, 403, 503; B-FIELD 205, 215, 405, 415, 505, 514; First line signal charges 206, 214, 406, 414, 506, 515 of even lines; First line signal charges 207, 217 of odd lines , 407, 417, 507, 516; even-numbered line second signal charges 208, 218, 408, 416, 508, 517; odd-numbered line second signal charges 209, 218, 409, 418, 509, 518;
TAF1 211, 411, 511; TAF21 212, 412, 512; TAS1 213, 413, 513; TAS21 219, 419, 519; TBF1 220, 420, 520; TBF21 221, 421, 521 TBS1 222, 422, 522; TBS21 223, 229; VOD-sweep 224, 424, 524; T11 225, 425, 525; T12 226, 426, 526; TF 227, 427, 527; T22 232; odd line pixel 233; even line pixel 240, 241, 242, 243, 250, 251, 2
52, 253; signal charge 300; one-pixel photoelectric conversion unit 301; two-pixel mixed signal charge at electronic shutter 302; field signal charge 1 303; field signal charge 2 304; HCCD1 305; HCCD2 306; HCCD3 307; 308; signal selection circuit 309; signal judgment circuit 310; signal processing circuit 320; conventional two-pixel mixed type saturated charge amount 321; all-pixel independent readout saturated charge amount 322; electronic shutter two-pixel mixed charge amount 323; Light intensity expansion range 324; Conventional handling incident light intensity upper limit 325; Variable

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 VCCDの方向に連続する2単位画素を
構成する第1および第2の画素のうち、前記第1の画素
に対して、信号電荷蓄積期間(T11)と前記信号電荷
蓄積期間(T11)よりも短い信号電荷蓄積期間(T2
1)を設定し、前記第2の画素に対しては、信号電荷蓄
積期間(T12)と前記信号電荷蓄積期間(T12)よ
りも短い信号電荷蓄積期間(T22)を設定し、前記4
つの各蓄積期間内で蓄積された電荷を前記VCCDに前
記信号電荷蓄積期間(T11)、前記信号電荷蓄積期間
(T12)、前記信号電荷蓄積期間(T21)、前記信
号電荷蓄積期間(T22)の順番で読み出し、前記信号
電荷蓄積期間(T11)に読み出された電荷と前記信号
電荷蓄積期間(T21)と前記信号電荷蓄積期間(T2
2)を揃えることにより色ずれを抑えることを特徴とす
るCCDの駆動方法。
1. A signal charge accumulation period (T11) and a signal charge accumulation period (T11) for a first pixel among first and second pixels constituting two unit pixels continuous in a VCCD direction. The signal charge accumulation period (T2) shorter than T11)
1) is set, and for the second pixel, a signal charge accumulation period (T12) and a signal charge accumulation period (T22) shorter than the signal charge accumulation period (T12) are set.
The charges accumulated in each of the two accumulation periods are stored in the VCCD in the signal charge accumulation period (T11), the signal charge accumulation period (T12), the signal charge accumulation period (T21), and the signal charge accumulation period (T22). The charges are read out in order, and the charges read in the signal charge accumulation period (T11), the signal charge accumulation period (T21), and the signal charge accumulation period (T2).
2. A method for driving a CCD, wherein the color shift is suppressed by aligning the method 2).
【請求項2】 VCCDの方向に連続する2単位画素を
構成する第1および第2の画素のうち、前記第1の画素
に対して、信号電荷蓄積期間(T11)と前記信号電荷
蓄積期間(T11)よりも短い信号電荷蓄積期間(T2
1)を設定し、前記第2の画素に対しては、信号電荷蓄
積期間(T12)と前記信号電荷蓄積期間(T12)よ
りも短い信号電荷蓄積期間(T22)を設定し、前記4
つの各蓄積期間内で蓄積された電荷を前記VCCDに前
記信号電荷蓄積期間(T11)、前記信号電荷蓄積期間
(T12)、前記信号電荷蓄積期間(T21)、前記信
号電荷蓄積期間(T22)の順番で読み出し、前記信号
電荷蓄積期間(T11)に読み出された電荷と前記信号
電荷蓄積期間(T21)と前記信号電荷蓄積期間(T2
2)を揃えることにより色ずれを抑えることを特徴とす
るCCDの駆動手段を有することを特徴とした固体撮像
装置。
2. A signal charge accumulation period (T11) and a signal charge accumulation period (T11) for the first pixel of the first and second pixels constituting two unit pixels continuous in the direction of the VCCD. The signal charge accumulation period (T2) shorter than T11)
1) is set, and for the second pixel, a signal charge accumulation period (T12) and a signal charge accumulation period (T22) shorter than the signal charge accumulation period (T12) are set.
The charges accumulated in each of the two accumulation periods are stored in the VCCD in the signal charge accumulation period (T11), the signal charge accumulation period (T12), the signal charge accumulation period (T21), and the signal charge accumulation period (T22). The charges are read out in order, and the charges read in the signal charge accumulation period (T11), the signal charge accumulation period (T21), and the signal charge accumulation period (T2).
2) A solid-state imaging device having a CCD driving means characterized in that the color shift is suppressed by aligning 2).
JP05945999A 1999-03-05 1999-03-05 CCD driving method and solid-state imaging device Expired - Fee Related JP3179438B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP05945999A JP3179438B2 (en) 1999-03-05 1999-03-05 CCD driving method and solid-state imaging device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP05945999A JP3179438B2 (en) 1999-03-05 1999-03-05 CCD driving method and solid-state imaging device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP10117143A Division JP2996947B2 (en) 1998-04-27 1998-04-27 Imaging device and imaging method

Publications (2)

Publication Number Publication Date
JPH11331711A true JPH11331711A (en) 1999-11-30
JP3179438B2 JP3179438B2 (en) 2001-06-25

Family

ID=13113924

Family Applications (1)

Application Number Title Priority Date Filing Date
JP05945999A Expired - Fee Related JP3179438B2 (en) 1999-03-05 1999-03-05 CCD driving method and solid-state imaging device

Country Status (1)

Country Link
JP (1) JP3179438B2 (en)

Also Published As

Publication number Publication date
JP3179438B2 (en) 2001-06-25

Similar Documents

Publication Publication Date Title
JP3088591B2 (en) Solid-state imaging device and driving method
JP5719733B2 (en) Image sensor for still or video photography
JP4161384B2 (en) Solid-state imaging device, camera using the same, and driving method of solid-state imaging device
US7053948B2 (en) Solid-state image pickup device with discharge gate operable in an arbitrary timing
JP2003052049A (en) Imaging apparatus
US7480000B2 (en) Image-taking apparatus including a vertical transfer control device
US6982751B1 (en) Solid-state imaging apparatus, its driving method, and camera system
JP2007288131A (en) Solid-state imaging element, solid-state imaging device and its driving method
JP2868915B2 (en) Solid-state imaging device
JP3102557B2 (en) Solid-state imaging device and driving method thereof
JP2007134806A (en) Solid-state imaging element
JP2996947B2 (en) Imaging device and imaging method
JPH11331711A (en) Device and method for picking up image
JP2006262086A (en) Method for driving image pickup device
US20080094495A1 (en) Solid-state image capturing device, method for driving the solid-state image capturing device, and electronic information device
US20090207295A1 (en) Imaging device and driving method thereof
JP2004328314A (en) Method of driving solid-state imaging device, driving device therefor, solid-state imaging apparatus, and imaging apparatus module
JP3392607B2 (en) Driving method of solid-state imaging device
JPH10200819A (en) Solid-state image pickup device, and its driving method and camera
JP2002027332A (en) Image pickup device
JP5614476B2 (en) Solid-state imaging device driving method, solid-state imaging device, and camera system
JP4466698B2 (en) Solid-state imaging device, camera using the same, and driving method of solid-state imaging device
JP4347981B2 (en) Driving method of solid-state imaging device
JP2009225478A (en) Method of driving solid-state imaging device, solid-state imaging apparatus, and camera system
JPH08294056A (en) Video camera and drive method for solid-state image pickup element used for it

Legal Events

Date Code Title Description
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080413

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090413

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100413

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110413

Year of fee payment: 10

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120413

Year of fee payment: 11

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120413

Year of fee payment: 11

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130413

Year of fee payment: 12

LAPS Cancellation because of no payment of annual fees