JPH11330909A - Digital filter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the digital filter in which an arithmetic quantity can be decreased without deteriorating the characteristics. SOLUTION: A de-emphasis circuit 41 operates with frequency characteristics reverse to those of a sample holding circuit 43 when a digital signal which is not pre-emphasized is inputted and operates with frequency characteristics obtained by adding the said reverse frequency and frequency characteristics of predetermined de-emphasis when a pre-emphasized digital signal is inputted. Consequently, an inter-cooperation filter 42 is all composed of a hard-band filter, so no deterioration in characteristics is caused even when the arithmetic quantity is decreased.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a digital filter, and more particularly, to a digital filter used in an oversampling type D / A conversion system.

[0002]

2. Description of the Related Art As a conventionally known oversampling type D / A conversion system, for example, the one shown in FIG. 6 is known.

[0003] This D / A conversion system comprises a digital filter 1 and a delta sigma (Δ-
Σ) A modulation circuit 2 and a low-pass filter 3 are provided. As shown in FIG. 6, the digital filter 1 includes a de-emphasis circuit 11, an interpolation filter 12, and a sample-and-hold circuit 13, and includes a delta-sigma modulation circuit 2 and a low-pass filter 3. Used in front.

A digital signal such as a digital audio signal stored in a compact disk (CD) or a digital audio signal of a satellite broadcast (BS) is input to the de-emphasis circuit 11. An example of the frequency spectrum of this digital signal is shown in FIG.
As shown. Fs in the figure is a sampling frequency of the digital signal, for example, 44.1 KHz.

[0005] The digital signal may be pre-emphasized (high-frequency emphasized) with a predetermined frequency characteristic, or may not be pre-emphasized. For this reason, when a pre-emphasized digital signal as shown in (A) of the figure is input, the de-emphasis circuit 11 uses the frequency characteristic as shown in (B) of FIG. If a digital signal that has not been pre-emphasized is input after performing frequency correction, de-emphasis is not performed and switching can be performed between the two. Therefore, the signal output from the de-emphasis circuit 11 has a flat frequency characteristic regardless of the presence or absence of the pre-emphasis of the input digital signal, as shown in FIG.

[0006] The interpolation filter 12 is a FI
R (Finite ImpulseResponse)
It is composed of two stages, a filter 121 and an FIR filter 122. The FIR filter 121 has a frequency characteristic as shown in FIG. For this reason, the output of the de-emphasis circuit 11 has the sampling frequency Fs raised to twice the rate, and the FIR filter 12
The output of 1 is as shown in FIG. The FIR filter 122 has a frequency characteristic as shown in FIG. Therefore, the FIR filter 12
2 is raised to a rate four times the sampling frequency Fs, and the output of the FIR filter 122 is shown in FIG.
It becomes as shown in. Therefore, in the interpolation filter 12, the sampling frequency Fs is increased to eight times the rate.

The sample-and-hold circuit 13 is composed of a comb filter, and repeatedly outputs the same data to further increase the sampling frequency Fs (for example, 64 times). The output data of the sample and hold circuit 13 is supplied to the delta-sigma modulation circuit 2. The delta-sigma modulation circuit 2 converts the output data into, for example, a 1-bit analog signal. The converted analog signal is supplied to the low-pass filter 3. The low-pass filter 3 outputs a desired audio signal by passing only the low frequency band.

[0008]

As shown in FIG. 7H, the frequency characteristics of the sample-and-hold circuit 13 are not flat but have a gentle slope (portion indicated by an arrow a). In order to compensate for such a decrease in the frequency characteristic, for example, the FIR filter 122 is provided with a frequency characteristic as shown by the arrow b in FIG.
The frequency characteristics of the sample hold circuit 13 are corrected.

However, when trying to correct the frequency characteristics with the FIR filter 122, a half-band filter with a small amount of calculation could not be used. As shown in FIG. 8A, the half-band filter is a filter having a point-symmetric frequency characteristic with respect to the point X, and the coefficients of the FIR filter (black points in FIG. 8B) are the same. As shown in FIG. 7B, every other than the center three becomes “0”. For this reason, the half-band filter requires about half the amount of calculation to be calculated, and as can be seen from the figure,
The frequency characteristic is flat except for the inclined portion.

However, since a half-band filter cannot be used as the FIR filter 122, the amount of calculation of the filter in a certain stage is approximately doubled. This increase in the amount of operation leads to inconveniences such as an increase in the area of the operation unit and an increase in power consumption. To solve this inconvenience, there is usually an upper limit to the amount of calculation, and therefore, there is a problem that it is necessary to deal with a decrease in the amount of calculation, that is, deterioration of characteristics.

It is an object of the present invention to provide a digital filter capable of reducing the amount of calculation without deteriorating characteristics.

[0012]

Means for Solving the Problems To solve the above problems and achieve the object of the present invention, the invention according to claim 1 provides a digital signal obtained by sampling an original signal at a predetermined sampling frequency. A de-emphasis circuit for correcting the input digital signal with a predetermined frequency characteristic,
An interpolation filter that interpolates the sampling frequency of the digital signal output from the de-emphasis circuit, and a sample-hold circuit that interpolates the sampling frequency of the digital signal output from the interpolation filter Wherein the de-emphasis circuit is configured to have a frequency characteristic opposite to a frequency characteristic of the sample-and-hold circuit when the input digital signal is not pre-emphasized, The interpolation filter is constituted by a half-band filter.

According to a second aspect of the present invention, in the digital filter according to the first aspect, when the input digital signal is pre-emphasized, the de-emphasis circuit has a frequency characteristic of the sample-and-hold circuit. The configuration is such that it has a frequency characteristic obtained by synthesizing a reverse frequency characteristic and a predetermined de-emphasis frequency characteristic.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration when a digital filter according to an embodiment of the present invention is applied to an oversampling D / A conversion system.

As shown in FIG. 1, this D / A conversion system of the oversampling system has a digital filter 4 and a delta-sigma modulation circuit 2 according to an embodiment of the present invention.
And a low-pass filter 3.

As shown in FIG. 1, the digital filter 4 includes a de-emphasis circuit 41, an interpolation filter 42, and a sample and hold circuit 43.

The de-emphasis circuit 41 is configured to input a digital signal obtained by sampling the original signal at a predetermined sampling frequency (sampling interval).
The digital signal may be pre-emphasized with a predetermined frequency characteristic or may not be pre-emphasized. Therefore, the frequency characteristics of the de-emphasis circuit 41 can be changed according to the presence or absence of pre-emphasis of the input digital signal, as described later.

The de-emphasis circuit 41 has a primary I
IR (Infinite Impulse Respo)
nse) filter. Specifically, as shown in FIG. 2, two adders 411 and 412 and one delay unit 4
13 and three multipliers 414 to 416. Each value of each of the coefficients a to c of the multipliers 414 to 416 can be arbitrarily set according to the presence or absence of pre-emphasis of the input digital signal. Note that the coefficient a
Determines the overall gain.

Accordingly, the de-emphasis circuit 41
If a digital signal without emphasis is
The frequency characteristics of the sample and hold circuit 43
Operate with the opposite frequency characteristics. This
In order to obtain such frequency characteristics, the multiplier 414 shown in FIG.
Each value of each coefficient a to c of ４416 is a = a₁, B = 0,
c = c₁Are respectively set, and the transfer function H (z) is H
(Z) = a₁(1 + c ₁Z^-1).

On the other hand, the de-emphasis circuit 41
If a digital signal with
The frequency characteristics of the sample-and-hold circuit 43
Frequency characteristics and a predetermined de-emphasis frequency
It operates with the frequency characteristics that are added (synthesized) with the numerical characteristics.
Swelling. In order to obtain such frequency characteristics,
Each value of each coefficient a to c of multipliers 414 to 416 shown in FIG.
Is a = a_Two, B = b _Two, C = c_TwoAre set respectively
You.

The interpolation filter 42 is configured by connecting half-band filters 421 to 423 in series. First-stage half-band filter 421
Performs interpolation (inter-corporation) on the sampling frequency, ie, sets the sampling frequency to 2
The operation is performed to double the frequency, and a sharp frequency characteristic is required. Therefore, the number of taps (order) is large.
Therefore, the half-band filter 421 has a large amount of calculation. The second-stage half-band filter 422 includes:
The sampling frequency is doubled, and the number of taps (order) is medium. The third-stage half-band filter 423 performs an operation of increasing the sampling frequency by a factor of two, and the number of taps (order)
Is small.

As described above, the interpolation filter 42 is a half-band filter 421 as described above.
To 423 in three stages and a total sampling frequency of 8
Do the lifting operation twice. Further, since the interpolation filter 42 is composed of the half-band filters 421 to 423 as described above, the characteristics are improved even if the calculation amount is small.

The sample-and-hold circuit 43 is composed of a comb filter, and outputs the same data output from the interpolation filter 42 repeatedly eight times. That is, the data output from the interpolation filter 42 is interpolated by eight times. As shown in FIG. 3H, the comb filter constituting the sample-and-hold circuit 43 has a frequency characteristic that attenuates smoothly from 0 dB to -∞ dB.

The delta-sigma modulation circuit 2 includes an integrator, a quantizer, and a feedback circuit (not shown), and receives an output from the sample-and-hold circuit 43 and converts it to, for example, a 1-bit analog signal. . In the delta-sigma modulation circuit 2, quantization noise is subjected to noise shaping.

The low-pass filter 3 is an analog filter that passes only low-frequency components, and includes a not-shown switched capacitor filter, a resistor, a capacitor, and an active filter including an operational amplifier.

Next, the operation of the embodiment configured as described above will be described with reference to the drawings. First, a case where the digital signal input to the de-emphasis circuit 41 is not pre-emphasized will be described with reference to FIGS.

The frequency spectrum of the input digital signal in this case is as shown in FIG. The frequency characteristic of the de-emphasis circuit 41 has a frequency characteristic opposite to that of the sample-and-hold circuit 43, as shown in FIG. ing. For this reason, the output of the de-emphasis circuit 31 is as shown in FIG. 4C, and the high frequency side is raised in the original signal.

The first-stage half-band filter 421 includes:
As shown in FIG. 3D, an operation of increasing the sample frequency Fs by a factor of two is performed. For this reason, the output of the half-band filter 421 is only an original signal and an even-numbered sampling frequency Fs, as shown in FIG.

The second-stage half-band filter 422 is
As shown in FIG.
It is an operation of lifting up twice. For this reason, the output of the half-band filter 422 is only the output of the original signal and the sampling frequency Fs which is a multiple of 4, as shown in FIG.

The third-stage half-band filter 423 includes:
As shown in FIG.
It is an operation of lifting up twice. For this reason, the output of the half-band filter 423 is only the one in which the original signal and the sampling frequency Fs are a multiple of 8, as shown in FIG.

The sample-and-hold circuit 43 has a frequency characteristic that gradually attenuates from a low frequency to a high frequency as shown by an arrow a in FIG. FIG. 4A is an enlarged view of a main part in the attenuated state. On the other hand, the de-emphasis circuit 41
As shown in FIG. 3B, the frequency characteristics are reversed so as to compensate for the attenuation. FIG. 4B is an enlarged view of a main part of the frequency characteristic of the de-emphasis circuit 41.
FIG. 4C shows a frequency characteristic obtained by adding (synthesizing) both characteristics, and becomes almost flat.

As shown in FIG. 3C, the original signal output from the de-emphasis circuit 41 is attenuated relatively in the low-frequency side with respect to the high-frequency side. In this case, the attenuation in the low frequency side is compensated and the high frequency side is attenuated, so that the original signal output from the sample and hold circuit 43 becomes substantially flat as a whole as shown in FIG.

The output of the sample-and-hold circuit 43 is supplied to the delta-sigma modulation circuit 2 and converted into, for example, a 1-bit analog signal. Is output.

Next, a case where the digital signal input to the de-emphasis circuit 41 is pre-emphasized will be described with reference to FIGS. The frequency spectrum of the digital signal in this case is shown in FIG.
As shown in the figure, high frequencies are emphasized in the original signal. As shown in FIG. 3B, the frequency characteristic of the de-emphasis circuit 41 is the sum of the frequency characteristic opposite to the frequency characteristic of the sample-and-hold circuit 43 and the frequency characteristic of the predetermined de-emphasis. ) Frequency characteristics. For this reason, the output of the de-emphasis circuit 41 is as shown in FIG. 7C, and the high frequency side of the original signal is still raised.
This corresponds to FIG.

The processing by the half-band filters 421 to 423 is the same as that in the case where the digital input signal input to the de-emphasis circuit 41 is not pre-emphasized, so that the description is omitted.

Here, since the original signal output from the half-band filter 423 has the above-described frequency characteristics in the de-emphasis circuit 41, the signal shown in FIG.
As shown in the figure, the high frequency side is raised. However, the sample hold circuit 43, as shown in FIG.
It has a frequency characteristic that gradually attenuates from low frequency to high frequency. Therefore, the high frequency side of the original signal output from the half-band filter 423 is attenuated by the sample hold circuit 43, and the frequency characteristic of the original signal output from the sample hold circuit 43 is (K As shown in FIG.

The output of the sample-and-hold circuit 43 is supplied to the delta-sigma modulation circuit 2 and converted into, for example, a 1-bit analog signal. Is output.

As described above, in this embodiment, when a digital signal without pre-emphasis is input, the de-emphasis circuit 41 has a frequency characteristic opposite to that of the sample-and-hold circuit 43. When a pre-emphasized digital signal is input, the de-emphasis circuit 41 adds a frequency characteristic opposite to the frequency characteristic of the sample-and-hold circuit 43 and a predetermined de-emphasis frequency characteristic. Frequency characteristics. For this reason, all of the inter-corporation filters 42 can be constituted by half-band filters, so that even if the amount of calculation is reduced, the characteristics do not deteriorate. In other words, the characteristics can be further improved with the same calculation amount.

Further, in this embodiment, the de-emphasis circuit 41 can be constituted by an IIR filter, and the values of the coefficients a, b, and c of the multipliers 414 to 416 depend on the presence or absence of the pre-emphasis of the input digital signal. Can be stored in a memory in advance, and the value of the coefficient can be switched according to the presence or absence of pre-emphasis of the input digital signal. For this reason, no extra circuit is required in configuring this embodiment, so that it is not necessary to increase the chip area even if it is integrated.

In this embodiment, the digital
Although the case where the filter 4 is applied to the oversampling type D / A conversion system has been described, the digital filter according to the present invention is the oversampling type A / A converter.
It is also applicable to a D conversion system. In this case, the flow of signal processing is opposite to that of the embodiment.

[0041]

As described above, according to the first aspect of the present invention, when the input digital signal is not pre-emphasized, the de-emphasis circuit provides a frequency characteristic opposite to that of the sample-and-hold circuit. It was configured to have.

Further, in the invention according to claim 2, in addition to the invention according to claim 1, when the input digital signal is pre-emphasized, the de-emphasis circuit has a frequency characteristic opposite to that of the sample-and-hold circuit. And a frequency characteristic of a predetermined de-emphasis are synthesized.

For this reason, in the inventions according to the first and second aspects, the interpolation filters can be all constituted by half-band filters, so that the amount of calculation can be reduced without deteriorating the characteristics.

[Brief description of the drawings]

FIG. 1 shows a digital filter according to an embodiment of the present invention.
FIG. 2 is a block diagram illustrating a configuration when applied to an oversampling D / A conversion system.

FIG. 2 is a block diagram illustrating a specific configuration of a de-emphasis circuit.

FIG. 3 is a diagram illustrating characteristics and outputs of respective units in FIG. 1 when an input signal is not pre-emphasized;

FIG. 4 is a diagram showing a main part of a characteristic of a sample hold circuit and a main part of a characteristic of a de-emphasis circuit.

FIG. 5 is a diagram illustrating characteristics and outputs of respective units in FIG. 1 when an input signal is pre-emphasized.

FIG. 6 is a block diagram showing a configuration of a conventional device.

FIG. 7 is a diagram illustrating characteristics, outputs, and the like of each unit in a conventional device.

FIG. 8 is an explanatory diagram of a half-band filter.

[Explanation of symbols]

 2 Delta-sigma modulation circuit 3 Low-pass filter 4 Digital filter 41 De-emphasis circuit 42 Interpolation filter 43 Sample hold circuit 411, 412 Adder 413 Delay unit 414-416 Multiplier 421-423 Half-band filter

Claims (2)

[Claims] When a digital signal obtained by sampling an original signal at a predetermined sampling frequency is input, a de-emphasis circuit for correcting the input digital signal with a predetermined frequency characteristic, and a digital signal output from the de-emphasis circuit An interpolation filter for performing interpolation on the sampling frequency of the digital signal, and a sample and hold circuit for performing interpolation on the sampling frequency of the digital signal output from the interpolation filter, The de-emphasis circuit is configured to have a frequency characteristic opposite to that of the sample-and-hold circuit when the input digital signal is not pre-emphasized, and the interpolation filter is a half-band filter. Filter Digital filter, characterized in that configuration. 2. The de-emphasis circuit, when the input digital signal is pre-emphasized,
2. The digital circuit according to claim 1, wherein said digital circuit has a frequency characteristic obtained by combining a frequency characteristic opposite to a frequency characteristic of said sample and hold circuit and a frequency characteristic of a predetermined de-emphasis. filter.