JPH11330711A - Multilayer board - Google Patents

Multilayer board

Info

Publication number
JPH11330711A
JPH11330711A JP13231498A JP13231498A JPH11330711A JP H11330711 A JPH11330711 A JP H11330711A JP 13231498 A JP13231498 A JP 13231498A JP 13231498 A JP13231498 A JP 13231498A JP H11330711 A JPH11330711 A JP H11330711A
Authority
JP
Japan
Prior art keywords
boards
board
insulating
substrate
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13231498A
Other languages
Japanese (ja)
Inventor
Satoshi Nagasawa
総 長澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Futaba Corp
Original Assignee
Futaba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Futaba Corp filed Critical Futaba Corp
Priority to JP13231498A priority Critical patent/JPH11330711A/en
Publication of JPH11330711A publication Critical patent/JPH11330711A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To build a circuit having electrically fewer troubles, even in the case of high density wirings by providing an insulating board of a high permittivity material between a plurality of power source boards, and using an insulating board of a low permittivity for an insulating part with a signal board. SOLUTION: Conductor boards 25, 28, disposed on both side surfaces of the multilayer board, are signal boards to be mounted by soldering electronic components with creamy solder, DIP layer or the like. Conductor boards 26, 27 disposed at an intermediate are mainly power boards to become a supply pattern and a ground line of a power source voltage. A variety of through-holes 29a to 29c are properly provided via a wiring pattern of upper and lower boards. As an insulating board sandwiched between the boards 26 and 27, an insulating material having extremely high permittivity is adopted, and a relatively low dielectric material is used for insulating boards 21, 23 adjacent to the signal boards 25, 28 of both side surfaces. An impedance of the conductor boards disposed via the insulating board can be handled as a distributed constant circuit with respect to high frequency.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は多くの電子機器を高
密度で実装している多層基板に関わり、特に電源基板と
信号基板が多層構造で積層されている多層基板に関する
ものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer board on which many electronic devices are mounted at high density, and more particularly to a multilayer board in which a power supply board and a signal board are stacked in a multilayer structure.

【0002】[0002]

【従来の技術】プリント配線基板として基板材料の一方
の面のみ導体基板を配置し、この導体基板に対して配線
回路をパターニングした片面基板と、絶縁基板の両面に
導体基板を配置し、この導体基板を相互にスルーホール
等によって結合しながら、多数の電子部品を実装する両
面基板が多用されている。
2. Description of the Related Art As a printed wiring board, a conductor substrate is arranged only on one surface of a substrate material, a single-sided substrate on which a wiring circuit is patterned on the conductor substrate, and a conductor substrate is arranged on both surfaces of an insulating substrate. 2. Description of the Related Art A double-sided board on which a large number of electronic components are mounted while connecting the boards to each other by through holes or the like is often used.

【0003】しかしながら、コンピュータ装置や、小型
な電子機器の場合はその電子機器の大きさに比較してさ
らに多量の情報を処理する電子回路が要請されており、
このような場合は狭い空間に多量の電子部品と複雑な配
線パターンを形成する必要性から、導体基板を多層にし
た多層基板が実用化されている。
However, in the case of a computer device or a small electronic device, an electronic circuit for processing a larger amount of information than the size of the electronic device is required.
In such a case, since it is necessary to form a large number of electronic components and a complicated wiring pattern in a narrow space, a multilayer substrate having a multilayered conductor substrate has been put to practical use.

【0004】例えば図3は6層の多層基板の平面図と、
その断面(A−B)を示したものであり、11、12、
13、14、15は導体板を絶縁している多層の絶縁基
板であり、内部の配線基板はこの絶縁基板11〜15の
間にサンドイッチ状に挟み込まれている。16、16は
表面に実装される電子部品の半田ランド部を示し、リー
ド端子付きの電子部品の場合は、スルーホール17を介
して半田付けされる場合もある。また、単に両表面を貫
通するための貫通バイアホール18を設けたり、途中の
基板にまでホールがあけられているインタースティシャ
ルバイアホール19を形成する場合もある。
For example, FIG. 3 is a plan view of a six-layer multilayer substrate,
The cross section (AB) is shown, and 11, 12,
Reference numerals 13, 14, and 15 denote multilayer insulating substrates that insulate the conductor plates, and the internal wiring substrate is sandwiched between the insulating substrates 11 to 15. Reference numerals 16 and 16 denote solder lands of electronic components mounted on the surface. In the case of electronic components with lead terminals, they may be soldered through the through holes 17. In some cases, a penetrating via hole 18 for simply penetrating both surfaces may be provided, or an interstitial via hole 19 in which a hole is formed up to an intermediate substrate.

【0005】[0005]

【発明が解決しようとする課題】ところで、一般的に高
密度の電子機器の場合は、その配線パターンは複雑であ
ると同時に高周波信号を取り扱う場合が多いので、多層
基板にすると信号の伝送スピードが問題となることがあ
る。また、電源インピーダンスは一般的に極めて低い値
とされているが、この電源ラインが比較的多くの配線パ
ターン間を行き来するような場合は、信号に対して完全
に接地点としての機能が期待できない状態になり、回路
の動作を不安定にするという問題が生じる。
By the way, in general, in the case of high-density electronic equipment, the wiring pattern thereof is complicated and often handles high-frequency signals. It can be a problem. In general, the power supply impedance is set to an extremely low value. However, when the power supply line moves back and forth between a relatively large number of wiring patterns, a function as a ground point for a signal cannot be expected. State, and the operation of the circuit becomes unstable.

【0006】[0006]

【課題を解決するための手段】本発明はかかる問題点を
軽減できるようにした多層基板を提供するものであり、
少なくとも1〜2枚の電源基板と2枚以上の配線パター
ンを形成した信号基板を含む多層基板において、前記電
源基板間の絶縁は高誘電率の材料を絶縁基板とし、前記
電源基板と信号基板の絶縁部分は低誘電率の絶縁基板を
使用するようにしたものである。
SUMMARY OF THE INVENTION The present invention provides a multi-layer substrate capable of reducing such problems.
In a multilayer board including at least one or two power supply boards and a signal board on which two or more wiring patterns are formed, the insulation between the power supply boards is made of a material having a high dielectric constant as an insulating board. The insulating portion uses an insulating substrate having a low dielectric constant.

【0007】特に本発明の場合は、電源基板を多層基板
の中間部分に配置し、信号基板を表面側に配置すること
によって、低誘電率の絶縁基板と高誘電率の絶縁基板を
適切に使用できるようにし、低い高周波損失タイプの材
料とすることによって高周波回路を伝送する信号の劣化
がなるべく少なくなるようにしている。
[0007] In particular, in the case of the present invention, the power supply board is arranged in the middle portion of the multilayer board and the signal board is arranged on the front side, so that the low dielectric constant insulating substrate and the high dielectric constant insulating substrate can be used properly. As a result, the deterioration of the signal transmitted through the high-frequency circuit is minimized by using a low-frequency loss type material.

【0008】多層基板を構成する絶縁基板がその両面に
位置する導体基板に出入りする電気信号に応じて、その
誘電率が適切に選択されているので、多層基板としたと
きに低電源インピーダンスを提供すると共に、信号線に
対しては、伝送スピードの影響を少なくして回路の安定
化を図るようにしている。
[0008] Since the dielectric constant of the insulating substrate constituting the multilayer substrate is appropriately selected according to the electric signals entering and exiting the conductor substrates located on both surfaces thereof, a low power supply impedance is provided when the multilayer substrate is formed. At the same time, the influence of the transmission speed on the signal lines is reduced to stabilize the circuit.

【0009】[0009]

【発明の実施の形態】図1は本発明の一実施例として4
層の多層基板を斜視図で示し、その一部を断面で示して
いる。この図において21、22、23、は絶縁基板、
24は実相電子部品、25、26、27、28、は導体
基板部分である。多層基板の両面に位置している導体基
板25、28は特に電子部品がクリーム半田や、ディッ
プ層などによって半田付けされ実装されるので、特に信
号基板と呼び、中間に位置している導体基板部分26、
27は主として電源電圧の供給パターンおよび接地ライ
ンとなるので電源基板と呼ぶことにする。なお、29
(a,b,c)は上下の基板の配線パターンによって適
宜設けられる各種のスルーホールを示す。
FIG. 1 shows an embodiment of the present invention.
The multi-layer substrate is shown in a perspective view, part of which is shown in cross section. In this figure, 21, 22, and 23 are insulating substrates,
Reference numeral 24 denotes a real-phase electronic component, and reference numerals 25, 26, 27, and 28 denote conductor substrate portions. The conductor boards 25 and 28 located on both sides of the multilayer board are particularly called signal boards because the electronic components are soldered and mounted with cream solder, a dip layer or the like. 26,
27 is mainly referred to as a power supply board because it mainly serves as a power supply voltage supply pattern and a ground line. Note that 29
(A, b, c) shows various through holes provided as appropriate according to the wiring patterns of the upper and lower substrates.

【0010】ところで、本願発明の多層基板の場合は電
源基板26、27に挟まれてる絶縁基板22としては極
めて高い誘電率を有する絶縁材料が採用されており、両
面の信号基板25、28に隣接している絶縁基板21、
23には比較的低い誘電体材料を使用する点に特徴があ
る。
In the case of the multilayer board of the present invention, an insulating material having an extremely high dielectric constant is adopted as the insulating board 22 sandwiched between the power supply boards 26 and 27, and is adjacent to the signal boards 25 and 28 on both sides. Insulating substrate 21,
23 is characterized in that a relatively low dielectric material is used.

【0011】一般的には絶縁基板を挟んで配置される導
体基板のインピーダンスは、高周波的には分布定数回路
として取り扱うことができ、その特性は図2に示すよう
に単位長当たりのインダクタンス成分をL、容量成分を
Cとする伝送線路と見ることができる。そしてこのよう
な伝送線路で転送される信号の伝搬速度vは、 v=1/ LC によって示され、また、波動インピーダンスは、 Z=(L/C) となる。
In general, the impedance of a conductor substrate disposed with an insulating substrate interposed therebetween can be handled as a distributed constant circuit in terms of high frequency, and its characteristic is that an inductance component per unit length is reduced as shown in FIG. It can be regarded as a transmission line having L and a capacitance component of C. The propagation speed v of a signal transferred on such a transmission line is represented by v = 1 / LC, and the wave impedance is Z = (L / C).

【0012】本発明の多層基板では信号基板25、28
に隣接している絶縁基板21、23の誘電率を低い値と
するように構成することによって単位長当たりの分布容
量Cが小さくなるようにしている。したがって、単位長
当たりの分布容量Cが小さいほど同じ配線パターンであ
れば転送速度Vは高くなり、回路の動作が安定になる。
In the multilayer board of the present invention, the signal boards 25, 28
The distribution capacitance C per unit length is reduced by configuring the insulating substrates 21 and 23 that are adjacent to each other to have a low dielectric constant. Therefore, the smaller the distribution capacitance C per unit length, the higher the transfer speed V with the same wiring pattern, and the more stable the operation of the circuit.

【0013】また、本発明の多層基板の場合は電源基板
26、27で狭着されている絶縁基板22の誘電率εは
できるだけ高い値となるように設定している。この場合
も良く知られているように誘電率が高くなると単位長当
たりの容量性インピーダンスCは大きくなり、電源基板
の内部インピーダンスを引き下げる効果を与えることが
できる。
In the case of the multilayer substrate of the present invention, the dielectric constant ε of the insulating substrate 22 tightly attached to the power supply substrates 26 and 27 is set to be as high as possible. Also in this case, as is well known, when the dielectric constant increases, the capacitive impedance C per unit length increases, and an effect of lowering the internal impedance of the power supply substrate can be provided.

【0014】誘電率を低く設定する絶縁材料としては、
例えばテトラフルオロカーボン(商品名テフロン)が考
えられ、しかもこの材料の場合は高周波損失も比較的小
さいので多層基板として極めて有効になる。また、比較
的誘電率が高い材料としてはたとえばセラミックを分散
したエポキシを使用することができる。この場合は高周
波損失はある程度大きくても、熱的な変形がなく、強度
があることが好ましい。
As an insulating material for setting a low dielectric constant,
For example, tetrafluorocarbon (trade name: Teflon) can be considered, and in the case of this material, the high frequency loss is relatively small, so that it is extremely effective as a multilayer substrate. As a material having a relatively high dielectric constant, for example, epoxy in which ceramic is dispersed can be used. In this case, even if the high-frequency loss is large to some extent, it is preferable that there is no thermal deformation and strength is high.

【0015】以上の実施例では4層基板について述べた
が、本発明は4層以上の多層基板である場合にも適応で
きることはいうまでもない。この場合、中間部分に電源
基板を絶縁基板を介して対向して配置し、この絶縁基板
を高誘電率の材料とすると共に、この電源ラインに対し
て積層される信号基板をその外側に積層していき、これ
らの絶縁基板としては低い誘電率とされている絶縁基板
を使用することが好ましい。
In the above embodiment, a four-layer board has been described. However, it is needless to say that the present invention can be applied to a multi-layer board having four or more layers. In this case, a power supply board is disposed at an intermediate portion so as to face through an insulating substrate, and the insulating board is made of a material having a high dielectric constant, and a signal board to be stacked on the power supply line is stacked on the outside thereof. It is preferable to use an insulating substrate having a low dielectric constant as these insulating substrates.

【0016】[0016]

【発明の効果】以上説明したように、本発明の多層基板
の場合は多層化された導体基板に供給されている電気信
号や電源によって、高い誘電率を有する絶縁基板と、低
い誘電率を有する絶縁基板が適宜組み合わせて使用され
るようにしているので、高密度で配線されている場合で
も電気的にはトラブルが少ない回路を構築することがで
きるという利点がある。
As described above, in the case of the multilayer substrate of the present invention, the insulating substrate having a high dielectric constant and the insulating substrate having a low dielectric constant are provided by an electric signal or a power supply supplied to the multilayered conductive substrate. Since an appropriate combination of insulating substrates is used, there is an advantage that a circuit with little electrical trouble can be constructed even when wiring is performed at high density.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例を示す多層基板の斜視図であ
る。
FIG. 1 is a perspective view of a multilayer substrate showing one embodiment of the present invention.

【図2】多層基板を構成する絶縁基板の誘電率と伝送速
度及びインピーダンスを示す説明図である。
FIG. 2 is an explanatory diagram showing a dielectric constant, a transmission speed, and an impedance of an insulating substrate constituting a multilayer substrate.

【図3】従来の多層基板の説明図である。FIG. 3 is an explanatory diagram of a conventional multilayer substrate.

【符号の説明】[Explanation of symbols]

21、22、23 絶縁基板 24、28 信号基板 25、26 電源基板 21, 22, 23 Insulating board 24, 28 Signal board 25, 26 Power board

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 少なくとも1〜2枚の電源基板と2枚以
上の配線パターンを形成した信号基板を含む多層基板に
おいて、 前記電源基板間の絶縁は高誘電率の材料を絶縁基板と
し、前記電源基板と信号基板の絶縁部分は低誘電率の絶
縁基板が使用されていることを特徴とする多層基板。
1. A multilayer board including at least one or two power supply boards and a signal board on which two or more wiring patterns are formed, wherein insulation between the power supply boards is made of a material having a high dielectric constant, A multilayer substrate, wherein an insulating substrate having a low dielectric constant is used for an insulating portion between the substrate and the signal substrate.
【請求項2】 上記低誘電率の絶縁基板は低損失タイプ
の材料とされていることを特徴とする請求項1に記載の
多層基板。
2. The multi-layer substrate according to claim 1, wherein the insulating substrate having a low dielectric constant is made of a low-loss type material.
【請求項3】 上記絶縁基板はガラス/エポキシ樹脂と
されていることを特徴とする請求項2に記載の多層基
板。
3. The multilayer substrate according to claim 2, wherein said insulating substrate is made of glass / epoxy resin.
【請求項4】 上記電源基板は多層基板の中間部分に配
置し、信号基板は電源基板に対して表面側に配置されて
いることを特徴とする請求項1、2に記載の多層基板。
4. The multi-layer board according to claim 1, wherein the power board is arranged at an intermediate portion of the multi-layer board, and the signal board is arranged on the front side with respect to the power board.
JP13231498A 1998-05-14 1998-05-14 Multilayer board Pending JPH11330711A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13231498A JPH11330711A (en) 1998-05-14 1998-05-14 Multilayer board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13231498A JPH11330711A (en) 1998-05-14 1998-05-14 Multilayer board

Publications (1)

Publication Number Publication Date
JPH11330711A true JPH11330711A (en) 1999-11-30

Family

ID=15078428

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13231498A Pending JPH11330711A (en) 1998-05-14 1998-05-14 Multilayer board

Country Status (1)

Country Link
JP (1) JPH11330711A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001088364A1 (en) * 2000-05-17 2001-11-22 Bosch Automotive Systems Corporation Fuel injection device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001088364A1 (en) * 2000-05-17 2001-11-22 Bosch Automotive Systems Corporation Fuel injection device

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