JPH11330534A - Mesa type photodiode - Google Patents

Mesa type photodiode

Info

Publication number
JPH11330534A
JPH11330534A JP10128754A JP12875498A JPH11330534A JP H11330534 A JPH11330534 A JP H11330534A JP 10128754 A JP10128754 A JP 10128754A JP 12875498 A JP12875498 A JP 12875498A JP H11330534 A JPH11330534 A JP H11330534A
Authority
JP
Japan
Prior art keywords
type
pad
photodiode
layer
type electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10128754A
Other languages
Japanese (ja)
Other versions
JP3684563B2 (en
Inventor
Katsutoshi Sakakibara
勝利 榊原
Shinji Iio
晋司 飯尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Electric Corp filed Critical Yokogawa Electric Corp
Priority to JP12875498A priority Critical patent/JP3684563B2/en
Publication of JPH11330534A publication Critical patent/JPH11330534A/en
Application granted granted Critical
Publication of JP3684563B2 publication Critical patent/JP3684563B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Light Receiving Elements (AREA)

Abstract

PROBLEM TO BE SOLVED: To contrive simply the reduction in the stray capacity of a mesa type photodiode, by a method wherein the mesa type photodiode is formed on a semiinsulative substrate and the surface of a pad, which is connected with the p-type electrode of this photodiode, has a prescribed angle to connect the pad with the p-type substrate. SOLUTION: An n-type InP layer 21, an undoped InGaAs layer 22 and a p-type InP layer 23 are laminated in order on a semiinsulative substrate 201, then, the layers 23 and 22 other than the parts, which are formed with a mesa type photodiode, of the layers 23 and 22 are removed to form an insulating film 24 on the substrate 20 including the layer 23. After the parts, which correspond to a pad connection part of a p-type electrode and a pad connection part of an n-type electrode, of the film 24 are removed, the p-type electrode 23a and the n-type electrode 21a are respectively formed. Subsequently, a polyimide 25 is formed on the substrate 20 including a light-receiving part 26 in an almost same thickness as that of the layer 21, and the p-type electrode part 23a exposed on the polyimide 25 is connected with a pad 27 having a prescribed angle via a lead-out wire 27a.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、引出し電極間の浮
遊容量を低減したメサ型フォトダイオードに関するもの
である。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mesa photodiode having reduced stray capacitance between extraction electrodes.

【0002】[0002]

【従来の技術】近年、情報の高速化が要求され、フォト
ダイオードの伝送速度も例えば2.5Gb/s(ギガビ
ット/秒)から10Gb/s程度の伝送が実現されてい
る。図3はこの様な高速化を図った従来のメサ型フォト
ダイオードの断面構成を示している。図3において、n
型基板(InP)1の一方の面にコンタクト層2が形成
され、他方の面にはアンドープ層(InGaAs)3を
介してP層(InP)4およびトップコンタクト層5が
形成されている。
2. Description of the Related Art In recent years, high-speed information has been demanded, and the transmission speed of a photodiode has been realized, for example, from about 2.5 Gb / s (gigabit / second) to about 10 Gb / s. FIG. 3 shows a cross-sectional configuration of a conventional mesa photodiode which achieves such high speed. In FIG. 3, n
A contact layer 2 is formed on one surface of a mold substrate (InP) 1, and a P layer (InP) 4 and a top contact layer 5 are formed on the other surface via an undoped layer (InGaAs) 3.

【0003】トップコンタクト層5の上部には絶縁体
(ポリイミド)層6が形成され、一点鎖線で示すメサ部
Aの周りが除去されて受光部6および電気信号の取出し
部を含むパッド7が形成されている。このパッド7とコ
ンタクト層2の間に光Bの強さに関連した電気信号Cが
発生する。
[0003] An insulator (polyimide) layer 6 is formed on the top contact layer 5, and the periphery of the mesa portion A indicated by a dashed line is removed to form a light receiving portion 6 and a pad 7 including a portion for extracting an electric signal. Have been. An electric signal C related to the intensity of the light B is generated between the pad 7 and the contact layer 2.

【0004】図4(a)、(b)はメサ型フォトダイオ
ードの他の実施例を示すもので(a)は断面図、(b)
は斜視図である。この従来例では半導電性のInP基板
10上にInPからなるn型層11が形成され、その上
にアンドープ層(InGaAs)12およびInPから
なるn型層13が形成されている。 このn型層13の
上部には絶縁膜14が形成されている。この絶縁膜14
の一部が除去されて一点鎖線で示すフォトダイオードA
を構成するp型層のZn拡散部15が形成されている。
FIGS. 4A and 4B show another embodiment of a mesa photodiode, in which FIG. 4A is a sectional view, and FIG.
Is a perspective view. In this conventional example, an n-type layer 11 made of InP is formed on a semiconductive InP substrate 10, and an undoped layer (InGaAs) 12 and an n-type layer 13 made of InP are formed thereon. An insulating film 14 is formed on the n-type layer 13. This insulating film 14
A is partially removed to show the photodiode A
Is formed in the Zn diffusion portion 15 of the p-type layer.

【0005】絶縁膜14の上にはZn拡散部15に接続
して電気信号の取出し線となるパッド16が形成されて
おり、 n型層11の上には電気信号の取出し部として
のパッド17が形成されている。フォトダイオードAの
近傍のパッド16の下部はアンダエッチング等の手段に
より空洞18が形成され、浮遊容量の影響を除去してい
る。
A pad 16 serving as a line for taking out an electric signal is formed on the insulating film 14 and connected to the Zn diffusion portion 15. A pad 17 serving as a part for taking out an electric signal is formed on the n-type layer 11. Are formed. A cavity 18 is formed in the lower part of the pad 16 near the photodiode A by a method such as under-etching to remove the influence of the stray capacitance.

【0006】[0006]

【発明が解決しようとする課題】ところで、図3に示す
従来例において浮遊容量を低減するためには、ポリイミ
ド6の厚さを厚くするか、パッド7の面積を小さくする
必要があるが、ポリイミド6の厚さを厚くするとしても
10μm程度が限界であり、浮遊容量の低減効果として
は有効な手段とは言えない。また、パッド7の面積を小
さくする方法は実装マージンが少なくなるという問題が
ある。
In order to reduce the stray capacitance in the conventional example shown in FIG. 3, it is necessary to increase the thickness of the polyimide 6 or reduce the area of the pad 7. Even if the thickness of layer 6 is increased, the limit is about 10 μm, which is not an effective means for reducing the stray capacitance. Further, the method of reducing the area of the pad 7 has a problem that the mounting margin is reduced.

【0007】また、図4に示すように空洞18を形成し
て配線の一部に空洞を設ける構成は効果はあるが、空洞
の形成には複雑なプロセスを必要とし、空中に位置する
部分が振動などに対して弱いという問題がある。本発明
はこの様な問題を解決するためになされたもので、フォ
トダイオード部に接続するパッドの形状を工夫すること
により簡単に浮遊容量の低減を図ったメサ型フォトダイ
オードを提供することにある。
Although the structure in which the cavity 18 is formed and a cavity is provided in a part of the wiring as shown in FIG. 4 is effective, the formation of the cavity requires a complicated process, and a portion located in the air is required. There is a problem that it is weak against vibration and the like. The present invention has been made to solve such a problem, and an object of the present invention is to provide a mesa photodiode in which stray capacitance can be easily reduced by devising a shape of a pad connected to a photodiode portion. .

【0008】[0008]

【課題を解決するための手段】このような目的を達成す
るための本発明の構成は、半絶縁性基板上に形成された
メサ型フォトダイオードにおいて、このフォトダイオー
ドのP型電極へ接続されるパッド面が所定の角度を有し
て接続されたことを特徴とするものである。
According to the present invention, there is provided a mesa-type photodiode formed on a semi-insulating substrate, which is connected to a P-type electrode of the photodiode. The pad surface is connected at a predetermined angle.

【0009】[0009]

【発明の実施の形態】以下図面を用いて本発明を詳しく
説明する。図1は本発明の実施の形態を示す平面図であ
る。図において受光部(メサ型フォトダイオード)26
は例えば直径20〜30μm程度に形成されている。こ
の受光部26の上部のp型電極23aに接続して長さ2
0〜40μm、幅8μm程度の引出し線27aが形成さ
れ、この引出し線21に続いてパッド27が形成されて
いる。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the drawings. FIG. 1 is a plan view showing an embodiment of the present invention. In the figure, the light receiving section (mesa photodiode) 26
Is formed, for example, to have a diameter of about 20 to 30 μm. It is connected to the p-type electrode 23a on the upper part of
A lead line 27 a having a width of about 0 to 40 μm and a width of about 8 μm is formed, and a pad 27 is formed following the lead line 21.

【0010】ここでパッド27は引出し線27aとの接
続部分S点から所定の角度(実施例では90度)で2方
向に広がり、幅が100μmになった時点で平行に形成
され、平行状態が始まった部分Tからの長さが凡そ10
0μmに形成されている。n型電極21aにはp型電極
23a側と先端の形状のみ異なる(図では50μmの幅を
有している)パッド28が形成されている。
Here, the pad 27 extends in two directions at a predetermined angle (90 degrees in the embodiment) from the point S connected to the lead line 27a, and is formed in parallel when the width becomes 100 μm. The length from the beginning T is about 10
It is formed at 0 μm. A pad 28 (having a width of 50 μm in the figure) that is different from the p-type electrode 23a only in the shape of the tip is formed on the n-type electrode 21a.

【0011】図2は図1に示すメサ型フォトダイオード
の製作工程の概要を示すもので、工程a〜fは断面図、a
‘〜f’は平面図である。工程に従って説明する。 工程(a) 半絶縁性基板( InP )20上にn型InP層21、
アンドープInGaAs層22、p型InP層23を順
次積層する。
FIG. 2 shows the outline of the manufacturing process of the mesa photodiode shown in FIG.
'To f' are plan views. A description will be given according to the steps. Step (a) An n-type InP layer 21 is formed on a semi-insulating substrate (InP) 20.
An undoped InGaAs layer 22 and a p-type InP layer 23 are sequentially stacked.

【0012】工程(b) メサ型フォトダイオードを形成する部分以外のp型In
P層23およびアンドープInGaAs層22を除去す
る。 工程(c) p型InP層23を含む基板20上に絶縁膜(SiN
x)24を形成し、受光部を構成するp型電極およびn
型電極21aへパッドを形成するための部分を残して他
の部分の絶縁膜を除去し、続いて受光部以外のn型In
P層21も除去する。
Step (b) p-type In other than the portion where the mesa photodiode is formed
The P layer 23 and the undoped InGaAs layer 22 are removed. Step (c) An insulating film (SiN) is formed on the substrate 20 including the p-type InP layer 23.
x) p-type electrode and n forming 24 and forming a light receiving portion
The insulating film in other portions is removed except for a portion for forming a pad on the mold electrode 21a.
The P layer 21 is also removed.

【0013】工程(d) p型電極のパッド接続部とn型電極のパッド接続部に相
当する部分の絶縁膜を除去後p型電極23a、n型電極
21aをそれぞれ形成する。 工程(e) 受光部を含む基板上にn型InP層21とほぼ同じ厚さ
にポリイミド樹脂(絶縁体)25を形成し、p型電極の
パッド接続部とn型電極のパッド接続部に相当する部分
のポリイミド樹脂25を除去して各電極部分21a,2
3aを露出させる。
Step (d) The p-type electrode 23a and the n-type electrode 21a are formed after removing the insulating film corresponding to the pad connection of the p-type electrode and the pad connection of the n-type electrode. Step (e) A polyimide resin (insulator) 25 is formed on the substrate including the light receiving portion to a thickness substantially equal to that of the n-type InP layer 21, and corresponds to a pad connection portion of a p-type electrode and a pad connection portion of an n-type electrode. The portions of the polyimide resin 25 to be removed are removed and the electrode portions 21a, 2
Expose 3a.

【0014】工程(f) ポリイミド樹脂25上に露出したp型電極部分23aに引
出し線27a(幅8×長さ20μm程度)を形成後続いて
パッド27を形成する。このパッド27の形状は引出し
線27aの終端からθ°(実施例では約90°)に扇状
に広がるように形成し、その扇の終端の幅が100μm
の幅になったところで水平に100μm延ばした大きさ
とする。
Step (f) A lead 27a (width 8 × length 20 μm) is formed on the p-type electrode portion 23a exposed on the polyimide resin 25, and a pad 27 is formed. The shape of the pad 27 is formed so as to spread out in a fan shape at θ ° (about 90 ° in the embodiment) from the end of the lead wire 27a, and the width of the end of the fan is 100 μm.
At the width of, it is horizontally extended by 100 μm.

【0015】なお、n型電極に形成するパッド28の形
状はここではp型電極のパッド27に対向する側の1辺
が50μm程度の矩形とし引き続いてp型電極のパッド
と同様の形状としている。なお、本発明の効果は有限要
素法による計算ではテーパ状にしない形状で約49fF
(フェムトファラッド)、テーパ状にすると約32fF
となり、実測値では約30fFと見積もられた。その結
果、浮遊容量による影響を凡そ60%に低減することが
できた。
Here, the shape of the pad 28 formed on the n-type electrode is a rectangle having a side of about 50 μm on the side facing the pad 27 of the p-type electrode, and subsequently has the same shape as the pad of the p-type electrode. . The effect of the present invention is approximately 49 fF in a shape that is not tapered by calculation by the finite element method.
(Femtofarad), about 32fF when tapered
It was estimated to be about 30 fF in the actual measurement. As a result, the effect of the stray capacitance was reduced to about 60%.

【0016】また、本発明の以上の説明は、説明および
例示を目的として特定の好適な実施例を示したに過ぎな
い。したがって本発明はその本質から逸脱せずに多くの
変更、変形をなし得ることは当業者に明らかである。例
えば本実施例では引出し線27aから扇状に広がる角度
を90°としたが、浮遊容量の影響が問題にならない程
度の角度の増減は任意である。
Also, the foregoing description of the invention merely illustrates certain preferred embodiments for purposes of explanation and illustration. Thus, it will be apparent to one skilled in the art that the present invention may be modified or modified in many ways without departing from its essentials. For example, in the present embodiment, the angle spreading in a fan shape from the lead line 27a is set to 90 °, but the angle may be increased or decreased to such an extent that the influence of the stray capacitance does not matter.

【0017】また。フォトダイオードの材質としてIn
P やInGaAsを用いたが同様に機能するものであ
れば、他の材質であってもよい。特許請求の範囲の欄の
記載により定義される本発明の範囲は、その範囲内の変
更、変形を包含するものとする。
Also, In as the material of the photodiode
Although P and InGaAs were used, other materials may be used as long as they function similarly. The scope of the present invention defined by the description in the claims section is intended to cover alterations and modifications within the scope.

【0018】[0018]

【発明の効果】以上説明したように本発明によれば、半
絶縁性基板上に形成されたメサ型フォトダイオードにお
いて、このフォトダイオードのP型電極へ接続されるパ
ッド面が所定の角度を有して接続したので、浮遊容量の
低減を図ったメサ型フォトダイオードを実現することが
できる。
As described above, according to the present invention, in a mesa photodiode formed on a semi-insulating substrate, a pad surface connected to a P-type electrode of the photodiode has a predetermined angle. Connection, a mesa photodiode having a reduced stray capacitance can be realized.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係るメサ型フォトダイオードの平面図
である。
FIG. 1 is a plan view of a mesa photodiode according to the present invention.

【図2】本発明に係るメサ型フォトダイオードの製造工
程の概略を示す断面図および平面図である。
FIGS. 2A and 2B are a cross-sectional view and a plan view schematically showing a manufacturing process of a mesa photodiode according to the present invention.

【図3】従来のメサ型フォトダイオードの一例を示す断
面図である。
FIG. 3 is a cross-sectional view illustrating an example of a conventional mesa photodiode.

【図4】従来のメサ型フォトダイオードの他の例を示す
断面図である。
FIG. 4 is a cross-sectional view showing another example of a conventional mesa photodiode.

【符号の説明】[Explanation of symbols]

20 半絶縁性基板 21 n型層 21a n型電極 22 絶縁層 23 p型層 23a p型電極 24 絶縁膜(SiNx) 25 絶縁体(ポリイミド樹脂) 26 受光部 27 パッド 27a 引出し線 28 パッド Reference Signs List 20 semi-insulating substrate 21 n-type layer 21a n-type electrode 22 insulating layer 23 p-type layer 23a p-type electrode 24 insulating film (SiNx) 25 insulator (polyimide resin) 26 light-receiving unit 27 pad 27a lead-out line 28 pad

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】半絶縁性基板上に形成されたメサ型フォト
ダイオードにおいて、このフォトダイオードのP型電極
へ接続されるパッド面が所定の角度を有して接続された
ことを特徴とするメサ型フォトダイオード 。
1. A mesa photodiode formed on a semi-insulating substrate, wherein a pad surface connected to a P-type electrode of the photodiode is connected at a predetermined angle. Type photodiode.
【請求項2】P型電極へ接続されるパッド面の角度を1
00度以下としたことを特徴とする請求項1記載のメサ
型フォトダイオード。
2. The angle of a pad surface connected to a P-type electrode is set to 1
2. The mesa photodiode according to claim 1, wherein the angle is not more than 00 degrees.
JP12875498A 1998-05-12 1998-05-12 Mesa photodiode Expired - Fee Related JP3684563B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12875498A JP3684563B2 (en) 1998-05-12 1998-05-12 Mesa photodiode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12875498A JP3684563B2 (en) 1998-05-12 1998-05-12 Mesa photodiode

Publications (2)

Publication Number Publication Date
JPH11330534A true JPH11330534A (en) 1999-11-30
JP3684563B2 JP3684563B2 (en) 2005-08-17

Family

ID=14992648

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12875498A Expired - Fee Related JP3684563B2 (en) 1998-05-12 1998-05-12 Mesa photodiode

Country Status (1)

Country Link
JP (1) JP3684563B2 (en)

Also Published As

Publication number Publication date
JP3684563B2 (en) 2005-08-17

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