JPH11320872A - Capacitive load drive circuit and ink-jet recording apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a capacitive load drive circuit which can drive stably even with a load changing a capacity value and with a small consumption power and eliminate countermeasures to the heat generation of a transistor, and an ink-jet recording apparatus using the capacitive load drive circuit as a head-driving circuit. SOLUTION: In this ink-jet recording apparatus, a load capacity monitor means 21 counts a count of piezoelectric vibrators 171 to which a driving signal COM is not applied on the basis of an inverting signal SI of print data and monitors a capacity value of a capacitive load 17. Based on the monitor result, a dummy load capacity selection means 22 turns on a switching element 220 electrically connected in series to a capacitive dummy element 230 having a predetermined capacity value. As a result, such a capacity value that supplements a capacity value change of the capacitive load 17 is selected at a capacitive dummy load 23, so that a sum of the capacity value of the capacitive dummy load 23 and the capacity value of the capacitive load 17 is maintained constant.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a capacitive load driving circuit for driving a capacitive load, and an ink jet printer or an ink jet printer using the capacitive load driving circuit as a head driving circuit for driving a pressure generating element. The present invention relates to an inkjet recording device such as an inkjet plotter.

[0002]

2. Description of the Related Art As a recording head used in various ink jet recording apparatuses such as an ink jet printer and an ink jet plotter, there is known a recording head which discharges ink droplets by changing a volume of a pressure generating chamber communicating with a nozzle opening. Have been. In this type of ink jet recording apparatus, a vibrating plate which is elastically deformable in an out-of-plane direction is formed on a part of a peripheral wall which defines a pressure generating chamber, and the vibrating plate is vibrated by a pressure generating element such as a piezoelectric vibrator. This changes the volume of the pressure generating chamber. A plurality of such nozzle openings are formed in the recording head, and a pressure generating chamber and a piezoelectric vibrator are arranged for each of the plurality of nozzle openings.

Here, all the piezoelectric vibrators are electrically connected in parallel between a common power supply line and a ground line, and a switching element is electrically connected in series to each piezoelectric vibrator. . Therefore, when a predetermined switching element is selected and turned on based on the print data, a drive signal is applied to the piezoelectric vibrator, and ink droplets are ejected from a predetermined nozzle opening to which the drive signal is applied to the piezoelectric vibrator. You. After such a drive signal is generated by the drive vibration generation circuit, the drive signal is current-amplified in a current amplifier circuit including two transistors connected in a push-pull manner and supplied to the piezoelectric vibrator.

[0004]

In the ink jet recording apparatus constructed as described above, since the piezoelectric vibrator has a capacitance, the head driving circuit of the ink jet recording apparatus has the property of a capacitive load driving circuit. For this reason, in the conventional ink jet recording apparatus, since the load capacitance value changes depending on the number of nozzle openings from which the ink droplet is ejected, the waveform of the drive signal is disturbed, and the size of the ink droplet varies. There is.

Further, in the conventional ink jet recording apparatus, the drive signal is amplified and charged and discharged to the piezoelectric vibrator through two push-pull connected transistors, so that the power consumption is large and the transistor generates heat. There is a problem that it is large.

[0006] In view of the above problems, an object of the present invention is to provide:
It is an object of the present invention to provide a capacitive load driving circuit capable of stably driving even a load having a variable capacitance value, and an ink jet printing apparatus using the capacitive load driving circuit as a head driving circuit.

Another object of the present invention is to reduce the power consumption by taking advantage of the fact that a configuration for compensating for the change in the capacity of the load is employed for the purpose of stably driving a load whose capacity varies. It is an object of the present invention to provide a capacitive load driving circuit which does not require measures against heat generation for the transistor, and an ink jet printing apparatus using the capacitive load driving circuit as a head driving circuit.

[0008]

In order to solve the above-mentioned problems, a capacitive load driving circuit according to the present invention includes a capacitive load whose capacitance value changes based on a selection signal, and an electric load parallel to the capacitive load. A capacitive dummy load capable of selectively connecting a capacitance value, a drive signal generating circuit for supplying a drive signal to the capacitive dummy load and the capacitive load via a common power supply line, Load capacity monitoring means for monitoring the capacity value of the load, and selecting the capacity value of the capacitive dummy load based on the monitoring result of the load capacity monitoring means, and selecting the capacity value of the capacitive dummy load and the capacity value of the capacitive load. A dummy load capacitance selecting means for keeping the sum of the capacitance value and the capacitance constant.

In the present invention, the capacitance value of the capacitive dummy load is selected so as to complement the change in the capacitance value of the capacitive load. The capacitance value (sum of the capacitance value of the capacitive load and the capacitance value of the capacitive dummy load) electrically connected in parallel between the electric wire and the ground line is constant. Therefore, stable driving can be performed even with a load whose capacitance value fluctuates.

In the present invention, it is preferable that the load capacity monitoring means is configured to monitor a capacitance value of the capacitive load based on the selection signal. With this configuration, it is possible to easily monitor what value the capacitance of the capacitive load has.

In the present invention, the drive signal generation circuit includes a plurality of constant voltage power supplies having different potentials, and a plurality of switching elements electrically connected in series between each of the plurality of constant voltage power supplies and the power supply line. And a plurality of inductors, and a waveform control unit that outputs a drive signal having a predetermined waveform to the power supply line by turning on and off the plurality of switching elements at a predetermined timing. In the present invention, even if the capacitance value of the load (capacitive load) changes, it is complemented by the capacitive dummy load, so that the capacity of the entire load is always constant. Therefore, by turning on and off the switching element at a predetermined timing to turn on and off the current supply to the inductor at a predetermined timing, it is possible to generate a drive signal having a predetermined waveform on a common power supply line. There is no need to amplify the current with the two connected transistors. Therefore, power consumption is small, and it is not necessary to take measures against heat generation of the transistor in the drive signal generation circuit.

In the present invention, the capacitive load includes n capacitive elements selected based on the selection signal, and each of the n capacitive elements may have an equal capacitance value. . In this case, the capacitance value of the capacitive load is set to 1 by selecting 0 to n from the n capacitive elements based on the selection signal.
It changes so as to have a capacitance value of 0 to n times the capacitance value of the two capacitive elements.

[0013] In this case, the capacitive dummy load includes m capacitive dummy elements having a capacitance value of 2 0 to (m-1) times the capacitance value of the capacitive element. May be configured. In this case, the dummy load capacitance selecting means selects the capacitance value of the capacitive dummy load by selecting 0 to m from the capacitive dummy elements constituting the capacitive dummy load. The capacitance value of the capacitive dummy load and the sum of the capacitive load and the capacitance value are kept constant.

The relationship between the number (n) of nozzle openings and the number (m) of dummy loads is given by m = (integer part of log (n)) + 1 with base 2 as shown in the following equation. is there. However, if n is sufficiently large, the capacity of several nozzles can be neglected, so that m can be reduced.

For example, if the nozzles are 48 rows,
In this case, log (48) = 5.6, and from the above equation, m is
6. Here, if you ignore the bottom bit,
c × 2 ^Five, C × 2^Four, C × 2¹5%
It can be realized with a number of switches and capacitors.

The capacitive load driving circuit thus configured can be used, for example, as a recording head driving circuit of an ink jet recording apparatus. In this case, as the capacitive load, there are provided n pressure generating elements for contracting each of the n pressure generating chambers in the ink jet nozzle and discharging ink in the pressure generating chamber as ink droplets from the nozzle opening. Will be.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to the drawings, an ink jet printer (ink jet recording apparatus) to which the present invention is applied.
Will be described.

(Overall Configuration of Inkjet Printer) FIG. 1A is a functional block diagram of the inkjet recording apparatus of the present embodiment.

In FIG. 1A, an ink jet recording apparatus includes a print controller 1 and a print engine 2.
It is composed of The print controller 1 stores an interface 3 for receiving print data from a host computer (not shown), a RAM 4 for storing various data such as print data, and a routine for performing various data processing. ROM5 and CP
U, etc., an oscillating circuit 7, a driving signal generating circuit 8 for generating a driving signal to the recording head 10 described later, and a power supply for generating a driving signal by the driving signal generating circuit 8. And a power generation unit 80 for transmitting print data and drive signals developed into dot pattern data to the print engine 2.
And

The recording data sent from the host computer or the like is held in the receiving buffer 4A inside the recording device via the interface 3. The recording data held in the receiving buffer 4A is sent to the intermediate buffer 4B after the command analysis. In the intermediate buffer 4B, the recording data in the intermediate format converted into the intermediate code by the control unit 6 is held, and the process of adding the printing position, the type of modification, the size, the font address, etc. of each character is controlled. This is performed by the unit 6. Next, the control section 6 analyzes the print data in the intermediate buffer 4B, develops the decoded dot pattern data in the output buffer 4C, and stores it.

When dot pattern data (print data SI) corresponding to one scan of the recording head 10 is obtained, the dot pattern data is transferred to the interface 9.
Is serially transferred to the recording head 10 via the. When dot pattern data corresponding to one scan is output from the output buffer 4C, the contents of the intermediate buffer 4B are deleted, and the next intermediate code conversion is performed.

The print engine 2 includes a recording head 10
And a paper feed mechanism 11 and a carriage mechanism 12. The paper feed mechanism 11 includes a paper feed motor, a paper feed roller, and the like, and sequentially feeds a recording medium such as a recording paper to perform sub-scanning. The carriage mechanism 12
It comprises a carriage on which the recording head 10 is mounted, a carriage motor for running the carriage via a timing belt, and the like, and performs main scanning of the recording head 10.

The recording head 10 has a large number of nozzle openings, for example, 48 nozzles in the sub-scanning direction, and ejects ink droplets from each nozzle opening at a predetermined timing.

FIG. 2 is a block diagram of the head drive circuit 100 included in the recording head 10.

As shown in FIG. 2, the print data SI developed into the dot pattern data in the head drive circuit 100 formed in the recording head 10 is supplied to the oscillation circuit 7.
Synchronously with the clock signal (CLK) from (FIG. 1A), the data is serially transferred from the interface 9 (see FIG. 1A) to the shift register 13 as shown in FIG. 1B. You. This serially transferred print data S
I is temporarily latched by the latch circuit 14. The latched print data SI is boosted by the level shifter 15 as a voltage amplifier to a voltage that can drive the switch circuit 16, for example, a predetermined voltage of about several tens of volts. The print data SI boosted to a predetermined voltage is given to each switching element 160 of the switch circuit 16.

Here, the common power supply line 18 and the ground line 19
Between each switching element 1 of the switch circuit 16.
60 and a piezoelectric vibrator 17 as a pressure generating element to be described later.
1 are connected in series. That is, the switch circuit 1
6 is provided with a drive signal C from the drive signal generation circuit 8.
OM is applied via the common power supply line 18, and a piezoelectric vibrator 171 is connected to the output side of the switch circuit 16. Therefore, the print data SI can control the operation of the switch circuit 16.

That is, during a period in which the print data applied to the switching element 160 of the switching circuit 16 is "1", the switching element 160 is turned on and the drive signal C is turned on.
OM is applied to the piezoelectric vibrator 171, and the piezoelectric vibrator 171 expands and contracts according to this signal. On the other hand, switch circuit 1
While the print data applied to the sixth switching element 160 is “0”, the supply of the drive signal to the piezoelectric vibrator 171 is interrupted. Such a switching element 16
The selection of 0 (that is, the selection of the piezoelectric vibrator 171) corresponds to the dot pattern data.
For example, 0 to 48 nozzle openings are selected from 48 (n) nozzle openings.

(Configuration of Inkjet Recording Head) FIG.
FIG. 2A is a cross-sectional view illustrating one of a plurality of nozzles included in the recording head 10.

As shown in FIG. 3A, the recording head 10
In this embodiment, a nozzle opening 111 is formed in a nozzle plate 110, a passage hole defining a pressure generating chamber 113 is formed in a flow path forming plate 112, and two ink supply ports 114 communicating with the pressure generating chamber 113 on both sides are defined in the nozzle plate 110. A hole or a groove and a through hole that defines two common ink chambers 115 communicating with the ink supply ports 114 are formed. The vibration plate 116 is made of an elastically deformable thin plate, abuts on the tip of a piezoelectric vibrator 171 (pressure generating element) such as a piezo element, and sandwiches the nozzle plate 1 with the flow path forming plate 112 therebetween.
It is fixed in a liquid-tight manner with the liquid crystal 10 and constitutes a channel unit 118.

The base 119 is formed with an accommodation chamber 120 for accommodating the piezoelectric vibrator 171 so as to vibrate and an opening 121 for supporting the flow path unit 118. The piezoelectric vibrator 17
1 is fixed by a fixed substrate 122. In addition, base 119
The recording head 10 is assembled by fixing the flow path unit 118 to the opening 121 in a state where the island portion 116a of the vibration plate 116 is in contact with the piezoelectric vibrator 171.

The driving signal COM for driving the piezoelectric vibrator 171 in the recording head 10 having the above-described configuration is used.
Is, as shown in FIG. 3 (B), the voltage value is the intermediate potential V
After starting from m (hold pulse 311), it rises at a constant gradient from time T1 to time T2 to the maximum potential VPS (charge pulse 312), and from time T2 to time T3.
Until then, the maximum potential VPS is maintained for a predetermined time (hold pulse 313). Next, after falling from the time T3 to the time T4 with a constant gradient to the lowest potential VLS (discharge pulse 314), the lowest potential VLS is maintained for a predetermined time from the time T4 to the time T5 (hold pulse 315). Then, from time T5 to time T6, the voltage value is the intermediate potential Vm.
(Charge pulse 316).

3A and 3B, when the charging pulse 312 is applied to the piezoelectric vibrator 171, the piezoelectric vibrator 171 bends to expand the volume of the pressure generating chamber 113, and Generates negative pressure inside. As a result, the meniscus retracts from the nozzle opening 111. Next, when a discharge pulse 314 is applied, the piezoelectric vibrator 171
Deflects in the direction of contracting the volume of the pressure generating chamber 113, and a positive pressure is generated in the pressure generating chamber 113. As a result, ink droplets are ejected from the nozzle openings 111. Then, after the hold pulse 315 is applied, the charging pulse 316 is applied to suppress the meniscus vibration.

(Configuration for Compensating Change in Capacitance Value) In the recording head 10 thus configured, in the piezoelectric vibrator 171
Is a capacitive element that repeats charging and discharging based on the drive signal COM,
The head drive circuit 100 described with reference to FIG. 2 can be regarded as a capacitive load drive circuit that drives the capacitive load 17 including the piezoelectric vibrator 171. In the capacitive load 17, for example, 0 to 48 of the 48 piezoelectric vibrators 171 are selected and driven by the print data SI. Will change. That is, when the number of the piezoelectric vibrators 171 is n and the capacity of one piezoelectric vibrator 171 is c, the head drive depends on how many piezoelectric vibrators 171 are selected based on the print data SI. Circuit 100
, The load capacitance value is c × 0, c × 1, c × 2.
.. C × (n−2), c × (n−1), c × n, and the capacitance value changes from 0 to n times c.

In order to prevent the waveform of the drive signal COM from changing due to such a change in the capacitance value of the load,
In the present invention, first, a load capacity monitoring unit 21 that monitors the capacitance value of the capacitive load 17 in the head drive circuit 100 based on the print data SI is configured. In the present embodiment, the load capacity monitoring means 21 is configured based on a knot circuit 211 for inverting and outputting the print data SI, and based on an inverted signal of the print data SI input to the count enable terminal via the knot circuit 211. At the time of this drive, the number of nozzle openings in which ink droplets are not ejected, that is, the number of switching elements 160
And a counter 212 that counts the number of piezoelectric vibrators 171 to which the drive signal COM is not applied because is not selected.

The counter 212 outputs a signal corresponding to the number of piezoelectric vibrators 171 to which the drive signal COM is not applied. Note that the clock signal CL for the counter 212 is
K also uses the clock signal CLK used to select the capacitive load 17. Also, the counter 212 has 1
Each time the recording for the cycle is completed, the clear signal CLR is input to the clear terminal. Here, in the output from the counter 212, the bit corresponds to a specific dummy capacitance. For example, the MSB of the counter 212 is c × 2
It corresponds to the dummy load of ^(m-1) . Therefore, the counter 21
2, the optimum dummy load can be selected.

Here, the common power supply line 18 and the ground line 19
, The dummy load capacitance selecting means 22 and the capacitive dummy load 23 are electrically connected in series, and the dummy load capacitance selecting means 22 and the plurality of capacitive dummy elements 230 are electrically connected.
Are electrically connected in parallel to the switch circuit 16 and the capacitive load 17.

The dummy load capacitance selecting means 22 is composed of a switching element 220 having the same configuration as that of the switch circuit 16, and a signal output from the counter 212 to the dummy load capacitance selecting means 22 (a piezoelectric element to which the drive signal COM is not applied). The count value of the vibrator 17) is input.

The capacitive dummy load 23 has a capacitance value c of one piezoelectric vibrator 171 of 2 to the power of 0 to (m-1).
Multiplied capacitance values, ie, c × 2 ⁰ , c × 2 ¹ , c × 2 ²
... M having c × 2 ^m−3 , c × 2 ^m−2 and c × 2 ^m−1
Each of the dummy dummy elements 230 is electrically connected in series to the switching element 220 of the dummy load capacitance selecting means 22.

Therefore, in the load capacitance monitoring means 21, the piezoelectric vibrator 171 to which the drive signal COM is not applied because the switching element 160 is not selected in the switch circuit 16 by the counting from the inverted signal of the print data SI.
By counting the number, the capacitance value of the capacitive load 17 can be monitored, and based on the monitoring result, the dummy load capacitance selecting means 22 electrically connects in series to the capacitive dummy element 230 having a predetermined capacitance value. The switching element 220 is turned on. As a result, the capacitance value of the capacitive dummy load 23 changes so as to complement the change in the capacitance value of the capacitive load 17, and the capacitance value of the capacitive dummy load 23 (the capacitance value of the selected capacitive dummy element 230). sum)
And the capacitance value of the capacitive load 17 (the selected piezoelectric vibrator 1
(The sum of the capacitance values of R.71 and R.71) is kept constant.

Therefore, the common power supply line 18 and the ground line 19
(The sum of the capacitance value of the capacitive load 17 and the capacitance value of the capacitive dummy load 23) is constant regardless of the capacitance value of the capacitive load 17 at any level. Therefore, the actual load to be driven (capacitive load 1
Even if the capacitance value of 7) fluctuates, the waveform of the drive signal COM is not disturbed, and each piezoelectric signal element 171 can be driven stably.

(Configuration of drive signal generation circuit)
In this embodiment, the drive signal generation circuit 8 is configured as shown in FIG. 4 by providing the capacitive dummy load 23 with respect to the capacitive load 17 and utilizing the fact that there is no change in the capacitance value of the entire load. I have.

FIG. 4 is an equivalent circuit diagram of the drive signal generation circuit of this embodiment.

In FIG. 4, the drive signal generation circuit 8 of the present embodiment includes a plurality of constant voltage power supplies V20, V-10, which have different potentials and are formed in a power supply generation section 80 (see FIG. 1A).
V-5 and these constant voltage power supplies V20, V-10, V-
5 connected in series between the power supply line 5 and the common power supply line 18.
S-FETs M37, M40, M39 and inductor L
5, L6, L7 and MOS-FETs M37, M40, M
A waveform control unit 6 outputs control signals V2, V6, and V7 for outputting a drive signal COM having a predetermined waveform to the common power supply line 18 by turning on and off the control signal 39 at a predetermined timing.

That is, for the common feed line 18,
A diode D13 for preventing reverse current and a MOS-FET M from a constant voltage power supply V + 20 for generating a DC power supply of 20 V;
0.5 μH inductor L supplied via
5 and a control signal V2 for controlling power supply to the inductor L5 by controlling the gate voltage of the MOS-FET M37.
The first waveform generator 81 having the following configuration is provided. Incidentally, a bias resistor R27 is connected to the MOS-FET M37. In the first waveform generator 81, the constant voltage power supply V20 is a switching power supply including a pnp transistor 511, an inductor 512, a smoothing capacitor 513, a diode 514, and a controller 515, as shown in FIG. The controller 515 detects the output voltage from the inductor 512, and on / off controls the pnp transistor 511 based on the detection result, thereby generating a constant voltage of + 20V.

Referring again to FIG.
Has a constant voltage power supply V-10 which generates a + 9V DC power supply.
D14 and MOS-F for preventing reverse current
A second waveform generator 82 is provided which includes an inductor L6 of 0.5 μH supplied with power via the ETM 40, and a control signal V6 for controlling power supply to the inductor L6 by controlling a gate voltage of the MOS-FET M40. ing. The MOS-FET M40 has a bias resistor R3
2 are connected. In the second waveform generator 82, the constant voltage power supply V-10 is connected to
A switching power supply including an npn transistor 521, an inductor 522, a smoothing capacitor 523, a diode 524, and a controller 525. The controller 525 detects an output voltage from the inductor 522, and turns on the npn transistor 521 based on the detection result. , A constant voltage of +10 V is generated.

Referring again to FIG.
8 is supplied from a constant voltage power supply V-5 that generates a + 5.8V DC power supply via a reverse current prevention diode D15 and a MOS-FET M39 to 0.5 .mu.m.
A third waveform generation unit 83 including an H inductor L7 and a control signal V7 that controls the power supply to the inductor L7 by controlling the gate voltage of the MOS-FET M39 is configured. Incidentally, a bias resistor R33 is connected to the MOS-FET M39. In the third waveform generation unit 83, the constant voltage power supply V-5 includes a pnp transistor 531 and an inductor 53, as shown in FIG.
2, a switching power supply including a smoothing capacitor 533, a diode 534, and a controller 535. The controller 535 detects an output voltage from the inductor 532, and based on the detection result, determines whether the npn transistor 5
A constant voltage of +5.8 V is generated by controlling on / off of 31.

Note that a capacitive load C1 represented by 1 μF is connected to the common power supply line 18, and the capacitance of the capacitive load C1 is constant as described above.

In the drive signal generation circuit 8 configured as described above, the drive waveform COM described with reference to FIG.
Will be described with reference to FIG. 4 and FIG.

FIG. 6A shows the voltage VCOM and the currents I1, I2 measured at the points I10, I20, I30.
FIG. 2 is a waveform chart of I3. FIG. 6 (B), (C), (D)
Is a waveform diagram of control signals V2, V6, and V7, respectively. This figure shows a waveform in a steady state, but before that, an intermediate potential (potential of the hold pulse 311) from the ground is previously set by using a charging pulse 316 described later.

In these figures, the control signal V2 is at the low level during the period from the time T1 to the time T2.
The FET M37 is turned on when the gate potential drops by about 4 V from the source potential. As a result, as shown in FIG. 6A, while the current I1 flows through the inductor L5 and the current flows toward the capacitive load at that time, a back electromotive force is generated in the inductor L5. A part of the sine wave having the cycle determined by the above appears on the common power supply line 18 as indicated by the charging pulse 312 with the amplitude of the difference between the potential of the power supply V20 and the hold pulse 311 in the waveform.
Next, when the gradient of the potential becomes 0, the current flows from the load to the power supply V.
20, but does not flow backward due to the diode D13, and the drive potential VCOM becomes flat as it is.
After that, the control signal V2 is set to the high level to set the MOS-FE
Turn off TM37.

Next, during a period from time T3 to time T4, the control signal V6 is at a high level, but the MOS-FET M40 is turned on when the gate potential rises about 4V from the source potential. As a result, as shown in FIG.
6, a current flows from a capacitive load at that time. However, since a back electromotive force is generated in the inductor L6, a part of a sine wave having a cycle determined by the inductor L6 and the load capacity is supplied to the power supply V-10, Hold pulse 31 in waveform
3 and appear on the common power supply line 18 as indicated by the discharge pulse 314 at the amplitude of the difference from the potential of the potential 3. Next, the potential gradient is 0
, The current tries to flow from the load to the power supply V-10, but does not flow backward due to the diode D14, and the driving potential VCOM becomes flat as it is. After that, the control signal V
6 is set to low level to turn off the MOS-FET M40.

Next, during the period from time T5 to T6, the control signal V7 is at a low level, but the MOS-FET M39 is turned on when the gate potential falls about 4V from the source potential. As a result, as shown in FIG.
7, a current flows into the capacitive load at that time. However, since a back electromotive force is generated in the inductor L7, a part of a sine wave having a cycle determined by the inductor L7 and the load capacitance is generated by the power supply V−. 5. The amplitude of the difference between the potential of the hold pulse 315 in the waveform and the potential appears on the common power supply line 18 as indicated by the charging pulse 316. Next, when the potential gradient becomes 0, the current tries to flow from the load to the power supply V-5, but does not flow backward due to the diode D15, and the drive potential VCOM becomes flat as it is. Thereafter, the control signal V7 is set to the high level to turn off the MOS-FET M39.

As a result, the voltage VCOM becomes equal to the hold pulse 311, the charge pulse 312, the hold pulse 313, and the drive signal COM described with reference to FIG.
A discharge pulse 314, a hold pulse 315, and a charge pulse 316 appear.

As described above, the present embodiment employs a configuration in which the load capacity fluctuation is complemented and the load capacity value is kept constant in order to stably drive a load whose capacity value fluctuates. The driving signal COM is generated using the back electromotive force of the inductors L5, L6, and L7. Therefore, from the viewpoint of the peak voltage of the drive signal COM, a low-voltage constant-voltage power supply is required, and there is no need to use a push-pull-pull transistor. Therefore, the power consumption is small, and no countermeasures against heat generation for the transistor are required.

In order to improve the accuracy of the drive signal COM, an amplifier is connected to the common power supply line 18 in parallel with the drive signal generation circuit 8 of this embodiment, and the drive signal generation circuit 8 Waveform shaping may be performed on the output drive signal COM.

In FIG. 2, the configuration subsequent to the load capacity monitoring means also includes a shift register 13, a latch circuit 14, a level shifter 15, a switch circuit 16 and a piezoelectric vibrator 171, and print data SI.
May be inverted.

[0057]

As described above, in the capacitive load driving circuit according to the present invention and the ink jet recording apparatus using the same in the head driving circuit, the capacitive load driving circuit compensates for the change in the capacitance value of the capacitive load. Since the capacitance value of the dummy load is adjusted, regardless of the capacitance value of the capacitive load, the capacitance value (capacitance of the capacitive load) that is electrically connected in parallel between the common power supply line and the ground line Sum of the capacitance value of the piezoelectric vibrator selected in the capacitive load and the sum of the capacitance values of the capacitive dummy elements selected in the capacitive dummy load. ) Is constant. Therefore, a capacitive load such as a piezoelectric vibrator can be driven stably even with a load whose capacitance value fluctuates.

If the capacitance value of the load does not fluctuate, by turning on and off the power supply to the inductor at a predetermined timing, a drive signal generation such that a drive signal having a predetermined waveform appears on the common power supply line. A circuit can be used. With such a drive signal generation circuit, it is not necessary to amplify the current by using two transistors connected in a push-pull manner, so that the power consumption is small and no countermeasures against heat generation for the transistors are required. .

[Brief description of the drawings]

FIG. 1A is a functional block diagram of an ink jet recording apparatus to which the present invention is applied, and FIG. 1B is a waveform diagram of print data and a clock signal used in the recording apparatus.

FIG. 2 is a circuit diagram showing a main part of a recording head drive circuit of the ink jet recording apparatus shown in FIG.

FIGS. 3A and 3B are an explanatory diagram showing a mechanical structure of a recording head of the inkjet recording device shown in FIG. 2 and a waveform diagram showing an example of a driving signal for driving the recording head. .

FIG. 4 is an equivalent circuit diagram of a drive signal generation circuit configured in the ink jet recording apparatus shown in FIG.

FIGS. 5A, 5B, and 5C are equivalent circuit diagrams of a power generation unit included in the inkjet recording apparatus shown in FIG. 1;

FIG. 6 (A), (B), (C), (D)
FIG. 4 is a waveform diagram showing measurement results of voltage or current at each point shown in FIG. 4, a waveform diagram of a control signal of the first waveform generation unit,
FIG. 7 is a waveform diagram of a control signal of a second waveform generator and a waveform diagram of a control signal of a third waveform generator.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Print controller 2 Print engine 6 Control part 8 Drive signal generation circuit 10 Recording head 13 Shift register 14 Latch circuit 15 Level shifter 16 Switch circuit 17 Capacitive load 18 Common feed line 19 Ground line 21 Load capacity monitoring means 22 Dummy load capacity selection means Reference Signs List 23 Capacitive dummy load 80 Power generation unit 100 Head drive circuit 160 Switching element of switch circuit 171 Piezoelectric vibrator (capacitive element) 211 Knot circuit 212 Counter 220 Switching element of dummy load capacitance selecting means 230 Capacitance of capacitive dummy load Dummy element SI Print data CLK Clock signal

Claims (6)

[Claims] A capacitive load whose capacitance value changes based on a selection signal; a capacitive dummy load electrically connected to the capacitive load in parallel to select a capacitance value; A drive signal generation circuit that supplies a drive signal to the capacitive load via a common power supply line, a load capacity monitoring unit that monitors a capacitance value of the capacitive load, and a monitoring result of the load capacity monitoring unit. A dummy load capacitance selecting means for selecting a capacitance value of the capacitive dummy load based on the capacitance value and keeping a sum of a capacitance value of the capacitive dummy load and a capacitance value of the capacitive load constant. Capacitive load drive circuit. 2. The capacitive load driving circuit according to claim 1, wherein said load capacitance monitoring means is configured to monitor a capacitance value of said capacitive load based on said selection signal. 3. The drive signal generation circuit according to claim 1, wherein the drive signal generation circuit is electrically connected in series between the plurality of constant voltage power supplies having different potentials and each of the plurality of constant voltage power supplies and the power supply line. A plurality of switching elements and a plurality of inductors, and waveform control means for outputting a drive signal having a predetermined waveform to the power supply line by turning on and off the plurality of switching elements at a predetermined timing. And a capacitive load drive circuit. 4. The method according to claim 1, wherein
The capacitive load includes n capacitive elements selected based on the selection signal, and each of the n capacitive elements has an equal capacitance value. By selecting 0 to n out of the n capacitive elements based on the selection signal, a capacitance value of 0 to n times the capacitance value of the one capacitive element is selected. A capacitive load driving circuit characterized by changing. 5. The capacitive dummy load according to claim 4, wherein the capacitive dummy load has m capacitive dummy capacitances having a capacitance value of 2 0 to (m−1) times the capacitance value of the capacitive element. The dummy load capacitance selecting means selects from 0 to m capacitive dummy elements constituting the capacitive dummy load, thereby selecting a capacitance value from the capacitive dummy load and selecting the capacitance value. A capacitive load driving circuit for maintaining a constant value of a capacitive dummy load and a sum of the capacitive load and the capacitive value. 6. The ink jet recording apparatus according to claim 4, wherein said capacitive load driving circuit is provided as a recording head driving circuit, and wherein said capacitive load includes n pressure generating chambers in an ink jet nozzle. An ink jet recording apparatus comprising: n pressure generating elements that contract to discharge ink in the pressure generating chamber from the nozzle openings as ink droplets.