JPH1131208A - Semiconductor chip and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the illegal decoding of technology incorporated in a semiconductor chip by forming recessed parts in an area corresponding to the non- volatile memory of a main face-side at the back of a semiconductor substrate. SOLUTION: An etching mask 3 having prescribed opening parts 4 is formed at the back of the area 2 where the non-volatile memory is formed on the silicon substrate 1 by a laser grinding machine using KrF excimer laser. The back of the silicon substrate 1 is immersed in KOH aqueous solution, wet etching is executed and the recessed parts 5 of square cone trapezoid forms are formed at the back of the silicon substrate 1. The strength of the silicon substrate 1 becomes weaker compared with that before the recessed parts are formed. When illegal stress is given from outside, the semiconductor substrate is fragmented and the leakage of information existing in the semiconductor chip is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor chip used for, for example, an IC card and a method for manufacturing the same.

[0002]

2. Description of the Related Art A semiconductor chip has a high degree of intellectual property information, such as original ideas relating to circuit patterns and manufacturing techniques, and program information stored in a nonvolatile memory (EEPROM or the like). Therefore, from the viewpoint of information management, appropriate preventive measures need to be taken to prevent such information from being leaked by unauthorized means. However, most of the information and stored information on such circuit patterns and manufacturing techniques must be decoded from the main surface side of the substrate by optical observation means such as a microscope if the circuit pattern is exposed. Is possible.

At present, a semiconductor chip of a plastic mold widely used is sealed with an opaque mold resin as it is and is invisible. Also, since a soft error protection film is formed on the circuit surface side in addition to the sealing agent, or a mounting substrate is opposed in flip-chip mounting, exposing the surface is not so easy. However, after removing the mold resin by an appropriate method, the semiconductor chip bonded to the lead frame may be mechanically peeled off to expose the circuit pattern.

[0004] In view of such conventional problems,
By making the thickness of the semiconductor substrate thinner than that of a normal one, the semiconductor chip can be easily crushed and illegal decoding of a circuit pattern or the like can be prevented.

[0005]

However, when the entire surface of the semiconductor substrate is made thinner, there is a problem that the strength at the time of dicing or bonding the wafer becomes insufficient. Further, when the entire surface of the semiconductor substrate is thinned, the strength of the semiconductor substrate is uniformly reduced, and it is not known which portion is to be crushed, and a non-volatile memory or the like which should be destroyed remains as it is. There is also a problem that it will. Therefore, a main object of the present invention is to provide a semiconductor chip and a method for manufacturing the same, which can prevent unauthorized decoding of the technology incorporated in the semiconductor chip.

[0006]

In order to solve such a problem, according to the present invention, if an attempt is made to illegally remove a semiconductor chip adhered to a lead frame or the like, the semiconductor chip will be destroyed, The function provided is to be crushed.

In order to achieve the above object, a semiconductor chip according to the present invention comprises a semiconductor chip having a nonvolatile memory formed on a main surface side of a semiconductor substrate, wherein at least one semiconductor chip is provided on the back surface of the semiconductor substrate. Is formed,
The recess is disposed in a region corresponding to the nonvolatile memory. Further, in the method for manufacturing a semiconductor chip according to the present invention, in the method for manufacturing a semiconductor chip in which a nonvolatile memory is formed on a main surface side of a semiconductor substrate, at least a back surface of the semiconductor substrate corresponding to the nonvolatile memory is provided. Forming an etching mask having one opening, selectively etching the back surface of the semiconductor substrate exposed from the opening of the etching mask,
A concave portion is formed on the back surface of the semiconductor substrate.

[0008]

Next, one embodiment of the present invention will be described with reference to the drawings. 1 (a) to 1 (c)
1 shows an embodiment of the present invention. In FIG. 1A, a silicon substrate 1 has a thickness of 370 μm, and a semiconductor element (not shown) is formed on a main surface side to form a semiconductor chip. For example, as this semiconductor element, EEP
A nonvolatile memory such as a ROM is formed.

FIG. 1B is an enlarged view of a region (region 2 in which a nonvolatile memory is formed) surrounded by a broken line in FIG. 1A. On the back surface of the silicon substrate 1, an etching mask 3 having a predetermined opening 4 is formed. For example, the etching mask 3 is a silicon dioxide film formed on the back surface of the silicon substrate 1, and the openings 4 of 400 μm square are formed at a pitch of 500 μm by a laser grinder using a KrF excimer laser or the like. Thereafter, the back surface of the silicon substrate 1 is immersed in, for example, a 30% KOH aqueous solution while maintaining the temperature at 70 ° C., and wet-etched for 4 hours to form a square pyramid having a depth of 220 μm on the back surface of the silicon substrate 1. A trapezoidal concave portion 5 is formed as shown in FIG.

As described above, the concave portion 5 is formed on the back surface of the silicon substrate 1.
As a result, the strength of the silicon substrate 1 becomes weaker than that before the concave portion is formed. Therefore, when an improper stress is applied from the outside, the semiconductor substrate is crushed, and leakage of information existing in the semiconductor chip can be prevented.

Incidentally, only one such concave portion may be formed on the back surface of the element forming region of the semiconductor chip. That is, as shown in FIG. 2A, an etching mask 3 having an opening 4 provided on the back surface of a semiconductor chip corresponding to an element forming region is arranged, and a semiconductor exposed in the opening 4 with reference to the etching mask 3 is provided. The concave portion 5 as shown in FIG. 2B may be formed by etching the back surface of the substrate 1.

In this case, it is preferable to leave the edge of the semiconductor chip without being etched. That is, by making the film thickness of the region along the scribe line of the semiconductor chip equal to the film thickness of the wafer, the strength at the time of dicing the semiconductor chip from the wafer or at the time of bonding can be maintained. For example, in the case of a substrate having a thickness of 200 to 400 μm, it is preferable to maintain a region of about 100 μm from the edge to have a thickness equal to that of the wafer. Alternatively, if the region having an aspect ratio of “1” from the edge is maintained at a film thickness equal to that of the wafer, the strength at the time of dicing is more reliably maintained (for example, for a substrate having a thickness of 200 μm, the edge of the semiconductor chip is not affected). To 200 μm).

Further, a plurality of concave portions may be formed over the entire surface of the element formation region, or may be formed only in a specific region. For example, by forming a recess only in a specific area such as a nonvolatile memory in which important information is stored or a circuit having a valuable industrial property in a structure, an area to be destroyed preferentially according to the importance is formed. Can be set. Details will be described in Examples.

By the way, the silicon substrate has a relatively good property of transmitting light in the near-infrared to infrared region, and by scanning with a laser having such a wavelength, a circuit pattern image on the front surface side can be obtained even from the back surface of the substrate. It is becoming observable.
Observation from the back side is a new measurement technique that has never been seen before, and the current situation is that the conventional semiconductor chip is more vulnerable. In particular, in the case of a semiconductor chip which is surface-mounted with a flip chip, since the back surface can be exposed very easily, there is a strong demand for a simple and effective fraud prevention measure for observation from the back surface side of the silicon substrate. . In addition, in a nonvolatile memory area of a semiconductor chip, information to be stored is often a high value-added program, and countermeasures against such areas are particularly important and urgently required.

Therefore, it can be said that it is more desirable that the cross-sectional shape of the concave portion 5 is V-shaped or trapezoidal, and that the surface inside the concave portion is formed by a slope. In other words, the observation light vertically incident from the back surface of the substrate is refracted or reflected by the concave slope and does not go straight, so that even if the circuit pattern image is observed from the back surface by an optical method such as a laser scanning microscope, the observation light is on the vertical line. The circuit can no longer be observed.

Further, the bottom of the concave portion 5 when the cross section is trapezoidal may be flat, but if it is flat, the circuit on the surface side at that portion may be observable. Is more preferable. In this case, since the roughness of the rough surface is equivalent to the fact that it is effectively smooth below the observation wavelength, the degree of the rough surface is preferably equal to or longer than the observation wavelength. In the case of observation from the back surface, a wavelength of 600 nm to 5 μm may be considered as observation light transmitted through silicon, and a wavelength of 700 nm to 2 μm is preferable. When the size of the rough surface is made larger than the above wavelength, the incident light is refracted in a complicated manner, so that it becomes impossible to observe a circuit pattern or the like.

Also, the surface of the slope in the recess 5 does not necessarily have to be smooth. Further, the recess 5
May be formed by a set of a plurality of surfaces such as a trapezoid. However, if the size of the steps is shorter than the wavelength of the observation light, the stair-like shape consisting of a horizontal surface and a vertical surface on the back surface can function as a smooth slope if the size of the steps is shorter than the wavelength of the observation light. If the step has a size equal to or greater than the wavelength of the observation light, the function will be inferior depending on the degree.

Next, the depth of the recess 5 will be described. The preferred depth of the recess 5 depends on the desired effect. That is, (1) for the purpose of making optical observation difficult, the concave portion 5 exhibits an effect at a depth of at most about 5 μm, so that it is only required to be 5 μm or more, and (2) to make the semiconductor substrate brittle. It is desirable that the depth be at least half the thickness of the semiconductor substrate. For example, 300μ
For a substrate having a thickness of about m, a concave portion having a depth of 150 μm or more may be formed. In this case, the optical effect can be satisfied simultaneously with the weakening of the substrate.

However, if the closest distance between the recess and the main surface of the semiconductor substrate (ie, the minimum value of the substrate thickness) is still sufficiently large, the back surface is flattened by mechanically polishing the substrate. May be changed. Therefore, in order to prevent such misconduct, the closest approach interval must be 10
Preferably, it is less than 0 μm. Therefore, it can be said that it is extremely effective if the closest distance between the recess and the main surface of the semiconductor substrate is smaller than half of the substrate thickness or smaller than 100 μm, whichever is smaller. Needless to say, the closest distance between the concave portion and the main surface of the semiconductor substrate needs to be at least as large as not to impair the function of the semiconductor element, and can be reduced to, for example, about 10 μm.

Next, a technique for forming the concave portion 5 will be described. There are several types of techniques for forming the concave portion according to the present invention. For example, mechanical grinding, dry etching, wet etching, etc. are useful, but in the present invention, wet etching is considered to be optimal for the following reasons. However, a method other than wet etching is not unsuitable, and may be employed depending on conditions. (1) Mechanical Grinding If a linear V-shaped groove is formed, it is easy to machine by mechanical grinding. However, mechanical grinding is technically difficult to form an isolated concave shape such as a quadrangular pyramid. Also, reducing the thickness of a specific portion to less than 100 μm may give excessive stress to the substrate and damage the function of the element.

(2) Dry Etching In dry etching using plasma, it is possible to form a rectangular cross section or to form a slope in a concave portion depending on conditions. However, even in such dry etching using plasma, there is a concern about element damage due to charge-up, and it is technically difficult to form an etching mask that can be used for etching to a depth of several 100 nm.

(3) Wet Etching Wet etching can be performed at a moderate temperature, has a sufficient etching mask of a thin film, and has the advantages of low cost. In addition, in the etching of a silicon substrate with a basic aqueous solution, anisotropic etching can be performed because the etching rate for each crystal plane orientation of the substrate is different from each other by at least one digit. For example, if the plane orientation is (10
When the substrate of (0) is used, the etching rate is low (11).
1) There is an advantage that a slope having an angle of about 55 degrees can be easily formed by leaving a surface. However, depending on the shape and orientation of the opening, a surface of a higher order than (111) may be exposed and etching may stop apparently. When a circular opening is provided in the etching mask, the cross section of the formed concave portion parallel to the substrate surface usually has a rectangular shape circumscribing the circle.

Further, the fact that this wet etching method is effective is because the depth is almost uniquely determined once the opening dimension is determined on the back surface when forming the V-shaped concave portion. it is obvious.

Therefore, in the present invention, it is considered that a method of forming a concave portion on the back surface by wet etching using a silicon substrate having a (100) plane orientation and a basic aqueous solution is particularly useful. In particular, since the widely used CMOS semiconductor device is usually formed on a silicon substrate having a (100) plane orientation, the present invention is very effectively applied.

Here, the concentration of the basic aqueous solution is 1
It is generally well known that an aqueous solution of 0 to 40% NaOH or KOH or an aqueous solution of an organic alkali is useful. Therefore, in the present invention, etching is performed using such a solution. Further, anisotropic etching can be performed with a basic aqueous solution even when a substrate having a plane orientation of (110) is used. In particular, bearings <1, -1,
-2>, a groove having a vertical side wall and a rectangular cross section can be formed. Accordingly, it is difficult to obtain an effect of preventing optical observation, but it is possible to weaken the semiconductor chip by partially reducing the thickness of the substrate.

In order to form the recess, the substrate may be etched using a generally well-known acidic solution such as a mixture of hydrofluoric acid, nitric acid and glacial acetic acid. In the case of such a mixed solution, isotropic etching which hardly depends on the plane orientation is performed, but the etching rate is high, so that the throughput is high.

The etching mask material may be of any type as long as it has sufficient resistance to the etching solution and can be patterned by an appropriate method. For example, it is preferable to use an organic polymer as an etching mask material because the process is simplified.

However, the etching mask material of the organic polymer has a disadvantage that the edge of the concave portion is easily receded because the etching solution easily erodes the substrate at the interface with the organic polymer. On the other hand, when a film of silicon nitride or silicon dioxide is used as an etching mask, although the number of steps is increased, the substrate can be etched almost without receding from the pattern opened in those masks,
This has the effect that the shape can be controlled with high precision.

The mask opening may be formed into a pattern by an ordinary photolithography process after forming a film of an etching mask material, or may be formed by lithography of an electron beam or an ion beam or laser ablation. Good. Further, printing of a pattern or other methods may be used.

Although the step of forming the concave portion according to the present invention has been described as being performed before dicing the semiconductor chip from the wafer, it may be performed after dicing the semiconductor chip from the substrate. In flip-chip mounting, it does not matter even after mounting.

Further, the semiconductor chip of the present invention may have a coating such as a resin, an inorganic film, or a metal film on a part or the whole of a back surface including a concave portion for providing mechanical reinforcement, imparting moisture resistance, or printing. It is perfectly acceptable to form
In particular, 600 nm to 5 μm, which is often used for laser measurement
If the coating has a refractive index different from that of the substrate material at an electromagnetic wave of a wavelength of, the refraction at the interface between the coating and the substrate inevitably occurs irrespective of the external environment, which hinders laser measurement, which is rather preferable. .

At this time, if the surface shape of the coating is different from that of the concave portion, the refraction between the open air and the coating film and the refraction between the coating film and the substrate concave portion when the observation light is incident are more enhanced if the coating has a different shape than the shape of the concave portion. Because of the complexity, image observation becomes more difficult, which is more preferable.

In addition, instead of the above-mentioned coating,
It is also useful to coat with a material that is opaque to electromagnetic waves in the wavelength range of 5 μm. For example, by merely depositing a metal such as tungsten, molybdenum, gold, titanium, tantalum, aluminum, or copper in a thickness of about 0.1 to 0.5 μm, the observation light from the back surface is reflected, thereby making observation more difficult. Can be.

Next, an embodiment of the present invention will be described.
However, the present invention is not limited to only these embodiments, and for example, the present invention can be applied to a chip made of a compound semiconductor such as gallium arsenide.

[0035]

【Example】

[Example 1] The plane orientation was (100) and the substrate thickness was 370 μm.
m, a silicon dioxide film having a thickness of 0.7 μm was formed by CVD on a mirror-polished rear surface of a silicon substrate having a plurality of integrated circuits formed on the surface. To protect the surface of the substrate, a commercially available cycloten resin (manufactured by Dow Chemical Japan Co., Ltd.) was spin-coated on the surface of the substrate to a thickness of 4 μm, and then baked at 220 ° C.

Thereafter, in order to form a pattern on the silicon dioxide film coating on the back surface immediately below the nonvolatile memory area of 2 mm square formed on the substrate, a 5 × 5 array was formed using a laser grinder using a KrF excimer laser. A pattern in the shape of a circle is formed (see FIG. 1B). That is, a line perpendicular to the facet (<0,1,0> in orientation) and a line parallel to the facet (<0,1,0>)
0,1>), an opening of 400 μm square
A silicon dioxide film is formed at a pitch of 0 μm. afterwards,
This substrate is immersed in a 30% KOH aqueous solution at 70 ° C.
By performing etching for 4 hours, an array-like truncated pyramid-shaped concave portion 5 was formed in the silicon substrate (FIG. 1).
(C)). After the concave portion 5 is formed, each semiconductor chip on the silicon substrate is diced.

Here, the depth of the recess 5 was 220 μm, and the surfaces of the slope and the bottom were almost smooth. Using an infrared laser scanning microscope having a wavelength of about 1.2 μm, a laser was vertically incident on the back surface to observe an image of the circuit pattern. However, a correct image could not be obtained at the slope of the concave portion 5.

In FIG. 1C, a recess 5 parallel or perpendicular to the facet is formed. This shows a state where the etching is stopped on a higher-order surface due to the effect of the opening 4. I have. By the way, if it is formed on the (111) plane, the concave portion 5 will not be parallel or perpendicular to the facet, but will be rotated by 45 °.

Here, when anisotropic etching with alkali is performed on the (100) silicon substrate, the opening of the concave portion (length is x) and the deepest portion (depth is y) 3 (a) and 3 (b), y = (1/2) .x.tan θ (1). Therefore, when the aperture of 400 μm is provided as described above, x = 400 is substituted into the equation (1),
Further, the angle between the (100) plane and the (111) plane is about 54.
Substituting θ = 54.73 because it is 73 °, y
Is about 283 (μm). Further, in the present embodiment, θ
Was 55 to 57 °, but as can be seen from the value of θ, even when etching was stopped on a higher-order surface, almost the same concave portion was formed as when the etching was stopped on the (111) surface. Will be done.

Example 2 In Example 1, a substrate on which a silicon nitride film having a thickness of 0.3 μm was formed instead of silicon dioxide was used. Then, in order to form a pattern on the silicon nitride film on the back surface of the non-volatile memory area, a positive photoresist is applied, and 400 μm square openings are formed at a pitch of 500 μm using a normal photolithography process.
5 on the resist.

Using the patterned resist as a mask, a silicon nitride film was opened by reactive ion etching (RIE) using carbon tetrafluoride gas. Example 1
By performing etching for 6 hours using the same KOH aqueous solution as in Example 1, an array-shaped concave portion having a square pyramid with a depth of 280 μm was formed on the substrate. The optical characteristics were the same as in Example 1.

Example 3 A silicon substrate having a plane orientation of (110), a substrate thickness of 400 μm, and an integrated circuit formed on the front surface, and a mirror-polished rear surface formed by CVD.
A silicon nitride film having a thickness of 0.3 μm was formed by the method. After protecting the surface circuit side by the same method as in Example 1,
A pattern having a line width of 400 μm and a length of 4 mm was formed by photolithography and RIE in the same manner as in Example 2.
1, −1, −2> and seven lines were formed in parallel at a pitch of 500 μm (FIG. 4).

Thereafter, the substrate was etched with an aqueous NaOH solution, and as a result, a groove having a rectangular cross-sectional shape having a depth of 320 μm at the center was formed. However, the corners had a complicated shape. After dicing a semiconductor chip from this substrate and cutting it, the circuit surface was opposed to a glass epoxy substrate and bonded with an epoxy resin, and when the semiconductor chip was mechanically peeled off, the groove portion was broken.

[Embodiment 4] In Embodiment 1, the pattern of the concave portion is set to 2 mm which is the same size as the area of the nonvolatile memory.
One square with a corner was used (FIG. 5). By performing etching at a temperature of 95 ° C. using a 40% aqueous KOH solution, a truncated quadrangular pyramid having a depth of 280 μm was formed in about 90 minutes. Although the surface of the bottom of this truncated pyramid was smooth, gradual and irregular undulations occurred, and although a laser microscope image could be observed through that portion, the global image was distorted. This thinned portion was also mechanically weakened, and was crushed when the semiconductor chip was bonded to the glass epoxy substrate and then peeled off in the same manner as in Example 3.

[Embodiment 5] In Embodiment 1, the shape of the opening of the silicon dioxide film was changed to include the non-volatile memory region.
A plurality of rectangles were combined and formed on the back surface of the mm-square region (FIG. 6). Etching was performed in the same manner as in Example 4 to form a concave portion of the V groove. This pattern made microscopic observation from the back side of the slope of the edge difficult, and the silicon substrate became mechanically fragile. Further, since a 0.3 μm-thick tungsten film was formed on the entire rear surface by sputtering, it became more difficult to observe the surface circuit pattern by a scanning microscope from the rear surface.

Example 6 In Example 2, the concave array was formed at the same pitch over the entire back surface of the semiconductor chip without being limited to the nonvolatile memory area (FIG. 7). As a result, the mechanical strength of the substrate decreased uniformly. Furthermore, even if the circuit was observed from the back using a laser scanning microscope, the circuit could not be observed over the entire surface of the semiconductor chip.

[Embodiment 7] In the embodiment 2, the opening of the etching mask was formed by a 300 μm square pattern of 500 μm.
A pitch grating array was used (FIG. 8). Nitric acid (concentration 60%)
Using a mixed solution of 3: 1: 1 of hydrofluoric acid (48%) and glacial acetic acid, wet etching was performed until the depth became 300 μm. As a result, a concave portion having a curved etched surface was formed (FIG. 9), and an image of a circuit pattern was observed by vertically irradiating a laser from the back surface using an infrared laser scanning microscope having a wavelength of about 1.5 μm. A correct image could not be obtained in the recess.

[0048]

As described above, according to the present invention, since at least one concave portion is formed on the back surface of the semiconductor substrate corresponding to the region excluding the edge of the semiconductor chip, sufficient strength can be obtained during dicing or bonding. It can be easily crushed if stress is applied in order to remove it improperly. Further, depending on the shape of the concave portion, observation by an optical method using laser measurement or the like can be prevented, and leakage of intellectual property information of the semiconductor chip can be easily and effectively prevented.

[Brief description of the drawings]

FIG. 1 is a perspective view showing one embodiment of the present invention.

FIG. 2 is a perspective view showing another embodiment of the present invention.

FIG. 3 is a perspective view showing a concave portion 5 formed by alkali etching on a (100) plane of a silicon substrate and its AA ′.
It is a line sectional view.

FIG. 4 is a plan view showing another embodiment (Embodiment 3) of the present invention.

FIG. 5 is a plan view showing another embodiment (Embodiment 4) of the present invention.

FIG. 6 is a plan view showing another embodiment (Embodiment 5) of the present invention.

FIG. 7 is a plan view showing another embodiment (Embodiment 6) of the present invention.

FIG. 8 is a plan view showing another embodiment (Embodiment 7) of the present invention.

FIG. 9 is a cross-sectional view showing the concave portion 5 of FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Silicon substrate, 2 ... The area | region where the nonvolatile memory was formed, 3 ... Etching mask, 4 ... Opening, 5 ... Depression.

Claims (15)

[Claims] 1. A semiconductor chip having a nonvolatile memory formed on a main surface side of a semiconductor substrate, wherein at least one recess is formed on a back surface of the semiconductor substrate, wherein the recess corresponds to the nonvolatile memory. A semiconductor chip, wherein the semiconductor chip is disposed in a region where the semiconductor chip operates. 2. The semiconductor chip according to claim 1, wherein the recess has a plurality of surfaces, and at least one surface is inclined with respect to a direction orthogonal to the semiconductor substrate. 3. The semiconductor chip according to claim 2, wherein the recess has a V-shaped vertical cross-sectional shape. 4. The semiconductor chip according to claim 2, wherein the recess has a trapezoidal vertical cross-sectional shape. 5. The semiconductor device according to claim 1, wherein the closest distance between the bottom of the concave portion and the surface of the semiconductor chip is half the thickness of the semiconductor substrate or 100 times.
A semiconductor chip, which is smaller than a smaller value of μm. 6. The material according to claim 1, wherein the surface in the concave portion has a refractive index for an electromagnetic wave having a wavelength range of 600 nm to 5 μm different from that of the material of the semiconductor substrate, or an electromagnetic wave of this wavelength range is impermeable. A semiconductor chip characterized by being coated with a material as described above. 7. The semiconductor chip according to claim 1, wherein the semiconductor substrate is a silicon substrate having a plane orientation of (100). 8. The semiconductor chip according to claim 1, wherein the semiconductor substrate is a silicon substrate having a plane orientation of (110). 9. The semiconductor chip according to claim 1, wherein the semiconductor chip is incorporated in an IC card. 10. A method of manufacturing a semiconductor chip in which a nonvolatile memory is formed on a main surface side of a semiconductor substrate, wherein the etching has at least one opening on the back surface of the semiconductor substrate corresponding to the nonvolatile memory. A method for manufacturing a semiconductor chip, comprising: forming a mask; and selectively etching a back surface of the semiconductor substrate exposed from an opening of the etching mask, thereby forming a concave portion on the back surface of the semiconductor substrate. 11. The method according to claim 10, wherein the semiconductor substrate is a silicon substrate having a plane orientation of (100), and the etching is an anisotropic etching process. 12. The semiconductor chip according to claim 11, wherein in the anisotropic etching process, the back surface of the silicon substrate exposed from the opening is selectively etched using a basic aqueous solution. Manufacturing method. 13. The method according to claim 10, wherein the semiconductor substrate is a silicon substrate having a plane orientation of (110), and the etching is an anisotropic etching process. 14. The semiconductor chip according to claim 13, wherein the anisotropic etching process selectively etches a back surface of the silicon substrate exposed from the opening using a basic aqueous solution. Manufacturing method. 15. The method according to claim 10, wherein the semiconductor chip is incorporated in an IC card.