JPH11308481A - Vertical synchronizing signal separating circuit from television signal - Google Patents

Abstract

PROBLEM TO BE SOLVED: To detect and output only a normal vertical synchronizing signal by providing a width expansion means for expanding a pulse width by the width of a vertical blanking period to the post-stage of a vertical synchronizing signal separating means. SOLUTION: A pulse width expansion circuit 300 (monostable multivibrator MMV) that expands a pulse width into a preset period is provided in the post- stage of a comparator 200 in a vertical synchronizing signal separator circuit for a television signal. Then a video signal received from an input terminal 10 of the vertical synchronizing signal separator circuit is given first to a low pass filter 100, where the video signal is low-pass-filtered. The low-pass-filtered signal in the low pass filter 100 is given to the comparator 200, where the signal is compared with a preset threshold value. An output of the comparator 200 is expanded by the vertical blanking period at pulse width expansion circuit 300. In this case, signal components that are outputted from the comparator 200 and active by a pseudo Sync pulse are deleted by the pulse width expansion means and only the regular vertical synchronizing signal component is outputted.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a vertical synchronizing / separating circuit for television signals which is suitable for use in AV equipment such as a television receiver and an optical disk reproducing apparatus.

[0002]

2. Description of the Related Art In recent years, vertical synchronizing / separating circuits for television signals have been mounted not only on television receivers but also on various video media devices such as video tape recorders (VTRs) and optical disk reproducing devices, and their characteristics are extremely high. Has been emphasized.

[0003] A conventional television signal vertical sync separation circuit will be described below with reference to FIGS. 5 and 6.

FIG. 5 is a block diagram showing a configuration of a conventional television signal vertical sync separation circuit, and FIG.
6 is a waveform diagram showing the operation of each section of the conventional television signal vertical sync separation circuit shown in FIG.

In FIG. 5, reference numeral 10 denotes an input terminal;
0 is an output terminal. In the figure, reference numeral 100 denotes a low-pass filter (LPF), and reference numeral 200 denotes a comparator (Comp) that compares the result with a threshold value and outputs the result. The video signal input from the input terminal 10 of the circuit (FIG. 6)
(A)) is first low-pass filtered by the low pass filter 100 (FIG. 6 (B)).

The low-pass filter 100 is normally set to a cutoff frequency of about several kHz in order to detect a vertical synchronization signal having a width of three horizontal synchronization periods. Low pass filter 10
The signal that has been low-pass filtered at 0 is compared with a preset threshold value in a comparator 200 (see FIG. 6C).

With the above configuration, a conventional vertical sync separation circuit is formed, and a vertical sync signal is output from the output terminal 20.

[0008]

However, such a configuration of the conventional vertical sync separation circuit is suitable for application to a normal television signal, but is not suitable for a case where a special signal is embedded in the television signal. May cause malfunction.

Hereinafter, this malfunction will be described with reference to FIG. In FIG. 2, in a normal television signal,
The voltage lower than the pedestal level should be only the vertical synchronizing signal, or very short if at all. However, the output of a recent VTR or the like is similar to a signal which is not the original horizontal synchronizing signal but is similar to the original horizontal synchronizing signal as shown in FIG. (Pseudo Sync pulse) and automatic gain adjustment of VTR etc. for the purpose of prohibiting recording on VTR etc. (Auto Gain Control; AGC)
Of about 100 IRE (AGC
Pulse).

As shown in FIG. 2 (Av), the pseudo Sync pulse and the AGC pulse are two pairs, and if there are more than four pairs in one horizontal synchronization period, about eight pairs may be included. In this case, with the configuration of the conventional vertical sync separation circuit shown in FIG. 5, the output of the low-pass filter 100 is as shown in FIG. 2B, and the output of the comparator 200 is as shown in FIG.
Thus, two vertical synchronizing signals are detected during one field period.

The present invention solves such a conventional problem. Even if a large number of pseudo Sync pulses are embedded in a vertical blanking period, a normal vertical synchronizing signal is not erroneously detected, and a normal vertical sync signal is detected. An object of the present invention is to provide a vertical sync separation circuit for a television signal which detects and outputs only a sync signal.

[0012]

In order to solve the above-mentioned problems, a vertical synchronizing separation circuit for a television signal according to the present invention is provided with a pulse width extending means for extending a pulse width for a predetermined period at a stage subsequent to a comparator 200. It is a thing. As a result, the detection of the vertical synchronizing signal in the vertical blanking period can be detected only for the signal located on the front side in time, and the pseudo sync signal during the vertical blanking period like the output from the recent VTR can be detected. Even when many Sync pulses are embedded, it is possible to detect and output only the normal vertical synchronization signal without erroneously detecting the vertical synchronization signal.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to claim 1 of the present invention is characterized in that a pulse width extending means for extending the pulse width substantially by the width of the vertical blanking period is provided at the subsequent stage of the comparator.
Even when many pseudo Sync pulses are embedded during the vertical blanking period as in the output from a recent VTR, only the normal vertical synchronization signal is detected without erroneously detecting the vertical synchronization signal. It has the effect of being able to output.

According to a second aspect of the present invention, the pulse width extending means is provided at the subsequent stage of the comparator, and the width of the pulse width is increased by a self-propelled signal generated by the phase synchronizing means from the horizontal synchronizing signal after the synchronization separation. The pulse width is counted and expanded by the horizontal synchronizing signal. Even when one field period is lengthened or shortened as in the case of special reproduction such as a VTR, the pulse width is set only during the vertical blanking period. It can be expanded, and even if a lot of pseudo Sync pulses are embedded during the vertical blanking period as in the output from a recent VTR, it is not erroneously detected as a vertical synchronization signal.
This has the effect that only the normal vertical synchronizing signal can be detected and output.

Hereinafter, an embodiment of the present invention will be described with reference to FIG.
This will be described with reference to FIGS.

(Embodiment 1) FIG. 1 is a block diagram showing a configuration of a vertical synchronization separating circuit for a television signal according to Embodiment 1 of the present invention, and FIG. It is a waveform diagram shown.

In the vertical synchronizing separation circuit for television signals according to the present invention, a pulse width extending circuit 300 (mono multivibrator, abbreviated as MMV) for extending the pulse width for a preset period is provided at the subsequent stage of the comparator 200. It is. In FIG. 1, reference numeral 10 denotes an input terminal, and reference numeral 20 denotes an output terminal. In the figure, 100 is a low-pass filter (LPF), 200 is a comparator (Comp) that compares the result with a threshold value and outputs the result, and 300 is a pulse width expansion circuit (MMV). It is. The video signal (FIG. 2A) input from the input terminal 10 of the circuit is first low-pass filtered by the low-pass filter 100 (FIG. 2B). Low pass filter 1
The signal that has been low-pass filtered at 00 is compared with a preset threshold value in a comparator 200 (FIG. 2C). Comparator 20
The output of 0 is expanded by the pulse width expansion circuit 300 for the vertical blanking period. At this time, the portion that has responded with the pseudo Sync pulse (FIG. 2 (Av)) output from the comparator 200 is erased by the pulse width extending means, and as shown in FIG.
As shown in (D), only the normal vertical synchronization portion is output.

With the above configuration, the vertical sync separation circuit of the present invention is formed, and even when a large number of pseudo Sync pulses are buried during the vertical blanking period as in the output from a recent VTR, the vertical sync separation circuit is used. Only a normal vertical synchronizing signal can be detected and output without being erroneously detected as a signal.

(Embodiment 2) FIG. 3 is a block diagram showing a configuration of a vertical synchronization separating circuit for a television signal according to another embodiment 2 of the present invention, and FIG. FIG. 6 is a waveform chart showing the operation of FIG.

In the vertical synchronization separating circuit for television signals according to the present invention, a pulse width extending circuit 300 for extending the pulse width for a preset period is provided at the subsequent stage of the comparator 200. In addition to the vertical synchronization separation signal path, the apparatus has a horizontal synchronization separation signal path and generates a free-running horizontal synchronization signal that almost matches the rate of the horizontal synchronization signal of the input television signal. The vertical blanking period is counted at the signal rate, and the width of the pulse width expansion circuit 300 to be expanded is determined.

In FIG. 3, reference numeral 10 denotes an input terminal;
0 is an output terminal. In the figure, 100 is a low-pass filter (LPF), 200 is a comparator (Comp) that compares the result with a threshold value and outputs the result, and 30
0 is a pulse width expansion circuit. In FIG.
0 is a horizontal sync separation circuit, 600 is a phase comparator, 700 is a low-pass filter, 800 is a voltage controlled oscillator (VCO), 90
0 is a frequency divider, 301 is a falling edge detector, 302
Is a counter for counting the pulses of the horizontal synchronizing signal, and 303 is an AND gate.

The operation of the thus constructed embodiment will be described. In FIG. 3, a video signal input from an input terminal 10 of a circuit is firstly supplied to a low-pass filter 10.
At 0, low-pass filtering is performed. The signal that has been low-pass filtered by low-pass filter 100 is compared by comparator 200 with a preset threshold value. The output of the comparator 200 is a pulse width expansion circuit 30.
At 0, it is extended by the vertical blanking period.

On the other hand, the input television signal is also input to the horizontal sync separation circuit 500, where the horizontal sync signal is separated. The phase comparator 600, the low-pass filter 700, the voltage-controlled oscillator 800, and the frequency divider 900 are circuit blocks constituting a so-called phase-locked loop (PLL), and are free-running at the rate of the horizontal synchronization signal of the input television signal. Are obtained from the frequency divider 900. The use of the self-propelled horizontal synchronization signal using the PLL without directly using the horizontal synchronization signal separated from the input television signal as described above may cause false detection as a horizontal synchronization signal when there is a pseudo Sync. This is to prevent the horizontal synchronization counting counter 302 from malfunctioning at this time. By using the PLL, it is possible to generate a horizontal synchronizing signal having a rate substantially coincident with the input television signal even if pseudo sync is included.

Next, the falling edge detector 301 detects the falling edge of the signal detected by the comparator 200. Further, the horizontal synchronization counter 302 is provided with a frequency divider 9
Counting is performed with a horizontal synchronizing signal having a rate substantially matching the input television signal obtained from 00. AND gate 3
In 03, the gate is opened by the width of the horizontal synchronization signal counted by the horizontal synchronization counter 302, and the pulse width is extended.

FIG. 4 shows the operation of each section shown in FIG. In FIG. 4, V is a normal field rate.
The rate of vertical synchronization of a normal reproduction signal such as TR is shown in FIG.
As shown in (A1), the frequency is fixed at approximately 60 Hz (in the case of the NTSC system). However, in the case of special reproduction, etc., FIG.
As shown in (A2), the field rate becomes longer, and only the time interval may become longer while the number of horizontal synchronizations remains unchanged. At this time, if the width of the pulse width extending unit 300 is fixed, two vertical synchronizing signals may be detected as shown in FIG. 4 (D1). By counting the pulse width that expands at the rate of the horizontal synchronizing signal that substantially matches the input television signal, the portion that has responded with the pseudo Sync pulse (FIG. 4A2) is erased by the pulse width expansion unit. As shown in FIG. 4 (D2), when the normal vertical synchronization signal is 1
Are output.

As a result, in the case of the NTSC system, about 17
The horizontal synchronization period is extended by about 22 horizontal synchronization periods in the case of the PAL system.

With the above configuration, the vertical sync separation circuit of the present invention is formed, and many pseudo Sync pulses are embedded during the vertical blanking period as in the output from a recent VTR, and special reproduction is performed. Even when the rate of the vertical synchronizing signal becomes longer as in the case, only the normal vertical synchronizing signal can be detected and output without erroneously detecting the pseudo Sync pulse as the vertical synchronizing signal.

[0028]

As described above, according to the present invention, the pulse width extending means for extending the pulse width substantially by the width of the vertical blanking period is provided at the subsequent stage of the conventional vertical synchronizing separation means. Even when a lot of pseudo Sync pulses are embedded during the vertical blanking period as in the output from the VTR, only the normal vertical synchronization signal is detected and output without erroneously detecting the vertical synchronization signal. This has the advantageous effect of being able to do so.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a vertical sync separation circuit according to a first embodiment of the present invention;

FIG. 2 is a waveform chart showing the operation of each part of the vertical sync separation circuit according to the first embodiment of the present invention;

FIG. 3 is a block diagram showing a configuration of a vertical sync separation circuit according to a second embodiment of the present invention;

FIG. 4 is a waveform chart showing the operation of each part of the vertical sync separation circuit according to the second embodiment of the present invention;

FIG. 5 is a block diagram showing a configuration of a conventional vertical sync separation circuit.

FIG. 6 is a waveform chart showing the operation of each section of a conventional vertical sync separation circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Input terminal 20 Output terminal 100 Low-pass filter (LPF) 200 Comparator (Comp) 300 Pulse width expansion circuit (MMV) 301 Falling edge detector 302 Horizontal synchronization count counter 303 AND gate 500 Horizontal synchronization separation circuit 600 Phase Comparator (PD) 700 Low-pass filter (LPF) 800 Voltage-controlled oscillator (VCO) 900 Divider

Claims (3)

[Claims] 1. A low-pass filtering means for receiving a television signal including a synchronization signal as an input and low-pass filtering the television signal, and comparing an output of the low-pass filtering means with a preset threshold value. A vertical synchronizing separation circuit configured by the comparing means, comprising a pulse width expanding means for expanding the pulse output obtained from the comparing means by a predetermined constant width, and the pulse width of the pulse width expanding means is increased. A vertical synchronizing separation circuit for television signals, wherein the vertical synchronizing separation circuit is configured to be substantially equal to or longer than a vertical blanking period. 2. The width of the pulse width expanding means for increasing the pulse width is generated by the phase synchronizing means from the horizontal synchronizing signal after the synchronization separation, and is counted by the self-propelled horizontal synchronizing signal almost coincident with the input television signal. 2. The vertical synchronizing / separating circuit for television signals according to claim 1, wherein the vertical synchronizing / separating circuit is configured to extend for a period substantially equal to or larger than the blanking period. 3. The width of increasing the pulse width of the pulse width extending means is generated by the phase synchronizing means from the horizontal synchronizing signal after synchronizing separation, and is counted by a self-propelled horizontal synchronizing signal almost coincident with the input television signal. About 17 for NTSC system
3. The vertical synchronizing separation circuit for television signals according to claim 2, wherein the horizontal synchronizing period is extended by about 22 horizontal synchronizing periods in the case of the PAL system.