JPH11307776A - Manufacture for thin film transistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce a leakage current of thin film transistors and contrive high performance by a method wherein, by use of an aluminum oxide layer formed in a sidewall of a gate electrode and the gate electrode as a mask, a second impurity introduction into a semiconductor film is carried out. SOLUTION: A gate insulation film 5 is accumulated and a gate electrode is accumulated thereon to be patterned so as to remain on a channel region of insular poly-Si3. P is injected from above this gate electrode by an ion doping method, and a channel region 2 having a few impurities is formed under the gate electrode, and also the poly-Si3 other than this is formed so as to remain as a source and drain region 4. Thereafter, the entire face is covered and A 120 is accumulated. Thereafter, in order to make only thin film transistors as a LDD structure, under the condition where an unrequired TFT is covered with a mask 23 of resist, phosphorus, etc., is doped on the entire face. A LDD region of low impurity concentration is formed on both sides of a part which was to be formed as the channel region out of the poly Si3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a thin film transistor.

[0002]

2. Description of the Related Art In recent years, attention has been focused on an active matrix type liquid crystal display device provided with a thin film transistor (TFT) using poly-Si (polysilicon) as a switching element and a peripheral circuit. By forming a TFT array using an inexpensive amorphous material and a poly-Si film that can be formed at a low temperature using a glass substrate, reflection type, large area, high definition,
This is because there is a possibility that a high-quality and inexpensive panel display (flat television) can be realized.

[0003] When a poly-Si TFT is used for a display device, there is a problem that an off current is large and a good image cannot be obtained. In poly-SiTFT, a large leak current is generated because a current flows through a polycrystalline grain boundary or a defect in a grain. Poly- used for TFT-LCD
Since a SiTFT is used under a reverse bias of 10 V or more, a leakage current is a serious problem. This is TFT-L
This is a problem unique to poly-Si TFT for CD.

In order to reduce the leakage current due to reverse bias in a poly-Si TFT, an LDD (Light Doped DFT) has conventionally been used.
rain) structure and offset gate structure are used.
This structure is shown in FIG. An undercoat film 1 of a silicon oxide film is formed on the surface of a glass substrate 10, and a poly-
Form a Si film. In this poly-Si film, the source / drain 3, 4 of the high concentration impurity layer, the channel region 2, and the LDD region 3-1 are formed. Further, a gate electrode 6 is formed on the Si film via a gate insulating film 5 of a silicon oxide film.
Are formed. Reference numeral 7 denotes an interlayer insulating film, 8 denotes an extraction electrode, and is connected to the pixel electrode 9 of ITO.
An array substrate having a TFT formed on a glass substrate is prepared in this manner, and although not shown in the drawing, a counter substrate having a counter electrode formed at a position facing the substrate and a liquid crystal interposed between these two substrates The liquid crystal display device is composed of the layers.

In the case of a TFT having an LDD structure, a lightly doped LDD region 3-1 is formed using the gate electrode 6 as a mask.
Is formed, and then a heavy-doped source / drain region 3 is formed using a patterned mask. However, in this case, the left and right LD
Since the length of the D region 3-1 is different and the length of the LDD region (the length in the direction parallel to the carriers flowing in the channel region) cannot be less than 2 μm due to the mask alignment margin, the resistance is high. Therefore, when the mobility is increased, there is a problem that a leak current increases.

[0006]

In the conventional thin film transistor, the left and right LDD lengths are different due to a mask shift,
In addition, the LDD length cannot be reduced to 2 μm or less due to the mask alignment margin, and the resistance becomes high. As a result, the mobility decreases. Did not.

According to the present invention, the electric field in the drain portion is relaxed, the deterioration is not caused, the leakage current at the time of off is reduced, and the mobility is high. It is another object of the present invention to provide a method of manufacturing a TFT which can be formed with a high precision to a submicron length of 1 μm or less.

[0008]

According to a first aspect of the present invention, there is provided a method of manufacturing a thin film transistor, comprising: forming a semiconductor film on a substrate having an insulating surface; and forming a gate on the semiconductor film. Forming a gate electrode through an insulating film, performing a first impurity introduction into the semiconductor film using the gate electrode as a mask, and forming an aluminum oxide layer on a side wall of the gate electrode; And a step of introducing a second impurity into the semiconductor film using the aluminum oxide layer and the gate electrode as a mask.

According to a second aspect of the present invention, in the thin film forming step, the gate electrode is formed of aluminum, and then the aluminum on the side wall of the gate electrode is changed to aluminum oxide. It is characterized in that it is left on the side wall of the electrode.

According to a third aspect of the present invention, in the method of manufacturing a thin film transistor according to the first aspect, after forming an aluminum layer on the gate electrode, the aluminum layer is oxidized and the aluminum oxide layer is etched back. And leaving it on the side wall of the gate electrode.

According to a fourth aspect of the present invention, in the method of the first aspect, in the side wall forming step, the aluminum layer is oxidized by bringing the aluminum layer into contact with hot water.
Here, the aluminum to be used is not limited to pure aluminum as long as it is mainly composed of aluminum.
5% or less of Ta, Nb, Mo, W based on aluminum
An aluminum alloy to which a metal more easily oxidized than Al is added can also be used since boehmite can be similarly formed.

The substrate having an insulating surface may be a substrate having an insulating film formed on a silicon substrate, in addition to a glass substrate. Further, the present invention can be similarly applied to a semiconductor of a group IV semiconductor other than silicon or a compound semiconductor such as SiGe or SiC containing silicon. The impurities to be introduced into the semiconductor include those which have conductivity when introduced into the semiconductor, such as P and As when the semiconductor is silicon.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention is to form a TFT having a low concentration region (LDD) in a source / drain region by depositing Al, which is a metal that is easily oxidized, on a gate electrode and oxidizing the Al. For example, immerse in hot water to form α-Al2O3 ・ H20 (boehmite)
A high-concentration low-resistance layer for ohmic contact is formed by doping phosphorus or the like on the upper surface of 20 and at the same time, a low-concentration region of 1 μm or less is used for self-alignment with the gate electrode.
(Lightly Doped Drain: LDD)
The outline consists of the process of removing l2O3 and H20.

The thin film transistor according to the present invention can form a bilaterally symmetric LDD of 1 μm or less by a simple process, and thus can reduce the off-current while keeping the mobility high.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of the present invention will be described below along the embodiments with reference to the drawings. (Embodiment 1) FIGS. 2 and 3 show the manufacturing process of this embodiment.

First, SiNx (500A) / SiOx is placed on a glass substrate 1.
(1000A) Film 1 and a-Si (500A) are sequentially deposited. SiNx / SiO
x1 is an undercoat. Thereafter, a heat treatment at 500 ° C. is performed to remove hydrogen in the a-Si. Thereafter, ELA (excimer laser annealing) is performed, and a-Si is melt-recrystallized to form poly-Si. This is patterned and poly-S
Form island 3 of i. Subsequently, a gate insulating film 5 is deposited (FIG. 2A).

Further, a gate electrode MoW (2500A) 6
Is deposited and patterned so as to remain on the island-shaped poly-Si channel region. Then, from above the gate electrode, P
Is implanted by ion doping to form a channel region 2 with a small amount of impurities below the gate electrode and leave other poly-Si 3 as a source / drain region 4. Then, cover the whole surface with Al 500A2
Deposit 0. (Fig. 2 (b)).

Then, the entire substrate 10 is heated with hot water (80 ° C. or higher).
Soak in By immersing Al20 in hot water, α-Al2O3
・ Forms H20 (boehmite) 21 with 4 times thickness, 2000A
To increase. This reaction is strongly affected by dissolved ions in pure water, and the ions contained in the glass substrate are dissolved in hot water to promote the reaction, and boehmite does not occur on the Si substrate. Although pure water is used here, it can be used without being pure. In addition, as the thickness of Al increases, the thickness of boehmite also increases, but does not increase further up to about 1 μm. After this, T
In order to form only the FT into the LDD structure, phosphorus or the like is doped on the entire surface while unnecessary TFTs are covered with a resist mask 23. When P is doped at 90 kev, 2e15 / cm2, poly-
LDD regions 22 having a low impurity concentration are formed on both sides of a portion of Si 3 to be formed as a channel region.
In forming the LDD region, the thickness of the boehmite 21 is 2000A and a high-concentration low-resistance layer (impurity concentration is 1e20 / cm3) for the ohmic contact is formed. Thicker than 3, 2000 ~
Since it is 4500 A, a low concentration region (Lightly Doped Drain: LDD impurity concentration is 1e18 / cm3) can be formed by self-alignment with the gate electrode. LDD length is 0.2um. It is difficult to make the LDD length 2 μm or less by mask alignment, and the left and right lengths may be different due to mask misalignment. Is 1
Since it is as short as um or less, the off current can be reduced without a decrease in mobility (FIG. 3A).

Next, the resist mask 23 and α-A
l2O3.H20 21 is removed by dilute HF. When Al or the like is used as a mask during ion doping, peeling becomes difficult, but α
-Al2O3 ・ H20 can be easily removed by diluted HF. Next, the dopant is activated by heat. Activation may be performed by laser annealing.

Next, after forming an interlayer insulating film of SiOx5000A7, a pixel electrode 9 is formed of ITO, and a contact hole is opened in SiOx of a source / drain contact portion. Next, a signal line and a data line 8 are formed by Mo / Al / Mo.
Is formed (FIG. 3B).

FIG. 4 shows a poly-Si TFT prepared according to this embodiment.
And current characteristics of a conventional mask-matched LDD structure TFT and an LDD-free TFT. LDD-free TFTs have large off-state current. In the mask-aligned LDD structure, although the off-current is reduced, the on-current is also small, and the mobility is low. To further reduce the off-current, the LDD concentration may be reduced, but the on-current is also reduced. In the structure of the present invention, the off current is sufficiently reduced, the mobility is not reduced, and the on current is not reduced.

As described above, 1 μm is obtained by a simple process.
The following low concentration regions can be formed, and the off-current can be reduced by the LDD structure. Manufactured according to the present invention
By manufacturing poly-Si TFTs with TFT-LCD TFTs for liquid crystal display devices, driving circuits around the array, and signal processing circuits, the off-current can be reduced, and by improving the voltage holding characteristics of the pixel circuits, Thus, the image quality of the liquid crystal display device could be improved. In addition, the circuit characteristics of the peripheral circuits were improved, and the power consumption of the entire liquid crystal display device could be reduced.

(Embodiment 2) Embodiment 2 will be described with reference to FIG. In the following embodiments, the same parts as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted.

The difference between this embodiment and the first embodiment is that
This is a method of forming a mask necessary for forming the D region.
The other points are the same as those in the first embodiment, and thus will not be described again here.

First, as described with reference to FIG. 2A of the first embodiment, the gate insulating film 5 is formed. Then, Al and M
Unnecessary portions are removed by etching so that oTa is formed on the entire surface and left on the island-shaped poly-Si layer, thereby forming an Al gate electrode 11 and a MoTa mask 13. At this time, Al is over-etched with respect to the etching solution of MoTa, so that MoTa remains in a T-shape on Al. In this state, the first impurity introduction for forming source / drain regions is performed on the entire surface (FIG. 5A).

Then, the entire substrate is immersed in hot water as described with reference to FIG. The operation of the hot water at this time is the same as in the first embodiment. In this step, the side surface of Al is oxidized to form the boehmite 12 described in the first embodiment (FIG. 5B).

Thereafter, with the MoTa layer 13 removed, a second impurity introduction is carried out under the same conditions as in the first embodiment, whereby the channel region, source / drain region, L
A DD region can be formed (FIG. 5C). After the above steps, the liquid crystal display device can be completed through the step of FIG. 3B described in the first embodiment.

According to this embodiment, the same effect as that of the first embodiment can be expected. Furthermore, since the gate electrode of Al can be finally left, the resistance of the gate electrode of the liquid crystal display device and the scanning line extending from this electrode can be reduced, and the image quality of the liquid crystal display device can be improved. , A large-screen liquid crystal display device can be provided.

(Embodiment 3) The difference between Embodiment 3 and Embodiment 1 is that the steps described in Embodiment 1 with reference to FIG.
This is a method for forming an l layer.

As in the step of FIG. 2B, an Al layer 20 is formed (FIG. 6A). As in the process of FIG.
The boehmite 12 is formed. In this figure, only the TFT having the LDD structure is shown (FIG. 6B).

Next, the boehmite layer 12 is etched back so that the boehmite layer 60 remains only on the side surfaces of the gate electrode 6 (FIG. 6C). After that, the channel region, the source / drain region, and the LDD region can be formed by performing a second impurity introduction on the entire surface using the gate electrode 6 and the boehmite sidewall 60 as a mask in the same manner as in the first embodiment ( FIG. 6D).

Thereafter, a liquid crystal display device can be completed in the same manner as in the first embodiment. T formed in the above embodiment
As for the FT and the liquid crystal display device, in addition to having the same effects as those of the first embodiment, the LDD length can be reduced to 0 because a more detailed mask for forming the LDD can be formed by the etch-back process. Extremely short ones of less than 0.5 micron can be formed. Therefore, it is possible to form a TFT having a smaller leak current than the TFT of the first embodiment. In addition, a liquid crystal display device with higher image quality can be provided.

[0033]

As described above, according to the present invention, an LDD type TFT in which an LDD region is formed in a self-aligned manner with a gate electrode by a simple process can be formed with an LDD length shorter than that of a conventional TFT. Can be. Therefore, it is possible to reduce the leak current of the TFT to achieve higher performance.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a conventional TFT.

FIG. 2 is a sectional view of a TFT according to the first embodiment of the present invention.

FIG. 3 is a diagram showing a method of manufacturing a TFT according to the present invention in the order of steps.

FIG. 4 is a diagram illustrating a first embodiment of the present invention.

FIG. 5 is a diagram illustrating a second embodiment of the present invention.

FIG. 6 is a diagram illustrating a third embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Undercoat 2 ... p-Si layer 3 ... Island-shaped p-Si layer 4 ... Source / drain region 5 ... Gate insulating film 6 ... Gate electrode and address line 7 ... Interlayer insulating film 8 ... source / drain, data line 9 ... ITO pixel electrode 10 ... substrate

Claims (4)

[Claims] A step of forming a semiconductor film on a substrate having an insulating surface; a step of forming a gate electrode on the semiconductor film via a gate insulating film; and a step of using the gate electrode as a mask to form the semiconductor film. A first step of introducing impurities into the film, a side wall forming step of forming an aluminum oxide layer on the side wall of the gate electrode, and a second step of forming a second layer on the semiconductor film using the aluminum oxide layer and the gate electrode as a mask. And a step of introducing impurities. 2. The thin film forming step, wherein the gate electrode is formed of aluminum, and thereafter, aluminum on a side wall of the gate electrode is changed to aluminum oxide and left on the side wall of the gate electrode. 3. The method for manufacturing a thin film transistor according to item 1. 3. The side wall forming step is characterized in that, after an aluminum layer is formed on the gate electrode, the aluminum layer is oxidized, and the aluminum oxide layer is etched back and left on the side wall of the gate electrode. A method for manufacturing the thin film transistor according to claim 1. 4. The method according to claim 1, wherein in the side wall forming step, the aluminum layer is oxidized by contacting the aluminum layer with hot water.