JPH11298347A - Noise eliminating device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To surely eliminate multi-path noise in a car radio or the like and to reduce the capacity of a memory used for signal replacement. SOLUTION: This device is provided with a noise detection circuit 5 for detecting the multi-path noise, a delay circuit 6 for supplying a delay amount in noise detection to audio signals, the memory 7 for storing the audio signals of the output of the delay circuit 6, a weighting circuit 9 for performing weighting to the output of the memory 7, a control circuit 8 for inputting the output of the noise detection circuit 5 and controlling the write and read of the memory 7 and a signal replacement circuit 10 for replacing the output of the delay circuit 6 and the output of the weighting circuit 9 based on the output of the noise detection circuit 5.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a noise eliminator, and more particularly, to a direct wave to be received by a car radio or the like and a reflected wave with a time delay added thereto, so that the received wave has an amplitude and a phase. The present invention relates to a noise removing device for removing noise called spike-like multipath noise which is generated equivalently to receiving modulation.

[0002]

2. Description of the Related Art FIG.
FIG. 1 is a block circuit diagram showing a configuration of a conventional multipath noise elimination device described in Japanese Patent Application Laid-Open Publication No. HEI 9-205139. In the figure, 1 is an FM front end, 2 is an IF (intermediate frequency) amplifier circuit, and 3 is an FM
A detection circuit, 4 is a stereo demodulation circuit, 47 is a signal meter circuit (hereinafter, referred to as "S-meter circuit") for displaying the received electric field intensity with a meter, and the circuit constituted by these constitutes a well-known FM receiver. ing. In the conventional example, a multipath detection circuit 48 that detects the occurrence of multipath noise from a level change of a signal meter signal (hereinafter, referred to as an “S meter signal”) output from the S meter circuit 47,
Between the FM detection circuit 3 and the stereo demodulation circuit 4, when the multi-path noise is detected by the multi-path detection circuit 48, the output of the FM detection circuit 3 is cut off or reduced.
It is configured by providing an M signal control circuit 49.

The S-meter circuit 47 rectifies the 10.7 MHz intermediate frequency signal taken out of the IF amplifier circuit 2 to generate a DC S-meter signal proportional to the received electric field intensity, and converts the received electric field intensity in real time. This is a circuit for displaying a meter. Accordingly, the S-meter signal obtained by the S-meter circuit is a DC signal whose signal level changes following the received electric field strength as shown in FIG. 40. As shown by the symbol P therein, the signal level is reduced at the position.

[0004] A multipath detection circuit 48 monitors the signal level of the S meter signal, and detects the occurrence of multipath noise when a dip P is detected. Then, when receiving the detection signal from the multipath detection circuit 48, the FM signal control circuit 49 cuts off or reduces the output of the FM detection circuit 3 and suppresses the passage of multipath noise. As a method for detecting the drop P of the S meter signal in the multipath detection circuit 48, a threshold value for level detection is set in advance, and S
There is a method of detecting the occurrence of multipath noise when the meter signal falls below the threshold.

As a specific signal control method in the FM signal control circuit 49, for example, a muting circuit for reducing noises by reducing the signal level of the entire output signal of the FM detection circuit 3, an FM detection circuit A high-cut circuit or the like that improves the S / N by reducing only the high-frequency component of the output signal of No. 3 is used. FIG. 41 shows a configuration example of a muting circuit. In a normal state, the resistor 49b is short-circuited by the switching circuit 49a, and the switching circuit 49a is opened when receiving a multipath noise detection signal from the multipath detection circuit 48. Resistor 49b,
49c to form a resistance dividing circuit to reduce the signal level.

FIG. 42 shows an example of the configuration of a high-cut circuit.
b is short-circuited, and when a multipath noise detection signal from the multipath detection circuit 48 is received, the switching circuit 49
By opening a, a low-pass filter composed of a resistor 49b and a capacitor 49d is configured to cut off high-frequency components in the output signal of the FM detection circuit 3. FIG. 43 shows the FM detection circuit 3
3 shows the distribution of the output signal. Since the noise power is the area of the triangular noise of the FM, the S / N can be improved by simply cutting off the high band. At this time, the reproduced sound becomes monaural.

[0007]

The conventional multipath noise elimination apparatus can suppress the multipath noise to some extent because of the above-mentioned configuration, but completely eliminates the noise in the low frequency component. This does not mean that the noise has been removed, and may be harsh. In addition, if multipath noise is generated intermittently, switching between stereo and monaural is frequently performed, resulting in an unnatural sound. As a countermeasure for such frequent switching, a method of controlling switching to monaural fast and returning to stereo slowly has been adopted, but it is almost mono in a situation where multipath noise frequently occurs. was there.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a noise eliminator capable of reliably removing multipath noise from an audio signal after stereo demodulation and maintaining stereo reproduction. And

[0009]

In the noise elimination apparatus according to the present invention, a noise detecting means, a delay means for giving a delay amount of the noise detecting means to an audio signal, and a memory means for storing an output of the delay means are provided. Control means for controlling the writing and reading of the memory means with the output of the noise detection means as input, weighting means for weighting the output of the memory means, and noise output from the delay means and the output of the weighting means. Signal replacement means for performing replacement based on the output of the detection means, wherein the memory means performs control for accumulating a signal for a limited period and repeatedly reading out the signals during the noise period, and the weighting means performs the readout of the memory means repeatedly. The weighting is performed so as to decrease at a time.

A delay means for giving a delay amount to the audio signal in the noise detection means; a memory means for storing an output of the delay means; and a control for controlling writing and reading of the memory means by using an output of the noise detection means as an input. Means, weighting means for weighting the output of the memory means, signal generating means for generating a signal by using the output of the weighting means as an input, and detecting the noise from the output of the delay means and the output of the signal generating means. Signal replacement means for performing replacement based on the output of the means, wherein the control means controls so as to provide an interval between the repeated reading operations from the memory means, and the weighting means reduces each time the memory means is repeatedly read. Weighting is performed, and the signal generation unit connects the output signal of the weighting unit with a non-signal period interposed therebetween. It is to create a replacement signal combined.

Also, a delay means for giving an amount of delay to the audio signal in the noise detection means, a memory means for storing the output of the delay means, and a control for controlling the writing and reading of the memory means using the output of the noise detection means as an input. Means, signal expansion means for expanding the output of the memory means in the time axis direction, and signal replacement means for replacing the output of the delay means and the output of the signal expansion means based on the output of the noise detection means. The memory means performs control for accumulating signals for a limited period and repeatedly reading out the signals during the noise period, and the signal expansion means expands the signal repeatedly read from the memory means in the time axis direction.

A delay means for giving a delay amount to the audio signal in the noise detection means; a memory means for storing an output of the delay means; and a control for controlling writing and reading of the memory means by using an output of the noise detection means as an input. Means, signal expansion means for expanding the output of the memory means in the time axis direction, weighting means for weighting the output of the signal expansion means, and detecting the output of the delay means and the output of the weighting means for the noise detection. Signal replacement means for performing replacement based on an output of the means, wherein the memory means performs control for accumulating a signal for a limited period and repeatedly reading the signal during a noise period, and the signal decompression means repeatedly reads from the memory means. The signal is expanded in the time axis direction, and the weighting means outputs the signal from the signal expansion means every time the memory means is repeatedly read. It is intended for weighting to decrease for.

Also, a delay means for giving the delay amount in the noise detection means to the audio signal, a signal compression means for compressing the output of the delay means, a memory means for storing the output of the signal compression means, Control means for controlling the writing and reading of the memory means with the output as an input; signal expansion means for expanding the output of the memory means; output of the delay means and output of the signal expansion means based on the output of the noise detection means The memory means stores a compressed signal for a limited period, and performs control to repeatedly read out the expanded signal until the expanded signal fills the noise period.

The apparatus further comprises control means for controlling the writing and reading of the memory means by using the output of the delay means, the output of the noise detecting means and the output of the memory means as inputs. On the other hand, the memory means is controlled so that reading is performed for a short period of time, and a portion having a small difference between a reading start portion and a position immediately before the replacement period is searched for and read.

Control means for controlling the writing and reading of the memory means by using the output of the delay means, the output of the noise detection means, and the output of the memory means as inputs, the output of the weighting means or the output of the signal decompression means and the control Signal generating means for generating a signal in response to an output of the signal generating means, wherein the control means controls the repeated reading output from the memory means or the output of the signal decompressing means to have an overlap period, Are used to create a replacement signal by cross-fading and joining overlapping portions.

Control means for controlling the writing and reading of the memory means by using the output of the delay means, the output of the noise detection means and the output of the memory means as inputs, the output of the weighting means or the output of the signal decompression means and the control Signal generation means for generating a signal in response to the output of the means, wherein the control means controls the memory means so that the output of the signal generation means overlaps before and after the replacement period, and the signal replacement means The output of the means and the output of the signal generating means are replaced by cross-fading overlapping portions based on the output of the noise detecting means.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In a noise eliminator according to an embodiment of the present invention, audio signals are sequentially stored in a memory for a certain period of time, and when multipath noise is detected, the audio signal is adjusted to the length of the noise period. The previous past signal is repeatedly read out from the memory, and the readout signal is weighted to decrease with each readout, and the weighted signal is connected to each start and end portion to create a signal, and the multipath It works to replace the original audio signal for the period in which noise was detected.

Further, audio signals are sequentially stored in a memory for a certain period of time, and when multipath noise is detected, the immediately preceding past signal is repeatedly read out from the memory at intervals according to the length of the noise period. The read signal is weighted to decrease each time it is read, and the weighted signals are joined together with no signal periods in between to create a signal, and the original audio signal is generated for the period during which multipath noise is detected. Work to replace.

Further, audio signals are sequentially stored in a memory for a certain period of time, and when multipath noise is detected, the immediately preceding past signal is repeatedly read from the memory in accordance with the length of the noise period, and the read signal is read out. The signal is created by extending the signal in the time axis direction and connecting the start and end portions of the expanded signal, and replaces the original audio signal during a period in which multipath noise is detected.

Further, audio signals are sequentially stored in a memory for a certain period of time, and when multipath noise is detected, the immediately preceding past signal is repeatedly read from the memory in accordance with the length of the noise period, and the read signal is read out. Extends in the time axis direction, weights the decompressed signal to decrease each time it is read, creates a signal by connecting the start and end portions of the weighted signal, and generates a signal during multipath noise detection. Works to replace the original audio signal.

Also, the audio signal is sequentially compressed in the time axis direction, and the compressed signal is stored in the memory for a certain period of time. When multipath noise is detected, the previous past data is stored in the memory according to the length of the noise period. Is repeatedly read out, the read signal is expanded in the time axis direction, the expanded signal is connected to each start and end portion to create a signal, and the original audio signal is replaced with the original audio signal during a period in which multipath noise is detected. Work like that.

In addition, reading is performed for a short period in response to a write signal to the memory. At this time, it searches for a portion where a difference between the read start portion and the position immediately before the replacement period is small, finds a read start position from the memory, and performs a read from the memory.

Further, the read control of the memory is controlled so that the repeated read output from the memory or the signal after signal decompression has an overlap period, and the overlap period is cross-faded and connected to generate a replacement signal. work.

Also, the replacement signal is overlapped before and after the replacement period, and the overlapped portions are cross-faded and connected to perform the replacement of the signal during the period in which the multipath noise is detected.

Hereinafter, the present invention will be described in detail with reference to the drawings showing the embodiments. Embodiment 1 FIG. FIG. 1 is a block circuit diagram of a noise removing apparatus according to Embodiment 1 of the present invention. In the figure, 1 is an FM front end, 2 is an IF (intermediate frequency) amplifier circuit,
3 is an FM detection circuit, 4 is a stereo demodulation circuit, 5 is a noise detection circuit, 6 is a delay circuit, 7 is a memory, 8 is a control circuit, 9
Is a weighting circuit, 10 is a replacement circuit, and 6 to 10 constitute a noise removal circuit 11 for one channel of an audio signal output from the stereo demodulation circuit 4. Numeral 12 denotes a noise elimination circuit for another channel, which is composed of a noise elimination circuit 1
The description is omitted because it is exactly the same as 1.

In the first embodiment, the circuit composed of the FM front end 1 and the stereo demodulation circuit 4 has the same configuration as a well-known FM receiver, and is separated from the stereo demodulation circuit 4 into Lch and Rch. It is extracted as an audio signal and input to the noise elimination circuits 11 and 12. The noise detection circuit 5 receives the output of the IF amplification circuit 2 and, when multipath noise is present, outputs an output indicating the time position of the start and end of the multipath noise to the control circuit 8 and the replacement circuit 1.
Serve for 0. The noise detection circuit 5 includes, for example, a multi-path detection circuit 48 that detects the occurrence of multi-path noise from a change in the level of an S-meter signal output from an S-meter circuit 47 that displays the received electric field strength in a conventional meter. Circuits such as the part.

The delay circuit 6 delays the audio signal in accordance with the time delay caused by the processing in the noise detection circuit 5. The output of the delay circuit 6 is input to the memory 7 and the replacement circuit 10. The memory 7 sequentially stores audio signals, and always stores a predetermined amount of the immediately preceding signal. The control circuit 8 receives the output of the noise detection circuit 5 and controls the write / read operation of the memory 7. As a result of the noise detection, if the noise period is longer than the accumulation period of the memory 7, it is repeatedly read. The weighting circuit 9 performs weighting on the output of the memory 7 so as to decrease each time the memory 7 is repeatedly read. The replacement circuit 10 replaces the output of the delay circuit 6 and the output of the weighting circuit 9 for a period during which multipath noise is detected based on the output of the noise detection circuit 5.

FIG. 2 is a diagram for explaining the operation of the noise elimination circuits 11 and 12. FIG. 3A shows an audio signal output from the stereo demodulation circuit 4. The hatched portion indicates a multipath noise generation period. FIG. 2B shows the result of noise detection by the noise detection circuit 5, and the audio signal of FIG. 2A is delayed due to the delay due to the detection. FIG. 2C shows the output of the delay circuit 6, which has a delay corresponding to the delay of the noise detection result shown in FIG. 2B. FIG. 2D shows the read timing from the memory 7, and the read operation is repeated a sufficient number of times to fill the multipath noise period. FIG. 2E shows how the weighting circuit 9 performs weighting, in which weighting is reduced each time reading is repeated. FIG. 2 (f)
Indicates the output of the permutation circuit 10, and the output of the weighting circuit 9 (see FIG.
(E)) is replaced based on the multipath noise period of the output of the noise detection circuit 5 (FIG. 2 (b)).

The reason why the weighting circuit 9 performs weighting for the output of the memory 7 to decrease each time the weight is repeatedly read out is to reduce a beat-like sound due to repetition of a signal.

Embodiment 2 FIG. FIG. 3 is a block circuit diagram of a noise eliminator according to a second embodiment of the present invention. The same reference numerals as those in FIG. 1 denote the same or corresponding parts. In the figure, reference numeral 14 denotes a noise removal circuit for one channel of an audio signal output from the stereo demodulation circuit 4;
Memory 7, control circuit 8, weighting circuit 9, replacement circuit 10
And a signal generating circuit 13. Reference numeral 15 denotes a noise removal circuit for another channel, the configuration of which is exactly the same as that of 14; Portions common to the conventional example are denoted by the same reference numerals.

Next, the operation of a portion different from the first embodiment will be described. FIG. 4 is a diagram for explaining a mode of reading from the memory 7 by the control circuit 8, and FIGS.
(A) to (e) respectively. FIG. 4F shows the output of the signal generation circuit 13, and FIG. 4G shows the output of the replacement circuit 10. As shown in FIG. 4D, reading from the memory 7 is repeatedly performed at intervals, and weighting that decreases with each reading is performed as shown in FIG. 4E. In the signal generation circuit 13, as shown in FIG. 4F, a replacement signal is generated by connecting the non-signal periods. Since the signal generated in this way has a longer repetition period, the beat-like sound generated by the repetition of the signal is reduced.

Embodiment 3 FIG. FIG. 5 is a block circuit diagram of a noise removing apparatus according to Embodiment 3 of the present invention, and the same reference numerals as those in FIG. 1 denote the same or corresponding parts. In the figure, reference numeral 17 denotes a noise removal circuit for one channel of an audio signal output from the stereo demodulation circuit 4;
It comprises a memory 7, a control circuit 8, a replacement circuit 10, and a signal decompression circuit 16. Reference numeral 18 denotes a noise removal circuit for another channel, and the configuration is exactly the same as that of the noise removal circuit 17, and a description thereof will be omitted.

Next, the operation of the parts different from the first embodiment will be described. The signal decompression circuit 16 decompresses the repeatedly read signal from the memory 7 in the time axis direction. If the noise period is longer than the signal after expansion as a result of noise detection, it is repeatedly read. The replacement circuit 10 replaces the output of the delay circuit 6 and the output of the signal decompression circuit 16 for a period during which multipath noise is detected based on the output of the noise detection circuit 5.

FIG. 6 is a diagram for explaining the operation of the noise elimination circuits 17 and 18, and FIGS.
(A) to (f). FIG. 6D shows the memory 7
6 (e) shows the state of expansion by the signal expansion circuit 16. FIG. The memory 7 is repeatedly read out by the number of times that the multipath noise period is sufficiently satisfied by the expanded signal. FIG.
(F) shows the output of the replacement circuit 10 and the delay circuit 6
Is replaced with the output of the signal decompression circuit 16 based on the multipath noise period of the output of the noise detection circuit 5. Since the signal generated in this way has a longer repetition period, the beat-like sound generated by the repetition of the signal is reduced.

As an extension method, for example, a method as shown in FIG. 7 can be mentioned. FIG. 7A shows an example in which an interpolation signal is created by simply repeating the original signal.
(B) creates an interpolation signal by obtaining an intermediate point between two points before and after. In this example, a case where the signal is expanded by a factor of two is given, but the present invention is not limited to this.

Embodiment 4 FIG. FIG. 8 is a block circuit diagram of a noise eliminator according to a fourth embodiment of the present invention. The same reference numerals as those in FIGS. 1 and 5 denote the same or corresponding parts. In the figure, reference numeral 19 denotes a noise removal circuit for one channel of an audio signal output from the stereo demodulation circuit 4, which comprises a delay circuit 6, a memory 7, a control circuit 8, a weighting circuit 9, a replacement circuit 10, and a signal decompression circuit 16. . 2
Numeral 0 denotes a noise removal circuit for another channel, and the configuration is exactly the same as that of the noise removal circuit 19, and a description thereof will be omitted.

Next, the operation of the parts different from the first embodiment will be described. The signal decompression circuit 16 decompresses the repeatedly read signal from the memory 7 in the time axis direction. If the noise period is longer than the signal after expansion as a result of noise detection, it is repeatedly read. The weighting circuit 9 performs weighting on the output of the signal decompression circuit 16 so as to decrease with each repetition of reading from the memory 7. The replacement circuit 10 replaces the output of the delay circuit 6 and the output of the signal decompression circuit 16 for a period during which the multipath noise is detected by the noise detection circuit 5.

FIG. 9 is a diagram for explaining the operation of the noise elimination circuits 19 and 20, and FIGS.
(A) to (f) respectively. FIG. 9D shows the reading from the memory 7, and FIG. 9E shows the state of the expansion by the signal expansion circuit 16 and the weighting by the weighting circuit 9. The memory 7 is repeatedly read out by the number of times that the multipath noise period is sufficiently satisfied by the expanded signal. FIG. 9F shows the output of the replacement circuit 10, in which the output of the weighting circuit 9 is replaced with the output of the delay circuit 6 based on the multipath noise period of the output of the noise detection circuit 5. . The signal created in this way extends the repetition period and decreases the signal level at each repetition, thereby reducing the beat-like sound generated by the repetition of the signal.

Embodiment 5 FIG. 10 is a block circuit diagram of a noise eliminator according to a fifth embodiment of the present invention. The same reference numerals as those in FIG. 5 denote the same or corresponding parts.
In the figure, reference numeral 22 denotes a noise elimination circuit for one channel of an audio signal output from the stereo demodulation circuit 4 and includes a delay circuit 6, a memory 7, a control circuit 8, a replacement circuit 10, a signal decompression circuit 16, and a signal compression circuit 21. ing. 23
Is a noise elimination circuit of another channel, and its configuration is completely the same as that of the noise elimination circuit 22, and therefore the description is omitted.

Next, the operation of the parts different from the first embodiment will be described. The signal compression circuit 21 compresses the audio signal output of the delay circuit 6 in the time axis direction. Audio signals compressed in the time axis direction are sequentially stored in the memory 7,
The immediately preceding signal is always stored in a compressed form. The signal decompression circuit 16 decompresses the repetitively read signal from the memory 7 in the time axis direction to return to the time length before compression. If the noise period is longer than the signal after expansion as a result of noise detection, it is repeatedly read. The replacement circuit 10 replaces the output of the delay circuit 6 and the output of the signal decompression circuit 16 for a period during which the multipath noise is detected by the noise detection circuit 5.

FIG. 11 is a diagram for explaining the operation of the noise elimination circuits 22 and 23. FIGS.
(A) to (c) respectively. FIG. 11D
Indicates a portion in which the signal of the memory period is compressed in the time axis direction by the signal compression circuit 21 and is stored in the memory 7 in a compressed state. FIG. 11E shows reading from the memory 7, and FIG.
Shows the state of elongation due to. The memory 7 is repeatedly read out by the number of times that the multipath noise period is sufficiently satisfied by the expanded signal. FIG. 11 (g) shows the output of the replacement circuit 10. The output of the signal expansion circuit 10 is replaced with the output of the delay circuit 6 based on the multipath noise period of the output of the noise detection circuit 5. I have. The signal thus created can fill a longer period with the immediately preceding signal. In addition, since the period can be extended even in the case of repetition, the beat-like sound generated by the repetition of the signal is reduced.

FIG. 12 is a diagram illustrating the operation of the signal compression circuit 21 and the signal decompression circuit 16. FIG. 12A shows an original signal before compression, and FIG.
FIG. 12C shows the signal after compression, which is stored in the memory 7 at this stage. After reading from the memory 7, decompression is performed. FIG. 12D shows a signal after expansion by the same interpolation as in FIG. FIG. 12D shows an example in which the signal is compressed to 1/2 by thinning out, and is expanded twice by interpolation and returned to the original state.

Embodiment 6 FIG. 13, 15, 17,
FIGS. 19 and 21 are block circuit diagrams of a noise elimination device according to the sixth embodiment of the present invention.
1, FIG. 3, FIG. 5, FIG. 8, and FIG. 10 in which the control circuit 8 is replaced with a control circuit 24, and the configuration of the other parts is the same. 34.

The control circuit 24 in each figure of the sixth embodiment controls the write / read operation of the memory 7 in response to the output of the noise detection circuit 5, the output of the delay circuit 6, and the output of the memory 7. When multipath noise is detected as the output of the noise detection circuit 5, the control circuit 24 compares the output of the delay circuit 6 with the output of the memory 7 to determine an appropriate read position. 14 shows the noise elimination circuits 25 and 26, FIG. 16 shows the noise elimination circuits 27 and 28, and FIG.
9 and FIG. 20 show the noise removal circuits 31 and 32 in FIG.
2 is a diagram for explaining the operation of the noise elimination circuits 33 and 34, respectively, and corresponds to FIGS. 2, 4, 6, 9, and 11, respectively, in order, and FIG. As shown in (1), the read period is set shorter than the write period to the memory 7, and the read start position is discontinuous at the boundary between the memory period (f) or (g) and the replacement period in each of the above figures. Decide to make it smaller.

FIG. 23 is a diagram for explaining the read operation from the memory 7. FIGS. 23 (a) to 23 (c) show the case of the first to fifth embodiments, and are discontinuous at the boundary between the memory period and the replacement period. Shows the case where is large. FIG. 23B shows a memory period, in which a signal written in a certain amount in the memory is read as it is without considering any connection at the boundary. As shown in FIG. 23C, there may be a case where a connection having a large discontinuity occurs at the boundary.

On the other hand, FIGS. 23 (d) to 23 (f) show the case of the sixth embodiment, in which a period shorter than the memory period is read out at a portion having a small discontinuity immediately before the replacement period. As a result, as shown in FIG. 23 (f), the discontinuity at the boundary is reduced. In order to determine the reading position from the memory 7, there is a method of obtaining, from the memory, a portion where the signal level is close to the gradient of the portion indicated by A in FIG.

Embodiment 7 FIG. 24, 26, 28,
FIGS. 30 and 32 are block circuit diagrams of a noise eliminator according to a seventh embodiment of the present invention.
13, 15, 17, 19, and 21 showing the configuration of FIG. 13 is replaced with a control circuit 35, and a signal creation circuit 36 is inserted in FIGS. 13, 17, 19, and 21. 15 is replaced with the signal generation circuit 13, and the other parts have the same configuration, and constitute noise removal circuits 37 to 46.

The control circuit 35 in each of the drawings except for FIG. 26 according to the seventh embodiment outputs the output of the delay circuit 6 and the output of the memory 7 when multipath noise is detected as the output of the noise detection circuit 5. Determine a suitable readout position by comparison,
The memory 7 is controlled so that the repeatedly read output from the memory 7 or the output of the signal decompression circuit 16 has an overlap period. The signal generation circuit 36 is provided by the memory 7 by the control circuit 35.
Under the control linked to the reading, the overlap period is cross-faded and the signals are connected and output.

FIG. 25 is a circuit diagram of the noise removing circuits 37 and 38 shown in FIG.
9 illustrates the operation of the noise elimination circuits 41 and 42, FIG. 31 illustrates the operation of the noise elimination circuits 43 and 44, and FIG. 33 illustrates the operation of the noise elimination circuits 45 and 46, respectively. , FIG. 20 and FIG. 22, and FIG.
The readout signal from the memory 7 shown in the part (d) and the expanded signal shown in the parts (e), (e) and (f) of FIG. I have it. Also, as shown in FIGS. 25 (f), 29 (f), 31 (f) and 33 (g), the signal after weighting and decompression is cross-fed by the signal generation circuit 36 at the overlapping portion. And tied together.

The operation of the noise elimination circuits 39 and 40 in FIG. 26 is slightly different, and the readout signal from the memory 7 is repeated with a non-signal period interposed therebetween. Are overlapped, and this period is cross-faded and connected. FIG.
Is a diagram for explaining the operation of the noise elimination circuits 39 and 40, and corresponds to FIG. As shown in FIG. 27D, there is an overlap between the read signal from the memory 7 and the non-signal period, and cross-fading is performed at the overlap as shown in FIG. 27F.

Embodiment 8 FIG. The block circuit diagram of the noise eliminator according to the eighth embodiment of the present invention is the same as that of the seventh embodiment shown in FIGS. 24, 26, 28, 30, and 32, and will not be described.

In the eighth embodiment, when multipath noise is detected as the output of the noise detection circuit 5, the control circuit 35 in each of the above drawings compares the output of the delay circuit 6 with the output of the memory 7. A suitable read position is determined, and a repeated read output from the memory 7 or the signal decompression circuit 16
The memory 7 is controlled such that the output of the delay circuit 6 has an overlap period and the output of the delay circuit 6 has an overlap period with a boundary portion outside the multipath noise period. The replacement circuit 10 cross-fades the overlap period of the boundary portion outside the multipath noise period and connects and outputs the signals.

FIGS. 34 to 38 are diagrams for explaining this operation. FIGS. 34 (d) and 35 (d), and FIGS.
As shown by symbols A and B in FIG. 7 (e) and FIG. 38 (f), an overlapping period is provided at a boundary portion outside the multipath noise period, and this portion is cross-faded to perform the crossfading.
(F)-(f) and FIG. 38 (g) are replaced with the multipath noise period of the output of the delay circuit 6 shown in FIG. 37 (g)
And a noise removal signal shown in FIG.

[0054]

Since the present invention is configured as described above, it has the following effects.

By completely replacing the multipath noise period of the audio signal, the noise can be completely removed. In addition, the capacity of the memory used for replacement can be reduced, and the weighting that decreases with each repetition of reading is performed. Can be reduced.

Further, the noise can be completely removed by completely replacing the multipath noise period of the audio signal. In addition, the capacity of the memory used for replacement can be reduced, and the read signal is repeated by sandwiching the non-signal area, thereby increasing the repetition period, thereby repeatedly using the signal from the small-capacity memory. The adverse effects such as generation of beat sound can be reduced.

Further, by completely replacing the multipath noise period of the audio signal, the noise can be completely removed. In addition, the capacity of the memory used for replacement can be reduced, and by extending the read signal in the time axis direction, adverse effects such as the generation of beat sounds due to repeated use of signals from the small-capacity memory can be reduced. it can.

Further, by completely replacing the multipath noise period of the audio signal, the noise can be completely removed. In addition, the capacity of the memory used for replacement can be reduced, and the signal from the small-capacity memory can be used repeatedly by extending the read signal in the time axis direction and performing weighting to reduce the read signal each time it is repeatedly read. This can reduce adverse effects such as generation of a beat sound.

Further, the noise can be completely removed by completely replacing the multipath noise period of the audio signal. Also, since the signal is compressed in the time axis direction, stored in the memory, and expanded after reading, the capacity of the memory used for replacement can be reduced, and the signal for a relatively long period after expansion can be used for replacement. In addition, it is possible to reduce adverse effects such as generation of a beat sound due to repeated use of a signal from a small-capacity memory.

Further, reading is performed for a short period in response to a write signal to the memory, and a portion where a difference between a start portion of the read and a portion immediately before the replacement period is small is determined to determine a read start position from the memory. Since the data is read from the data, it is possible to reduce problems caused by discontinuity at the boundary of signal replacement.

Further, the read control of the memory is performed so that the repeated read output from the memory or the signal after the signal expansion has an overlap period, and the replacement period is created by cross-fading and overlapping the overlap periods. The connection of the repetitive signals in the replacement signal can be made smooth, and the trouble caused by discontinuity at the boundary between the repetitive signals can be reduced.

Further, the replacement signal is overlapped before and after the replacement period, and the overlapped portions are cross-faded and connected to perform the replacement of the signal during the period in which the multipath noise is detected. Problems caused by discontinuity at the boundary can be reduced.

[Brief description of the drawings]

FIG. 1 is a block circuit diagram of a noise elimination device according to a first embodiment of the present invention.

FIG. 2 is an explanatory diagram of an operation of the noise elimination circuit according to the first embodiment;

FIG. 3 is a block circuit diagram of a noise removing device according to a second embodiment of the present invention.

FIG. 4 is an explanatory diagram of an operation of the noise elimination circuit according to the second embodiment;

FIG. 5 is a block circuit diagram of a noise removing device according to a third embodiment of the present invention.

FIG. 6 is a diagram illustrating the operation of the noise elimination circuit according to the third embodiment;

FIG. 7 is an explanatory diagram of an operation of the signal decompression circuit according to the third embodiment.

FIG. 8 is a block circuit diagram of a noise removing device according to a fourth embodiment of the present invention.

FIG. 9 is an explanatory diagram of an operation of the noise removal circuit according to the fourth embodiment.

FIG. 10 is a block circuit diagram of a noise removing apparatus according to a fifth embodiment of the present invention.

FIG. 11 is an explanatory diagram of the operation of the noise removal circuit according to the fifth embodiment.

FIG. 12 is an operation explanatory diagram of a signal compression circuit and a signal decompression circuit of the fifth embodiment.

FIG. 13 is a block circuit diagram of a noise elimination device according to a sixth embodiment of the present invention.

FIG. 14 is a diagram illustrating the operation of the first noise elimination circuit according to the sixth embodiment.

FIG. 15 is a second block circuit diagram according to a sixth embodiment of the present invention.

FIG. 16 is an operation explanatory diagram of the second noise elimination circuit according to the sixth embodiment.

FIG. 17 is a third block circuit diagram according to a sixth embodiment of the present invention.

FIG. 18 is an operation explanatory diagram of the third noise elimination circuit according to the sixth embodiment.

FIG. 19 is a fourth block circuit diagram according to a sixth embodiment of the present invention.

FIG. 20 is an operation explanatory diagram of the fourth noise elimination circuit according to the sixth embodiment.

FIG. 21 is a fifth block circuit diagram according to a sixth embodiment of the present invention.

FIG. 22 is an explanatory diagram of the operation of the fifth noise removing circuit according to the sixth embodiment.

FIG. 23 is an explanatory diagram of an operation of reading data from a memory according to the sixth embodiment.

FIG. 24 is a first block circuit diagram of a noise removing apparatus according to a seventh embodiment of the present invention.

FIG. 25 is an operation explanatory diagram of the first noise elimination circuit according to the seventh embodiment.

FIG. 26 is a second block circuit diagram of the noise removing apparatus according to the seventh embodiment of the present invention.

FIG. 27 is an explanatory diagram of the operation of the second noise removing circuit according to the seventh embodiment.

FIG. 28 is a third block circuit diagram of the noise elimination device showing the seventh embodiment of the present invention.

FIG. 29 is an explanatory diagram of the operation of the third noise removal circuit according to the seventh embodiment.

FIG. 30 is a fourth block circuit diagram of the noise removing apparatus according to the seventh embodiment of the present invention.

FIG. 31 is an operation explanatory diagram of the fourth noise elimination circuit according to the seventh embodiment.

FIG. 32 is a fifth block circuit diagram of the noise removing device according to the seventh embodiment of the present invention.

FIG. 33 is an explanatory diagram illustrating the operation of the fifth noise elimination circuit according to the seventh embodiment.

FIG. 34 is an operation explanatory diagram of the first noise elimination circuit according to the eighth embodiment of the present invention;

FIG. 35 is an explanatory diagram of the operation of the second noise removing circuit according to the eighth embodiment.

FIG. 36 is an operation explanatory diagram of the third noise elimination circuit according to the eighth embodiment.

FIG. 37 is an operation explanatory diagram of the fourth noise elimination circuit according to the eighth embodiment.

FIG. 38 is an explanatory diagram of the operation of the fifth noise elimination circuit according to the eighth embodiment.

FIG. 39 is a block circuit diagram showing a conventional multipath noise removing device.

FIG. 40 is a waveform diagram of a signal meter signal of a conventional example.

FIG. 41 is a configuration diagram of a conventional muting circuit.

FIG. 42 is a configuration diagram of a conventional high cut circuit.

FIG. 43 is an FM demodulated signal diagram of a conventional example.

[Explanation of symbols]

1 FM front end, 2 IF amplifier circuit, 3 FM
Detection circuit, 4 stereo demodulation circuit, 5 noise detection circuit,
6 delay circuit, 7 memory, 8, 24, 35 control circuit,
9 weighting circuit, 10 replacement circuit, 11, 12, 1
4,15,17-20,22,23,25-34,37
46 noise removal circuit, 13, 36 signal creation circuit, 16
Signal expansion circuit, 21 signal compression circuit.

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Masayuki Ishida 2-3-2 Marunouchi, Chiyoda-ku, Tokyo Mitsubishi Electric Corporation

Claims (8)

[Claims] 1. A noise eliminator comprising noise detection means for removing noise mixed into an audio signal using the detection result, the delay means for giving the amount of delay in the noise detection means to the audio signal; Memory means for storing the output of the means; control means for controlling the writing and reading of the memory means with the output of the noise detecting means as input; weighting means for weighting the output of the memory means; Signal replacement means for replacing the output and the output of the weighting means based on the output of the noise detection means. The memory means stores signals for a limited period and performs control to repeatedly read out the signals during the noise period. The noise removing device is characterized in that the weighting means reduces the weight each time the memory means is repeatedly read. Place. 2. A noise eliminator comprising noise detecting means for removing noise mixed into an audio signal by using the detection result, the delay means for giving the delay amount of the noise detecting means to the audio signal; Memory means for storing the output of the means, control means for controlling the writing and reading of the memory means by using the output of the noise detection means as input, weighting means for weighting the output of the memory means, Signal generating means for generating a signal by using an output as an input; and signal replacing means for replacing an output of the delay means and an output of the signal generating means based on an output of the noise detecting means. Control is performed so that an interval is set between the repeated reading operations, and the weighting means repeatedly reads the memory means. Performs weighting to reduce the out of time, the noise removal device being characterized in that the said signal producing means and configured to create a replacement signal a signal output by connecting across the no-signal period weighted means. 3. A noise elimination device comprising noise detection means for removing noise mixed into an audio signal using the detection result, wherein: a delay means for giving a delay amount in the noise detection means to the audio signal; Memory means for storing the output of the means; control means for controlling writing and reading of the memory means with the output of the noise detecting means as input; signal extending means for extending the output of the memory means in the time axis direction; Signal replacement means for replacing the output of the means and the output of the signal decompression means based on the output of the noise detection means. The memory means stores a signal for a limited period and controls to repeatedly read the signal during the noise period. Wherein said signal decompression means is configured to decompress the repetitive read signal from the memory means in the time axis direction. Removal device. 4. A noise elimination device having noise detection means for removing noise mixed into an audio signal by using the detection result, wherein: a delay means for giving a delay amount in the noise detection means to the audio signal; Memory means for storing the output of the means; control means for controlling writing and reading of the memory means with the output of the noise detection means as input; signal extending means for extending the output of the memory means in the time axis direction; Weighting means for weighting the output of the decompression means; and signal replacement means for replacing the output of the delay means and the output of the weighting means based on the output of the noise detection means. The signal for the period is accumulated and the signal is repeatedly read out during the noise period. The out signal extended in the time axis direction, noise elimination device being characterized in that a configuration for weighting to reduce the output of the signal expanding means whenever the repetition reading the memory means by the weighting means. 5. A noise eliminator comprising noise detecting means for removing noise mixed into an audio signal by using a result of the detection, wherein the delay means for giving a delay amount in the noise detecting means to the audio signal; Signal compression means for compressing the output of the means; memory means for storing the output of the signal compression means; control means for controlling the writing and reading of the memory means by using the output of the noise detection means as an input; output of the memory means And a signal replacement means for replacing the output of the delay means and the output of the signal expansion means on the basis of the output of the noise detection means. A noise removing device for storing accumulated signals and performing control to repeatedly read out the signals until the expanded signal fills a noise period. 6. A control means for controlling writing and reading of said memory means by using an output of said delay means, an output of said noise detecting means and an output of said memory means as inputs. 6. The memory device according to claim 1, wherein said memory means is controlled so as to perform reading for a short period of time and to search for and read a portion having a small difference between a reading start portion and a position immediately before a replacement period. The noise eliminator according to any one of the above. 7. Control means for controlling the writing and reading of said memory means by using the output of the delay means, the output of the noise detection means and the output of the memory means as inputs, and the output of the weighting means or the output of the signal decompression means and the control. Signal generating means for generating a signal in response to the output of the signal generating means, wherein the control means controls the repeated reading output from the memory means or the output of the signal decompressing means to have an overlap period, and the signal generating means 7. The noise elimination apparatus according to claim 1, wherein a replacement signal is created by cross-fading and connecting overlapping portions. 8. Control means for controlling the writing and reading of said memory means by using the output of the delay means, the output of the noise detection means and the output of the memory means as inputs, and the output of the weighting means or the output of the signal decompression means and the control. Signal generating means for generating a signal in response to the output of the means, wherein the control means controls the memory means so that the output of the signal generating means overlaps before and after the replacement period, and the signal replacing means delays the signal. The noise according to any one of claims 1 to 7, wherein the output of the means and the output of the signal generating means are replaced by cross-fading the overlapping portion based on the output of the noise detecting means. Removal device.