JPH11296412A - Device and method for bus trace and recording medium recorded with program of the method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent trace information on its own request performance from being overwritten by the trace information of another input/output device followed by a reply performance which is not executed to a request performance. SOLUTION: A tracer circuit 12 stores trace information on a request performance and a reply performance on a common bus 4 in a trace memory 13. A request detection circuit 15 monitors whether the amount of information of the trace information on the request performance and the reply performance issued to the common bus 4 after the trace information on the request performance a self agent 1 issues reaches storable limited amount in the memory 13 or not; when it does, the contents of the memory 13 are restored in a save memory 14 as they are.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bus tracing device, a bus tracing method, and a recording medium on which a program for the method is recorded, and more particularly to a split type sharing method for once releasing the right to use a bus between a request operation and a reply operation. The present invention relates to a bus tracing device and a bus tracing method for a bus, and a recording medium on which a program for the method is recorded.

[0002]

2. Description of the Related Art Conventionally, in an input / output device having a shared bus (generally referred to as a system bus in many cases),
Request (request) operation and reply (reply) of data transfer on the shared bus mainly for the purpose of failure analysis
In many cases, a circuit for tracing the operation is provided.

FIG. 5 is a configuration diagram of a conventional bus trace device. The figure shows three input / output devices 21 via a common bus 4.
To 23 are connected.

[0004] As an example, the input / output devices 21 and 22 have a request agent (request) for issuing a request.
The input / output device 23 is assumed to be a reply agent.

The input / output device 21 includes a data path 11 connected to the shared bus 4, a tracer circuit 12, and a trace memory 13 connected to the tracer circuit 12. Note that the input / output devices 22 and 23 have the same configuration, and a description thereof will be omitted.

Now, when a read request is issued to the shared bus 4 via the data path 11 of the input / output device 21,
The tracer circuit 12 stores the trace information of the read request operation in the trace memory 13.

[0007] Also, trace information of request information and reply information issued to the shared bus 4 from other request agents 22 and reply agents 23 are similarly stored in the trace memory 13 via the tracer circuit 12.

When the number of trace information stored in the trace memory 13 becomes full (memory full state), the subsequent trace information is overwritten in order from the oldest trace information already stored in the trace memory 13. Will be.

[0009]

As described above, when the shared bus 4 is of a split type, if a request operation is performed by a certain request agent and then no reply operation is performed, the trace of the request operation is traced. The information is filled in by the trace of the request operation and reply operation between other agents performed later, and when the request operation is not finally replied and a timeout error occurs, the request operation in question is normal I don't know if it was anything.

That is, the conventional bus trace circuit has a drawback that it is not useful for analyzing a failure that causes a timeout error.

FIG. 6 is a timing chart showing an example of a request and reply issuance timing.

That is, referring to FIG. 1, request 2, request 3, request 4, reply 2 and the like are performed endlessly before request 1 is issued by a certain agent on the shared bus 4. As a result of these traces, the trace memory capacity is limited and eventually overwrites the trace information of request 1.

On the other hand, Japanese Patent Laid-Open Publication No. Hei 5-257831 discloses a technique for recording trace information of a common bus for each input / output device connected to the common bus in order to solve this drawback.

However, this technique has a disadvantage that the order of the request operation and the reply operation actually performed on the common bus becomes unclear.

Accordingly, an object of the present invention is to prevent a reply operation for a request operation from being executed, thereby preventing trace information of the own request operation from being overwritten by trace information of another input / output device thereafter. Another object of the present invention is to provide a bus tracing device and a bus tracing method capable of confirming the order of request operation and reply operation performed on a common bus, and a recording medium recording a program of the method.

[0016]

According to a first aspect of the present invention, there is provided a method for recording trace information of a request operation and a reply operation of data transfer exchanged between a plurality of input / output devices via a shared bus. First and second storage means for storing a predetermined number of trace information of the request operation and the reply operation on the shared bus starting from the latest information; Means, and when the information amount of the trace information of the request operation and the reply operation issued to the shared bus after the trace information of the request operation issued by the own device reaches the limit amount that can be stored in the first storage means, And storage control means for causing the information stored in the first storage means to be stored again in the second storage means.

According to a second aspect of the present invention, there is provided a bus trace method for recording trace information of a request operation and a reply operation of data transfer exchanged between a plurality of input / output devices via a shared bus. Each holds a predetermined number of trace information of the request operation and the reply operation on the shared bus starting from the latest information.
A limit of the amount of trace information of the request operation and the reply operation issued to the shared bus after the trace information of the request operation issued by the own device after the first process. A bus trace method including a second process of saving and holding the information held by the first process when the amount reaches the amount.

According to a third aspect of the present invention, there is provided a program for causing a computer to execute a bus trace method for recording trace information of a request operation and a reply operation of data transfer exchanged between a plurality of input / output devices via a shared bus. A first processing for holding a predetermined number of trace information of the request operation and the reply operation on the shared bus starting from the latest information, and the first processing; Next, when the information amount of the trace information of the request operation and the reply operation issued to the shared bus after the trace information of the request operation issued by the own device reaches the limit amount that can be held by the first process, the first Recording on the recording medium a program including a second process for evacuating and holding the information held by the process And it features.

According to the first to third aspects, the amount of trace information of the request operation and reply operation issued to the shared bus after the trace information of the request operation issued by the own device can be stored in the first storage means. The storage control means monitors whether the limit has been reached. When the information amount of the trace information reaches the limit amount, the storage control means re-stores the entire trace information stored in the first storage means in the second storage means.

Thus, the trace information of the request operation issued by the own device can be left in the second storage means.

[0021]

Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a configuration diagram of a first embodiment of a bus trace device according to the present invention. The same components as those in the conventional example (FIG. 5) are denoted by the same reference numerals, and description thereof will be omitted.

FIG. 1 shows a first embodiment in which three input / output devices 1 to 3 are connected via a common bus 4. As an example, it is assumed that the input / output devices 1 and 2 are request agents that issue requests, and the input / output device 3 is a reply agent.

The request agent 1 includes a data path 11 connected to the shared bus 4 and a tracer circuit 12.
, A request detection circuit 15, a trace memory 13 connected to the tracer circuit 12, and a save memory 14 connected to the trace memory 13. Note that the request agent 2 and the reply agent 3
Since the configuration is similar, the description is omitted.

Next, the operation will be described in detail. FIG.
5 is a flowchart showing details of the operation of the bus trace device.

First, when the request agent 1 requests data transfer to the reply agent 3 via the shared bus 4, after the right to use the shared bus 4 is acquired (S
1) A read request is issued to the shared bus 4 via the data path 11 (S2), and the right to use the shared bus 4 is immediately released (S3).

At this time, the tracer circuit 12 in the request agent 1 stores the trace information of the read request operation of the agent 1 in the trace memory 13 (S4).

Thereafter, when the request agent 2 frequently repeats a write request to the reply agent 3 via the shared bus, the tracer circuit 12 inside the request agent 1 also stores trace information of these request operations in the trace memory 13. .

On the other hand, the request detection circuit 15 determines that the amount of trace information of the request operation and reply operation issued to the shared bus 4 after the trace information of the request operation issued by the agent 1 is limited to the amount that can be stored in the trace memory 13. (Hereinafter referred to as a reference value) is monitored (S5).

Information amount (number of bits) of trace information at one time
Is generally set to be constant. Therefore, it is possible to know in advance how many pieces of trace information can be stored in the trace memory 13.

On the other hand, when the amount of information of one piece of trace information is not constant, it is possible to know in advance how many pieces of trace information can be stored in the trace memory 13 from the total number of bits of a plurality of pieces of trace information. It is.

Therefore, the request detection circuit 15 monitors whether or not the number of trace information has reached a reference value.

In the present embodiment, this reference value is the number of trace information when trace information is stored in the trace memory 13 by half of the memory capacity.

Of course, this reference value is stored in the trace memory 1
3 may be set to the full capacity, or may be set to an arbitrary capacity smaller than that.

When the number of trace information does not reach the reference value, the request detection circuit 15 monitors the number of trace information until the number of trace information reaches the reference value (repetition of S5 and S4).

When the number of trace information reaches the reference value, the request detection circuit 15 restores the entire contents of the trace memory 13 to the save memory 14 (S6).

For example, it is assumed that the trace information after the issuance of the read request has accumulated in the trace memory 13 to half of the memory capacity without the data reply from the reply agent 3 for the read request from the request agent 1 being performed. When the request detection circuit 15 detects the request, the entire contents of the trace memory 13 are moved to the save memory 14 at that time.

Thereafter, the tracer circuit 12 continues to use the shared bus 4
Since the trace information of the request operation and the reply operation described above is continuously stored in the trace memory 13, the read request from the request agent 1 is not replied, and the request agent 1 detects a read timeout error. At that point,
Although there is a high possibility that the trace information of the read request operation corresponding to the read request operation is not already left in the trace memory 13, the read request operation and the shared bus trace information before and after the read request operation are left in the save memory 14. This is effective for analyzing the cause of a timeout.

Next, a second embodiment will be described. FIG. 3 is a configuration diagram of a second embodiment of the bus trace device. The same components as those in the first embodiment are denoted by the same reference numerals, and description thereof is omitted (see FIG. 1).

In the first embodiment, only one reply agent is provided. In the second embodiment, two reply agents are provided.
One reply agent 3, 5 is provided.

It is assumed that the operation speed of the reply agent 3 is much lower than the operation speed of the reply agent 5.

The only difference between the second embodiment and the first embodiment is this.

Next, the operation of the second embodiment will be described. The operation of the second embodiment is basically the same as the operation (the flowchart of FIG. 2) of the first embodiment.

Hereinafter, only differences from the operation of the first embodiment will be described.

After the request agent 1 performs a read request operation to the reply agent 3,
If the request agent 2 repeats the read request to the reply agent 5 many times, the reply agent 5 performs the read request operation from the request agent 2 and the data reply operation from the reply agent 5 many times. On the other hand, the data reply from the reply agent 3 to the read request from the request agent 1 is not easily performed, and the read request from the request agent 1 disappears from the trace memory 13 among them. According to the present invention, since the read request from the request agent 1 remains in the save memory 14, as a result, no reply is returned to the read request from the request agent 1 and the request is returned. Agents 1 is the error analysis information even when the detected read-out remains.

Next, a third embodiment will be described. The third embodiment relates to a recording medium on which a bus tracing method program is recorded.

FIG. 4 is a configuration diagram of a recording medium and a recording medium driving device. The same components as those in the first and second embodiments are denoted by the same reference numerals, and description thereof will be omitted (see FIGS. 1 and 3).

The recording medium drive comprises a CPU (central processing unit) 31, an input device 32, a memory 33, an output device 34, and a request agent 1.
The contents of the recording medium 35 are read into the PU 31.

Although FIG. 4 shows only the request agent 1 connected to the CPU 31 for convenience, the request agent 2 and the reply agents 3 and 5 are actually connected.

A program for causing a computer to execute the bus tracing method shown in the flowchart of FIG. 2 described above is recorded on the recording medium 35.

Next, the operation will be described. When the operator inputs a command to load the program in the recording medium 35 to the CPU 31 from the input device 32, the CPU 31 reads the program in the recording medium 35 according to the command.

Then, the CPU 31 writes the read program into the memory 33. This completes the loading of the program.

Next, the operator operates the input device 32 to enter the CPU 3.
When a program start command is input to the
1 reads the program from the memory 33 and controls the request agent 1 according to the contents. Since the content of the control is the operation of the flowchart of FIG. 2 described above, the description is omitted.

The output device 34 outputs the trace information read from the save memory 14.

[0054]

According to the first aspect of the present invention, there is provided a bus trace apparatus for recording trace information of a request operation and a reply operation of data transfer exchanged between a plurality of input / output devices via a shared bus. Each of the entry and output devices includes a first storage unit in which trace information of the request operation and the reply operation on the shared bus is stored by a predetermined number retroactively from latest information, a second storage unit, and a request issued by the own device. When the information amount of the trace information of the request operation and the reply operation issued to the shared bus after the trace information of the operation reaches the limit amount that can be stored in the first storage unit, the information stored in the first storage unit is deleted. Since the second storage unit is configured to include a storage control unit for restoring the request operation, a reply operation for the request operation is not performed. It is possible to prevent the trace information of the own request operation from being overwritten by the trace information of other input / output devices thereafter, and to confirm the order of the request operation and the reply operation performed on the common bus. be able to.

According to a second aspect of the present invention, there is provided a bus tracing method for recording trace information of a request operation and a reply operation of data transfer exchanged between a plurality of input / output devices via a shared bus. Each of the devices holds a predetermined number of trace information of the request operation and the reply operation on the shared bus starting from the latest information, and a trace of the request operation issued by itself after the first process. When the information amount of the trace information of the request operation and the reply operation issued to the shared bus after the information reaches a limit amount that can be held by the first process, the information held by the first process is saved and held. Since the bus tracing method is configured to include the processing, a bus tracing method having the same effect as the first invention can be obtained.

According to the third aspect of the present invention, it is possible to cause a computer to execute a bus trace method for recording trace information of a request operation and a reply operation of data transfer exchanged between a plurality of input / output devices via a shared bus. A recording medium on which a program is recorded, wherein each of the input / output devices holds a predetermined number of trace information of the request operation and the reply operation on the shared bus starting from the latest information; When the information amount of the trace information of the request operation and the reply operation issued to the shared bus after the trace information of the request operation issued by the own device after the process reaches the limit amount that can be held by the first process, A program including a second process for evacuating and holding the information held by one process is recorded on the recording medium. Because, the recording medium is obtained having the same advantages as the first aspect of the present invention.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a first embodiment of a bus trace device according to the present invention.

FIG. 2 is a flowchart showing details of the operation of the bus trace device.

FIG. 3 is a configuration diagram of a second embodiment of the bus trace device.

FIG. 4 is a configuration diagram of a recording medium and a recording medium driving device.

FIG. 5 is a configuration diagram of a conventional bus trace device.

FIG. 6 is a timing chart showing an example of a request and reply issuance timing.

[Explanation of symbols]

 1, 2 request agent 3, 5 reply agent 4 common bus 11 data path 12 tracer circuit 13 trace memory 14 save memory 15 request detection circuit

Claims (12)

[Claims] 1. A bus trace device for recording trace information of a request operation and a reply operation of data transfer exchanged between a plurality of input / output devices via a shared bus, wherein each of the input / output devices is the shared First storage means for storing a predetermined number of trace information of the request operation and reply operation on the bus starting from the latest information, second storage means, and the shared bus after the trace information of the request operation issued by the own device; When the information amount of the trace information of the request operation and the reply operation issued to the first storage unit reaches a limit amount that can be stored in the first storage unit, the information stored in the first storage unit is re-stored in the second storage unit. And a storage control means for causing the bus tracing device to perform the control. 2. The bus trace device according to claim 1, wherein the limit amount that can be stored in said first storage means is determined based on the number of trace information stored in said first storage means. 3. The bust according to claim 1, wherein the plurality of input / output devices include first and second devices that issue requests and a third device that issues replies to the requests. Racing equipment. 4. The plurality of input / output devices include first and second devices that issue requests, and third and fourth devices that issue replies to the requests. The operation speed of the third device is 3. The bus trace device according to claim 1, wherein the operation speed of the bus trace device is lower than the operation speed of the fourth device. 5. A bus trace method for recording trace information of a request operation and a reply operation of data transfer exchanged between a plurality of input / output devices via a shared bus, wherein each of said input / output devices is shared A first process of holding trace information of the request operation and the reply operation on the bus by a predetermined number retroactively from the latest information;
When the information amount of the trace information of the request operation and the reply operation issued to the shared bus after the trace information of the request operation issued by the own device after the process reaches the limit amount that can be held by the first process, A second process for saving and holding information held by one process. 6. The bus trace method according to claim 5, wherein the limit amount that can be held by said first processing is determined based on the number of trace information held in said first processing. 7. The bust according to claim 5, wherein the plurality of input / output devices include first and second devices that issue requests and a third device that issues replies to the requests. Race method. 8. The plurality of input / output devices include first and second devices that issue requests, and third and fourth devices that issue replies to the requests. 7. The bus trace method according to claim 5, wherein the operation speed is lower than the operation speed of the fourth device. 9. A recording medium for recording a program for causing a computer to execute a bus trace method for recording trace information of a request operation and a reply operation of data transfer exchanged between a plurality of input / output devices via a shared bus. Wherein each of the input / output devices holds a predetermined number of trace information of the request operation and the reply operation on the shared bus starting from the latest information, When the information amount of the trace information of the request operation and the reply operation issued to the shared bus after the trace information of the request operation issued by the first process reaches the limit amount that can be held by the first process, the trace information is held by the first process. And a second process for saving and holding information. 10. The recording medium according to claim 9, wherein the limit amount that can be held by said first processing is determined based on the number of trace information held in said first processing. 11. The recording according to claim 9, wherein the plurality of input / output devices include first and second devices that issue requests and a third device that issues replies to the requests. Medium. 12. The plurality of input / output devices include first and second devices that issue requests, and third and fourth devices that issue replies to the requests. 11. The recording medium according to claim 9, wherein the recording medium is slower than the operation speed of the fourth device.