JPH11289318A - Serial data communication equipment and error check method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a serial data communication equipment or the error check method for the serial data communication device which is capable of adequately performing error check of serial data communication, and performing the error check and the serial data communication in a short time without increasing the circuit scale of the error check. SOLUTION: The same data are transmitted twice by one-time communication, are compared on the side of reception, and when those two data do not match with each other, it is notified to the transmission side from the reception side that there is error in communication data. When the transmission side recognizes that there is error in the communication data, it transmits the same data only once, the reception side compares the latest two data and similarly returns the result to the transmission side.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a serial communication technique and, more particularly, to a clock synchronous serial communication technique.

[0002]

2. Description of the Related Art In a conventional clock synchronous serial communication system, a transmission side and a reception side are basically connected by a clock line and a data line, and serial data is transferred in synchronization with a serial clock.

In such basic clock-synchronous serial communication, transfer control is simple, but there is no error check function. For example, noise is superimposed on a serial clock, and serial data is erroneously transferred. Even in this case, error detection cannot be performed on the receiving side. In such a case, the receiving side uses the received communication data as it is, resulting in a malfunction.

In order to prevent this, an error check function that can be added on the receiving side includes a method of adding a parity bit, a method of returning and comparing transmitted data, and a method of CR.
There is a method using a C code.

[0005]

However, the method of adding a parity bit, which is a conventional error checking method, has a problem that when an even number of bit errors occurs, the error cannot be detected. In addition, the method of comparing transmitted data by returning it has a problem that data communication takes time. To solve this problem, the communication method may be a full-duplex communication method. There are other problems such as an increase in the number of hardware, an increase in hardware circuit scale, and an increase in software load. Further, according to the CRC code method, although communication data can be checked with extremely high accuracy, there is a problem that the circuit scale of hardware becomes large.

Therefore, if a conventional error checking method and a configuration for realizing the error checking method are added, there are problems that error checking cannot be performed sufficiently, a circuit scale becomes large, and communication takes time.

[0007]

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and is directed to a serial data communication apparatus for performing serial data communication between a transmitting side and a receiving side. A transmission means for transmitting the same serial data twice is provided to the receiving side.
A comparison unit that compares two serial data, and if the comparison unit determines that they are the same, a reply that there is no communication error is returned,
If it is not determined that they are the same, a serial data communication device provided with a return means for returning that there is a communication error. Alternatively, in the error checking method when performing serial data communication from the transmitting side to the receiving side, the same serial data is transmitted twice from the transmitting side to the receiving side, and the two serial data transmitted on the receiving side are compared with each other. If so, an error check method of the serial data communication device is provided to notify the transmitting side that there is no communication error, and to notify the transmitting side that there is a communication error if they are not the same.

According to such a configuration or method, an error check of serial data communication can be realized with a simple configuration.

Further, the present invention is a serial data communication device for transmitting the same serial data again from the transmission means when the transmitting side receives the communication error. Alternatively, when the transmitting side is notified that a communication error has occurred, the same serial data is transmitted again from the transmitting side, and the serial data transmitted on the receiving side is compared with the immediately preceding serial data. An error check method for a serial data communication device that notifies the transmitting side that there was no communication error, notifies the transmitting side that there was a communication error if it is not the same, and repeatedly transmits the same serial data again Things.

According to such a configuration or method, the same data is transmitted twice in one communication and compared on the receiving side only when there is an error in the communication data, that is, the first and second transmission data are not transmitted. Only when they do not match, a communication error signal is returned to the transmitting side to retransmit the communication data. At the time of retransmission, the data is transmitted only once, and the latest two data are compared. The communication data is re-transferred until the data matches, and error checking and serial data communication can be realized in a short time.

Further, according to the present invention, the communication between the transmission side and the reception side is clock-synchronized serial data communication, and three signals of a clock synchronization signal line, a serial data communication signal line, and a return signal signal line are transmitted. This is a serial data communication device provided.

With such a configuration, three types of signals are used: a communication synchronous clock (hereinafter, CLK), bidirectional data (hereinafter, DATA), and a return signal (hereinafter, DIR). DIR is a communication error signal. Therefore, it is not necessary to provide a special signal line for checking a communication error.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. In this embodiment, the side that outputs the CLK and DIR signals is a master, and the side that receives the CLK and DIR signals is a slave. Hereinafter, the master and the slave will be described. DIR is set to "H" when data is transmitted from the master, and DIR is set to "L" when receiving data.

FIG. 1 is a block diagram of a serial data communication apparatus when the slave 2 is realized by hardware and the master 1 is realized by software. FIG. 2 is a flowchart showing the operation of the master 1, and FIG. Shows a time chart when the master 1 receives serial data, and FIG.
4 shows a time chart when the master 1 transmits serial data.

The software operation of the master 1 when transmitting and receiving serial data will be described below with reference to FIGS.
When the master 1 receives serial data, as shown in FIG. 3, first, the slave 2 outputs a start bit “H” indicating that there is transfer data to DATA (YES in step 1 of FIG. 2). The master 1 recognizes this "H" of DATA and outputs CLK (step 2 in FIG. 2), but the slave 2 sequentially outputs data from the MSB (D7) in synchronization with the fall of CLK.

The master 1 takes in data at the rise of CLK (step 3 in FIG. 2). And LSB (D
After the slave 2 outputs 0), the master 1 raises the CLK and changes the DIR from "L" to "H" only once (step 4 in FIG. 2). At the rising edge of the DIR, the slave 2 outputs "L" indicating no communication error from the DATA signal line. After recognizing this "L" (step 5 in FIG. 2), the master 1 lowers the CLK. This CL
At the falling edge of K, a start bit “H” is output to DATA, the first transmission ends, and the second transmission starts.

The second transmission is performed in the same manner as the first transmission,
At the end of the second transmission, the start bit “H”
Output to the ATA signal. At this time, the master compares the data transmitted twice (step 6 in FIG. 2), and if there is no communication error (YES in step 7 in FIG. 2), the DIR is output without outputting the third transmission CLK. “L” → “H” →
The communication is ended by changing to "L" (step 8 in FIG. 2). If there is a communication error (step 7 in FIG. 2)
NO), CLK is output again, communication is performed in the same manner as the second time, and communication is performed any number of times until a communication error is eliminated.

Next, when the master 1 transmits serial data, as shown in FIG. 4, the DIR is set to "H" to transfer the serial data from the master 1 (step 9 in FIG. 2). Slave 2 at the rise of this DIR
Enters the data reception state. Then, the master 1 outputs the CLK, and outputs the data from the MSB (D7) in synchronization with the rise of the CLK (step 1 in FIG. 2).
0).

The slave 2 takes in data at the falling edge of CLK. Then, after the slave 2 captures the LSB (D0), the DIR changes from “H” to “H” when CLK is “H”.
It is changed to “L” (step 11 in FIG. 2). This D
During the “L” period of the IR, the slave 2 outputs a signal “H” to which the transfer data has been transferred only once from the DATA signal line and transmits it to the master 1. At this time, the master 1 recognizes "H" and changes the DIR from "L" to "H".
LK is output to perform the second data transfer.

Data is transferred in the same manner as the first
When the transfer of (D0) is completed, DIR is changed to "L" again while CLK is at "H" (step 1 in FIG. 2).
1). At this time, the slave 2 compares the first and second data in the comparator 2a and outputs "L" without communication error ("H" when there is a communication error) from the DATA signal line (FIG. 2). Step 12). When the master 1 recognizes "L", it lowers the CLK and ends the communication. When the master 1 recognizes "H", the third data transfer is performed in the same manner as the second data transfer, and communication is performed any number of times until a communication error is eliminated.

In this embodiment, the master 1 outputs CLK, DI
Since the R signal is output, the slave 2 at the time of data reception
Is a check for only the number of inputs of CLK, but the master 1 can perform an error check by comparing data. During data transmission, the slave 2 sets the CLK
Error checking can be performed by comparing the number of inputs and data.

According to the configuration of this embodiment, the same serial data is transmitted twice in one communication and compared on the receiving side.
If the two serial data do not match, the receiving side notifies the transmitting side that there is a communication error, and if the transmitting side recognizes that there is an error in the communication data, the same data is transmitted once again, and the receiving side Then, the latest two data are compared, and the result is returned to the transmission side in the same manner. According to such a procedure, the communication time can be shortened to perform retransmission only when there is an error in the communication data, and error-free data communication can be performed to retransmit the communication data until there is no error.

Further, according to the configuration of the present embodiment, since a special signal line is not provided for notification of a communication error and a three-wire system is used, the number of signal lines is small and cost can be suppressed.

Therefore, the error check of the serial data communication can be sufficiently performed, the circuit scale of the error check is not large, and the error check and the error check method of the serial data communication device can be performed in a short time. Become.

In this embodiment, the data is 8 bits long and is output from the MSB. However, the data length may be any number of bits and may be output from the LSB. Further, in this embodiment, as shown in FIG. 1, a block diagram in the case where the master 1 is realized by software and the slave 2 is realized by hardware is shown. However, both the master and the slave may be realized by hardware. The slave may be realized by software, the master may be realized by hardware, and the slave may be realized by software.

[0026]

As described above, according to the configuration or method of the present invention, when a communication error occurs, error-free communication can be performed because data is retransmitted. Since it does not take much time, the communication speed is not reduced. Further, it can be realized by hardware or software, and only three signal lines may be used, and it is not necessary to provide a special signal line for communication error checking, so that the cost for realizing the method can be suppressed.

[Brief description of the drawings]

FIG. 1 is a block diagram of a serial data communication device of the present invention.

FIG. 2 is a flowchart on the master side of the serial data communication device of the present invention.

FIG. 3 is a time chart at the time of data reception on the master side of the serial data communication device of the present invention.

FIG. 4 is a time chart at the time of data transmission on the master side of the serial data communication device of the present invention.

[Explanation of symbols]

 1: Master 2: Slave 2a: Comparison unit

Claims (5)

[Claims] 1. A serial data communication device for performing serial data communication between a transmission side and a reception side, wherein said transmission side is provided with transmission means for transmitting the same serial data twice to a reception side, and said transmission side is provided with said transmission side. Comparing means for comparing the two serial data transmitted from the transmitting means, and if the comparing means determines that they are the same, a reply that there is no communication error is returned;
A serial data communication device comprising: a reply unit for returning that there is a communication error if not determined to be the same. 2. The serial data communication according to claim 1, wherein said transmission means transmits the same serial data again when said transmission side receives a communication error from said reply means. apparatus. 3. The communication between the transmission side and the reception side is clock-synchronized serial data communication, and a clock synchronization signal line,
2. The serial data communication device according to claim 1, comprising three signals of a serial data communication signal line and a reply signal signal line. 4. An error check method for performing serial data communication from a transmitting side to a receiving side, wherein the same serial data is transmitted twice from the transmitting side to the receiving side, and the two serial data transmitted from the receiving side are transmitted. A method for checking errors in a serial data communication device, comprising: comparing, if they are identical, notifying the transmitting side that there was no communication error; and if not, notifying the transmitting side that there has been a communication error. 5. When the transmitting side is notified that the communication error has occurred, the transmitting side transmits the same serial data again, and the receiving side compares the transmitted serial data with the immediately preceding serial data. If they are the same, the transmission side is notified that there is no communication error if they are not the same, the transmission side is notified that there is a communication error if they are not the same, and transmission of the same serial data is repeated again. The error checking method for a serial data communication device according to claim 4, wherein