JPH11288979A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH11288979A
JPH11288979A JP11007757A JP775799A JPH11288979A JP H11288979 A JPH11288979 A JP H11288979A JP 11007757 A JP11007757 A JP 11007757A JP 775799 A JP775799 A JP 775799A JP H11288979 A JPH11288979 A JP H11288979A
Authority
JP
Japan
Prior art keywords
composition
resin
semiconductor element
substrate
resin composition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11007757A
Other languages
Japanese (ja)
Inventor
Toshio Shiobara
利夫 塩原
Kazuhiro Arai
一弘 新井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Chemical Co Ltd
Original Assignee
Shin Etsu Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Chemical Co Ltd filed Critical Shin Etsu Chemical Co Ltd
Priority to JP11007757A priority Critical patent/JPH11288979A/en
Publication of JPH11288979A publication Critical patent/JPH11288979A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • H01L2224/92122Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector

Landscapes

  • Compositions Of Macromolecular Compounds (AREA)
  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To resin-encapsulate the gap parts between a wiring circuit board and a semiconductor element without both the generation of voids or the like and breakages in solder balls, efficiently in a short time and moreover, simply. SOLUTION: A semiconductor device is characterized by that the device is manufactured by such a method that electrode parts 5 under a semiconductor element 4 area made to contact with wiring electrodes 2 on a wiring circuit board 1 via solders 3, the solders 3 are molten by heating to bond the element 4 to the board 1, then the board 1 mounted with the element 4 is set in a cavity part of a metal mold, an encapsulating resin composition is introduced from the gate part of the metal mold into the cavity part in a state such that the composition is molten under a pressure to pressure- send the composition in gap parts 6 between the above board 1 and the element 4, the gap parts 6 are filled with the composition and the composition is cured to resin- encapsulate the gap parts 6 between the above board 1 and the element 4, and the sealing resin composition contains (a) an epoxy resin, (b) a curing agent and (c) an inorganic filler of the largest particle diameter of 24 μm or smaller as its essential components, (d) the content of the components of the composition is 50 to 85 wt.% of the whole composition as a whole and the molten viscosity of the composition at a molding temperature is 200 poises or less.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、フリップチップ方
式による半導体装置の製造方法に関する。
The present invention relates to a method for manufacturing a semiconductor device by a flip-chip method.

【0002】[0002]

【従来の技術及び発明が解決しようとする課題】最近の
半導体デバイスは、性能の向上に伴いI/Oピンが増加
し、またパッケージサイズの小型化に伴い、従来の金線
を使用して半導体素子からリードフレームに接続する方
式は採用されなくなってきている。このような状況にお
いて、最近では半田を介して半導体素子を基板に実装す
るフリップチップ方式と呼ばれる方法が多数用いられる
ようになってきた。この種の接続方法においては、素子
の信頼性を向上させるため、半導体素子と基板の空隙部
に液状のエポキシ樹脂を注入し硬化させて信頼性を向上
させている。しかし、半導体素子と基板の空隙部に毛管
現象を利用して樹脂を充填することから、充填に非常に
長い時間を要すること、また、充填時間を短縮化するた
め樹脂組成物の粘度を低くすると、加熱硬化時に封止用
樹脂組成物中の無機質充填剤が沈降し硬化樹脂の上下で
膨張係数が異なってしまい、半導体装置の信頼性を低下
させてしまうといった問題がある。
2. Description of the Related Art In recent semiconductor devices, the number of I / O pins has increased with the improvement in performance, and with the miniaturization of the package size, semiconductor devices using conventional gold wires have been used. The method of connecting the element to the lead frame has not been adopted. In such a situation, recently, a method called a flip chip method for mounting a semiconductor element on a substrate via solder has come to be used in large numbers. In this type of connection method, in order to improve the reliability of the device, a liquid epoxy resin is injected into a gap between the semiconductor device and the substrate and cured to improve the reliability. However, since the resin is filled by utilizing the capillary phenomenon in the gap between the semiconductor element and the substrate, it takes a very long time to fill, and if the viscosity of the resin composition is reduced to shorten the filling time, In addition, there is a problem that the inorganic filler in the encapsulating resin composition is settled at the time of heat curing and the expansion coefficient differs between the upper and lower portions of the cured resin, thereby lowering the reliability of the semiconductor device.

【0003】本発明は上記問題点を解決したもので、基
板と半導体素子との空隙部に封止樹脂を確実に充填し得
て、ボイド等の発生もなく、また半田ボールを破損する
こともなく、しかも短時間で樹脂封止を行うことができ
て、耐湿性に優れ、信頼性の高い半導体装置を得ること
ができるフリップチップ方式による半導体装置の製造方
法を提供することを目的とする。
The present invention has solved the above-mentioned problems, and it is possible to reliably fill a gap between a substrate and a semiconductor element with a sealing resin without generating voids and the like, and it is also possible to damage a solder ball. It is an object of the present invention to provide a method of manufacturing a semiconductor device by a flip-chip method, which can perform a resin encapsulation in a short time without any problem, and can obtain a highly reliable semiconductor device having excellent moisture resistance.

【0004】[0004]

【課題を解決するための手段及び発明の実施の形態】本
発明者は、上記目的を達成するため鋭意検討を行った結
果、後述する特定の封止用樹脂組成物を金型ゲート部か
ら溶融状態で基板と半導体素子との空隙部に加圧移送し
て封止用樹脂組成物を充填し、加熱硬化(いわゆるトラ
ンスファー成形)させて基板と半導体素子との空隙を樹
脂封止することで、非常に短いサイクルで封止を行うこ
とができ、かつ充填剤の沈降もない高信頼性の半導体装
置を製造することができることを見出し、本発明をなす
に至った。
Means for Solving the Problems and Embodiments of the Invention The present inventors have conducted intensive studies to achieve the above object, and as a result, melted a specific sealing resin composition described later from a mold gate portion. In this state, the gap between the substrate and the semiconductor element is pressure-transferred, filled with the sealing resin composition, and cured by heating (so-called transfer molding) to seal the gap between the substrate and the semiconductor element with the resin. The present inventors have found that it is possible to manufacture a highly reliable semiconductor device that can perform sealing in a very short cycle and that does not cause sedimentation of a filler, and have accomplished the present invention.

【0005】即ち、本発明は、配線回路基板の配線電極
に半田を介して半導体素子の電極部を当接し、半田を加
熱溶融して基板に半導体素子を接合し、次いでこの半導
体素子の搭載された基板を金型キャビティー部にセット
し、封止用樹脂組成物を溶融状態で金型のゲート部から
キャビティー部に加圧下に導入して上記基板と半導体素
子との空隙部に圧送、充填し、封止用樹脂組成物を硬化
させて、上記基板と半導体素子との空隙部を樹脂封止す
るようにした半導体装置の製造方法であって、上記封止
用樹脂組成物が(a)エポキシ樹脂、(b)硬化剤、
(c)最大粒径が24μm以下の無機質充填剤を必須成
分とし、(c)成分の含有量が組成物全体の50〜85
重量%であり、成形温度での溶融粘度が200ポイズ以
下であることを特徴とする半導体装置の製造方法を提供
するものである。
That is, according to the present invention, an electrode portion of a semiconductor element is brought into contact with a wiring electrode of a printed circuit board via solder, the solder is heated and melted to join the semiconductor element to the substrate, and then the semiconductor element is mounted. The substrate was set in the cavity of the mold, and the sealing resin composition was introduced into the cavity from the gate of the mold in a molten state under pressure and fed to the gap between the substrate and the semiconductor element, A method of manufacturing a semiconductor device, comprising filling and curing a sealing resin composition to seal a gap between the substrate and the semiconductor element with a resin, wherein the sealing resin composition is (a) ) Epoxy resin, (b) curing agent,
(C) An inorganic filler having a maximum particle size of 24 μm or less is an essential component, and the content of the component (c) is 50 to 85 of the entire composition.
The present invention provides a method for manufacturing a semiconductor device, characterized in that the melt viscosity at a molding temperature is 200 poise or less.

【0006】以下、本発明につき更に詳しく説明する。
本発明の半導体装置の製造方法は、例えば図1に示した
ように、まず片面に配線回路が形成された基板1上の配
線電極2に半田3を介して半導体素子4の電極部5を当
接させる。次いで、半田3を加熱溶融することにより、
半導体素子4を基板1と接合する。この場合、半導体素
子と基板間の距離は10〜150μm程度であるが、望
ましくは20〜100μmである。電極の数が多くなる
と半田ボールの大きさが小さくなるため必然的に距離が
短くなる。本発明の製造方法を用いる場合は望ましくは
30μm以上の距離があった方がよい。なお、図2は半
田の配列例を示す。
Hereinafter, the present invention will be described in more detail.
In the method for manufacturing a semiconductor device according to the present invention, for example, as shown in FIG. 1, first, an electrode portion 5 of a semiconductor element 4 is applied to a wiring electrode 2 on a substrate 1 on which a wiring circuit is formed on one side via a solder 3. Contact Next, by heating and melting the solder 3,
The semiconductor element 4 is joined to the substrate 1. In this case, the distance between the semiconductor element and the substrate is about 10 to 150 μm, preferably 20 to 100 μm. When the number of electrodes increases, the size of the solder ball decreases, so that the distance is inevitably shortened. In the case of using the manufacturing method of the present invention, it is desirable that the distance is 30 μm or more. FIG. 2 shows an example of solder arrangement.

【0007】本発明は、このようにして半導体素子の搭
載された基板を金型キャビティー部にセットし、封止用
樹脂組成物を溶融状態で金型のゲート部からキャビティ
ー部に加圧下に導入して基板と半導体素子との空隙部に
圧送、充填し、封止用樹脂組成物を硬化(いわゆるトラ
ンスファー成形)させて、上記基板と半導体素子との空
隙を樹脂封止するものである。
According to the present invention, the substrate on which the semiconductor element is mounted is set in the mold cavity, and the sealing resin composition is pressed from the mold gate to the cavity in a molten state. Into the gap between the substrate and the semiconductor element under pressure, filling the gap, curing the sealing resin composition (so-called transfer molding), and sealing the gap between the substrate and the semiconductor element with the resin. .

【0008】例えば、上記半導体素子が搭載された基板
を、図3に示されたような上金型11と下金型12とを
備えた金型10の該下型12のキャビティー部13にセ
ットし、上金型11を閉じ、保温する。その際金型の温
度としては130〜200℃に設定することが好まし
い。金型温度が130℃よリも低い場合、封止用樹脂組
成物の溶融粘度が高くなり、成形時半田を押し流した
り、内部にボイドを発生させる場合がある。また、20
0℃より高いと反応が速すぎて完全に充填させることが
できなくなるおそれがある。その後、プランジャポット
部に封止用樹脂組成物を投入し、プランジャー14で加
圧する。封止用樹脂組成物はポットに投入する前に予め
円筒形のプリフォームにしておいてもよいし、顆粒状の
粒子のままでもよい。プランジャーポット投入前に予め
高周波予熱装置で封止用樹脂組成物を50〜100℃に
加熱しておくことが良好な成形性を得るために望まし
い。成形圧力としては10〜100kgf/cm2、望
ましくは30〜50kgf/cm2であることがよい。
10kgf/cm2未満では圧力が低すぎて十分な充填
性を得ることができない場合があり、また100kgf
/cm2を超えると半田を押し流す場合がある。圧力は
不具合が発生しないならできるだけ高く設定した方が信
頼性の面から望ましい。
For example, a substrate on which the above-described semiconductor element is mounted is placed in a cavity 13 of a lower mold 12 of a mold 10 having an upper mold 11 and a lower mold 12 as shown in FIG. After setting, the upper mold 11 is closed to keep the temperature. At that time, the temperature of the mold is preferably set to 130 to 200 ° C. When the mold temperature is lower than 130 ° C., the melt viscosity of the encapsulating resin composition becomes high, so that the solder may be washed away during molding or voids may be generated inside. Also, 20
If the temperature is higher than 0 ° C., the reaction may be too fast to completely fill. After that, the sealing resin composition is charged into the plunger pot portion, and pressurized by the plunger 14. The sealing resin composition may be formed into a cylindrical preform before being charged into the pot, or may remain as granular particles. It is desirable to heat the sealing resin composition to 50 to 100 ° C. in advance with a high-frequency preheating device before putting the plunger pot in order to obtain good moldability. The molding pressure is preferably 10 to 100 kgf / cm 2 , more preferably 30 to 50 kgf / cm 2 .
If the pressure is less than 10 kgf / cm 2 , the pressure may be too low to obtain a sufficient filling property.
If it exceeds / cm 2 , the solder may be washed away. If the pressure does not cause any trouble, it is desirable to set the pressure as high as possible from the viewpoint of reliability.

【0009】このような溶融した封止用樹脂組成物16
を上記圧力下に金型10のゲート部15よりキャビティ
ー部13に導入し、基板1と半導体素子4との間の空隙
部6に溶融した封止用樹脂組成物を圧入し、これを硬化
して、図4に示すように空隙部6を樹脂封止17した半
導体装置18を得るものである。なお、硬化時間として
は60〜240秒、望ましくは60〜120秒である。
移送成形の方法としては3Pシステム(Pre−Pac
kaged−process)として知られているよう
なフィルムを用いた成形装置を使用することが上下金型
の合わせ目から樹脂が漏れるといった問題を防止するこ
とができる。また、この方法であれば金型と直接樹脂が
接触しないため、離型剤を含まない封止用樹脂組成物を
使用しても離型トラブルを招くこともない。更に、液状
の封止用樹脂組成物でも使用できるメリットがある。
[0009] Such a molten sealing resin composition 16
Is introduced from the gate portion 15 of the mold 10 into the cavity portion 13 under the above pressure, and the molten sealing resin composition is pressed into the gap portion 6 between the substrate 1 and the semiconductor element 4 and cured. Then, as shown in FIG. 4, a semiconductor device 18 in which the gap 6 is sealed with a resin 17 is obtained. The curing time is 60 to 240 seconds, preferably 60 to 120 seconds.
As a method of transfer molding, a 3P system (Pre-Pac
Using a molding apparatus using a film known as “kaged-process” can prevent the problem that the resin leaks from the joint between the upper and lower molds. Further, according to this method, since the resin does not come into direct contact with the mold, even if a sealing resin composition containing no release agent is used, no release trouble is caused. Further, there is an advantage that a liquid sealing resin composition can be used.

【0010】この場合、本発明に使用する封止用樹脂組
成物は、(a)エポキシ樹脂、(b)硬化剤、(c)無
機質充填剤を必須成分とする、いわゆる硬化性エポキシ
樹脂組成物であるが、典型的には、10〜150μmの
空隙を有する5〜20mm×5〜20mm角で厚みが
0.1〜0.6mmの素子を封止する必要があることか
ら、従来からよく知られている半導体装置封止用樹脂組
成物とは流動特性や硬化特性で異なった性質が要求され
る。特に、成形時の粘度が重要で、成形温度での溶融粘
度が200ポイズ以下であることが必要であり、例えば
130〜200℃、好ましくは150〜185℃、より
好ましくは175℃で成形する場合は、成形温度で測定
した溶融粘度が200ポイズ以下、望ましくは5〜10
0ポイズ以下、より望ましくは10〜50ポイズ以下で
ある。また、樹脂の注入を3〜30秒程度で行う必要が
あることから、樹脂のゲル化時間としては成形温度で2
0秒以上、望ましくは30秒以上、より望ましくは35
秒以上であることがよい。流動性の目安となるスパイラ
ルフローは175℃、70kgf/cm2の圧力で測定
した場合、100〜250cm、より望ましくは150
〜250cm程度流れるものであることがよい。
In this case, the encapsulating resin composition used in the present invention is a so-called curable epoxy resin composition comprising (a) an epoxy resin, (b) a curing agent, and (c) an inorganic filler as essential components. However, typically, it is necessary to seal an element having a gap of 10 to 150 μm and a size of 5 to 20 mm × 5 to 20 mm square and a thickness of 0.1 to 0.6 mm. It is required to have different properties in terms of flow characteristics and curing characteristics from the conventional resin compositions for encapsulating semiconductor devices. In particular, the viscosity during molding is important, and the melt viscosity at the molding temperature needs to be 200 poise or less. For example, when molding at 130 to 200 ° C., preferably 150 to 185 ° C., and more preferably 175 ° C. Has a melt viscosity measured at a molding temperature of 200 poise or less, preferably 5 to 10
0 poise or less, more preferably 10 to 50 poise or less. Further, since it is necessary to inject the resin in about 3 to 30 seconds, the gelling time of the resin is 2 at the molding temperature.
0 seconds or more, preferably 30 seconds or more, more preferably 35
It is better to be more than seconds. The spiral flow as a measure of fluidity is 100 to 250 cm, more preferably 150 when measured at 175 ° C. and a pressure of 70 kgf / cm 2.
It is preferable that the flow is about 250 cm.

【0011】更に、この封止用樹脂組成物について詳述
すると、(a)成分であるエポキシ樹脂は、従来から公
知の一分子当たり2個以上のエポキシ基を持ったもので
あればいかなるものでも使用することができるが、特に
ビスフェノールA型エポキシ樹脂、ビスフェノールF型
エポキシ樹脂等のビスフェノール型エポキシ樹脂、フェ
ノールノボラック型エポキシ樹脂、クレゾールノボラッ
ク型エポキシ樹脂等のノボラック型エポキシ樹脂、シク
ロペンタジエン型エポキシ樹脂、トリフェノールメタン
型エポキシ樹脂、トリフェノールプロパン型エポキシ樹
脂等のトリフェノールアルカン型エポキシ樹脂、ビフェ
ニル型エポキシ樹脂、ナフタレン環含有エポキシ樹脂、
フェノールアラルキル型エポキシ樹脂、ビフェニルアラ
ルキル型エポキシ樹脂などが例示される。また、下記構
造式で示されるエポキシ樹脂も使用可能である。
Further, the sealing resin composition will be described in detail. The epoxy resin as the component (a) can be any known epoxy resin having at least two epoxy groups per molecule. Although it can be used, in particular, bisphenol A type epoxy resin, bisphenol type epoxy resin such as bisphenol F type epoxy resin, phenol novolak type epoxy resin, novolak type epoxy resin such as cresol novolak type epoxy resin, cyclopentadiene type epoxy resin, Triphenol alkane type epoxy resin such as triphenol methane type epoxy resin, triphenol propane type epoxy resin, biphenyl type epoxy resin, naphthalene ring-containing epoxy resin,
Examples thereof include a phenol aralkyl type epoxy resin and a biphenyl aralkyl type epoxy resin. Further, an epoxy resin represented by the following structural formula can also be used.

【0012】[0012]

【化1】 (G=グリシジル基、Me=メチル基、nは0〜10、
好ましくは0〜3の整数)
Embedded image (G = glycidyl group, Me = methyl group, n is 0 to 10,
(Preferably an integer of 0 to 3)

【0013】これらエポキシ樹脂中の全塩素含有量は1
500ppm以下、望ましくは1000ppm以下であ
る。また、120℃で50%エポキシ樹脂濃度における
20時間での抽出水塩素が5ppm以下であることが好
ましい。全塩素含有量が1500ppmを超え、また抽
出水塩素量が5ppmを超えると半導体の耐湿信頼性が
低下するおそれがある。
The total chlorine content in these epoxy resins is 1
It is at most 500 ppm, preferably at most 1,000 ppm. Further, it is preferable that the extraction water chlorine in 20 hours at 120 ° C. and 50% epoxy resin concentration is 5 ppm or less. When the total chlorine content exceeds 1500 ppm and the chlorine content in the extracted water exceeds 5 ppm, the moisture resistance reliability of the semiconductor may be reduced.

【0014】本発明の硬化剤(b)としては、酸無水物
やアミン化合物、あるいはフェノール樹脂など従来から
公知のエポキシ樹脂を硬化させることができるものなら
いずれのものでも使用可能であるが、中でも信頼性の面
からフェノール樹脂が望ましい。フェノール樹脂として
は1分子中にフェノール性の水酸基が2個以上あればい
かなるものでも使用可能であるが、特に、ビスフェノー
ルA型樹脂、ビスフェノールF型樹脂等のビスフェノー
ル型樹脂、フェノールノボラック樹脂、クレゾールノボ
ラック樹脂等のノボラック樹脂、フェノールアラルキル
樹脂、ナフタレン環含有フェノール樹脂、シクロペンタ
ジエン型フェノール樹脂、トリフェノールメタン型樹
脂、トリフェノールプロパン型樹脂等のトリフェノール
アルカン型樹脂、ビフェニル型樹脂、ビフェニルアラル
キル型樹脂や下記構造のフェノール性水酸基を含有する
ものなどが例示される。
As the curing agent (b) of the present invention, any one which can cure a conventionally known epoxy resin such as an acid anhydride, an amine compound, or a phenol resin can be used. Phenolic resin is desirable in terms of reliability. Any phenolic resin can be used as long as it has two or more phenolic hydroxyl groups in one molecule. In particular, bisphenol type resins such as bisphenol A type resin and bisphenol F type resin, phenol novolak resin, cresol novolak Novolak resin such as resin, phenol aralkyl resin, naphthalene ring-containing phenol resin, cyclopentadiene type phenol resin, triphenol methane type resin, triphenol alkane type resin such as triphenol propane type resin, biphenyl type resin, biphenyl aralkyl type resin Those containing a phenolic hydroxyl group having the following structure are exemplified.

【0015】[0015]

【化2】 (nは0〜10、好ましくは0〜3の整数)Embedded image (N is an integer of 0 to 10, preferably 0 to 3)

【0016】フェノール樹脂もエポキシ樹脂同様、12
0℃の温度で抽出される塩素イオンやナトリウムイオン
などはいずれも好ましくは10ppm以下、より望まし
くは5ppm以下である。
The phenolic resin, like the epoxy resin, has
Chlorine ions and sodium ions extracted at a temperature of 0 ° C. are all preferably 10 ppm or less, more preferably 5 ppm or less.

【0017】エポキシ樹脂とフェノール樹脂の混合割合
は、エポキシ樹脂中のエポキシ基1モルに対してフェノ
ール樹脂中のフェノール性水酸基が0.5〜1.6モ
ル、望ましくは0.6〜1.4モルであることがよい。
0.5モル未満では水酸基が不足しエポキシ基の単独重
合の割合が多くなり、ガラス転移温度が低くなるおそれ
がある。また、1.6モルを超えるとフェノール性水酸
基の比率が高くなり、反応性が低下するほか架橋密度が
低く十分な強度が得られないものとなる場合がある。
The mixing ratio of the epoxy resin to the phenolic resin is such that the phenolic hydroxyl group in the phenolic resin is 0.5 to 1.6 mol, preferably 0.6 to 1.4 mol per 1 mol of the epoxy group in the epoxy resin. It may be molar.
If the amount is less than 0.5 mol, the hydroxyl group becomes insufficient, the homopolymerization ratio of the epoxy group increases, and the glass transition temperature may decrease. On the other hand, if it exceeds 1.6 mol, the ratio of the phenolic hydroxyl group becomes high, and the reactivity is lowered, and the crosslink density is too low to obtain sufficient strength in some cases.

【0018】なお、本発明で用いる封止用樹脂組成物に
は硬化促進剤として、リン系、イミダゾール誘導体、シ
クロアミジン系誘導体などを使用することができる。硬
化促進剤の量としては、エポキシ樹脂とフェノール樹脂
の合計量100重量部に対し0〜10重量部、特に0.
01〜10重量部であることが好ましい。
In the sealing resin composition used in the present invention, phosphorus-based, imidazole derivatives, cycloamidine-based derivatives and the like can be used as a curing accelerator. The curing accelerator is used in an amount of 0 to 10 parts by weight, especially 0.1 to 100 parts by weight of the total amount of the epoxy resin and the phenol resin.
It is preferably from 0.01 to 10 parts by weight.

【0019】(c)成分としての無機質充填剤としては
最大粒径が24μm以下のもので、例えばボールミルな
どで粉砕した溶融シリカや火炎溶融することで得られる
球状シリカ、ゾルゲル法などで製造される球状シリカ、
結晶シリカ、アルミナ、ボロンナイトライド、チッ化ア
ルミ、チッ化珪素、マグネシア、マグネシウムシリケー
トなどが使用される。半導体素子が発熱の大きい素子の
場合、熱伝導率ができるだけ大きく、かつ膨張係数の小
さなアルミナ、ボロンナイトライド、チッ化アルミ、チ
ッ化珪素などを充填剤として使用することが望ましい。
また、溶融シリカなどとブレンドして使用してもよい。
中でも、球状の無機質充填剤、通常は溶融シリカ、熱伝
導性が要求される場合はアルミナやチッ化アルミを用い
ることが好ましい。
The inorganic filler as the component (c) has a maximum particle size of 24 μm or less, and is produced by, for example, fused silica pulverized by a ball mill or the like, spherical silica obtained by flame melting, a sol-gel method, or the like. Spherical silica,
Crystalline silica, alumina, boron nitride, aluminum nitride, silicon nitride, magnesia, magnesium silicate and the like are used. When the semiconductor element generates a large amount of heat, it is desirable to use alumina, boron nitride, aluminum nitride, silicon nitride, or the like having a large thermal conductivity and a small expansion coefficient as a filler.
Further, it may be used by blending with fused silica or the like.
Above all, it is preferable to use a spherical inorganic filler, usually fused silica, and when thermal conductivity is required, alumina or aluminum nitride.

【0020】無機質充填剤として溶融シリカ又はアルミ
ナを例にすると、溶融シリカ又はアルミナ使用量は、エ
ポキシ樹脂と硬化剤の合計量100重量部に対し100
〜550重量部、特に200〜450重量部であること
が好ましい。100重量部未満では、膨張係数を十分に
下げることができず、一方、550重量部より多いと粘
度が高くなりすぎ、成形できなくなってしまう場合があ
る。
Taking fused silica or alumina as an example of the inorganic filler, the amount of fused silica or alumina used is 100 parts by weight per 100 parts by weight of the total amount of epoxy resin and curing agent.
It is preferably from 550 to 550 parts by weight, particularly preferably from 200 to 450 parts by weight. If the amount is less than 100 parts by weight, the expansion coefficient cannot be sufficiently reduced. On the other hand, if the amount is more than 550 parts by weight, the viscosity becomes too high and molding may not be performed.

【0021】ここで使用することができるシリカ、アル
ミナ等の無機質充填剤の粒度分布は、平均粒径が1〜1
5μm、より好ましくは2〜10μmで、充填剤中の2
0〜60重量%が微細な5μm以下の粒径の溶融シリ
カ、アルミナ等の充填剤であって、最大粒径が24μm
以下、望ましくは20μm以下、更に望ましくは10μ
m以下の粒度分布を持ち、BET吸着法による比表面積
が3.5〜6.0m2/g、望ましくは4.0〜5.0
2/gであるものが望ましい。粒径が5μm以下の充
填剤が20重量%未満では半導体素子と基板間の空隙に
対する充填性が悪く、ボイドや半田バンプの破損といっ
た問題を引き起こすおそれがある。また60重量%より
多いと、微粉が多くなりすぎて樹脂と充填剤表面が十分
に濡れないため、逆に組成物の粘度が高くなってしま
い、成形時に圧力をあげる必要が生じ、場合によっては
半田バンプの破損を招く場合がある。望ましくは30〜
50重量%の範囲で粒径5μm以下の充填剤が含まれる
ことがよい。また、一般に充填剤の最大粒径は基板と半
導体素子の距離の1/5以下、好ましくは1/10以下
に設定すれば、充填性に問題が発生しない。なお、この
平均粒径は例えば、レーザー光回折法などによる粒度分
布測定機を用いて、重量平均値(又はメディアン径)等
として求めることができる。
The particle size distribution of the inorganic filler such as silica, alumina and the like used herein has an average particle diameter of 1-1.
5 μm, more preferably 2 to 10 μm, 2 μm in the filler
0 to 60% by weight of a filler such as fused silica or alumina having a fine particle diameter of 5 μm or less, and a maximum particle diameter of 24 μm
Or less, preferably 20 μm or less, more preferably 10 μm
m and a specific surface area by BET adsorption method of 3.5 to 6.0 m 2 / g, preferably 4.0 to 5.0.
Those having m 2 / g are desirable. If the filler having a particle size of 5 μm or less is less than 20% by weight, the filling property of the gap between the semiconductor element and the substrate is poor, and there is a possibility that a problem such as a void or breakage of a solder bump may be caused. On the other hand, if it is more than 60% by weight, the amount of fine powder becomes too large and the surface of the resin and the filler are not sufficiently wetted. Conversely, the viscosity of the composition becomes high, and it is necessary to increase the pressure at the time of molding. The solder bump may be damaged. Desirably 30 ~
It is preferable that a filler having a particle size of 5 μm or less is contained in the range of 50% by weight. In general, if the maximum particle size of the filler is set to 1/5 or less, preferably 1/10 or less of the distance between the substrate and the semiconductor element, no problem occurs in the filling property. The average particle diameter can be determined as a weight average value (or median diameter) using a particle size distribution measuring device such as a laser light diffraction method.

【0022】本発明においては、充填剤の最密充填化と
チキソ性付与による組成物の低粘度化と樹脂組成物の流
動性制御のために粒径3μmから超微粉シリカ(0.0
5μm以下、通常0.001〜0.05μm)に至るシ
リカ充填剤を適宜混合して配合してもよい。例えば、ア
エロジルに代表される比表面積が50〜300m2/g
(又は粒径が0.001〜0.05μm)の超微粉シリ
カと粒径が0.05〜0.5μmの微粉のシリカ充填剤
及び粒径が0.5〜3μmのシリカ充填剤を適宜混合し
て用いることがよい。これら微粉シリカの混合量として
は、無機質充填剤全体に対して超微粉シリカが0〜5重
量%、粒径0.05〜0.5μmのシリカが1〜15重
量%、粒径が0.5〜3μmのシリカが5〜20重量%
であることが好ましく、これらのシリカ混合物の平均粒
径は1μm以下となるように調製して配合してもよい。
In the present invention, the particle size is reduced from 3 μm to ultrafine silica (0.00 μm) to reduce the viscosity of the composition and to control the fluidity of the resin composition by the close-packing of the filler and the addition of thixotropy.
A silica filler having a particle size of 5 μm or less, usually 0.001 to 0.05 μm) may be appropriately mixed and blended. For example, the specific surface area represented by Aerosil is 50 to 300 m 2 / g.
(Or a finely divided silica filler having a particle size of 0.001 to 0.05 μm), a finely divided silica filler having a particle size of 0.05 to 0.5 μm, and a silica filler having a particle size of 0.5 to 3 μm are appropriately mixed. It is better to use it. With respect to the mixing amount of these finely divided silicas, ultrafine silica is 0 to 5% by weight, silica having a particle size of 0.05 to 0.5 μm is 1 to 15% by weight, and particle size is 0.5 to 0.5% by weight based on the whole inorganic filler. 5 to 20% by weight of silica of ~ 3 µm
The silica mixture may be prepared and blended such that the average particle size of the silica mixture is 1 μm or less.

【0023】この場合、本発明において無機質充填剤は
組成物全体の50〜85重量%、特に70〜82重量%
を含有する。50重量%より少ないと組成物としての粘
度は低くなるものの膨張係数が大くなり、温度サイクル
試験などで封止剤が半導体チップ表面で剥離するという
問題があり、また85重量%より多いと組成物の粘度が
高くなりすぎて、充填性が悪くなり、未充填不良が発生
する。
In this case, in the present invention, the inorganic filler accounts for 50 to 85% by weight, especially 70 to 82% by weight of the whole composition.
It contains. If the amount is less than 50% by weight, the viscosity of the composition becomes low, but the expansion coefficient becomes large, and there is a problem that the sealant peels off on the surface of the semiconductor chip in a temperature cycle test or the like. The viscosity of the product becomes too high, the filling property is deteriorated, and poor filling occurs.

【0024】なお、本発明の組成物には従来から公知の
シリコーンゴムやシリコーンゲルなどの粉末、シリコー
ン変性エポキシ樹脂やシリコーン変性フェノール樹脂、
メタクリル酸メチル−ブタジエン−スチレンよりなる熱
可塑性樹脂及びその水素添加物などの誘導体等を低応力
化剤として添加してもよい。
The composition of the present invention contains powders of conventionally known silicone rubber and silicone gel, silicone-modified epoxy resins and silicone-modified phenol resins,
A derivative such as a thermoplastic resin composed of methyl methacrylate-butadiene-styrene and a hydrogenated product thereof may be added as a stress reducing agent.

【0025】また、粘度を下げる目的のために、従来よ
り公知のn−ブチルグリシジルエーテル、フェニルグリ
シジルエーテル、スチレンオキサイド、t−ブチルフェ
ニルグリシジルエーテル、ジシクロペンタジエンジエポ
キシド、フェノール、クレゾール、t−ブチルフェノー
ルのような希釈剤を添加することができる。
For the purpose of lowering the viscosity, conventionally known n-butyl glycidyl ether, phenyl glycidyl ether, styrene oxide, t-butyl phenyl glycidyl ether, dicyclopentadiene diepoxide, phenol, cresol, t-butyl phenol A diluent such as can be added.

【0026】更に、難燃化のためブロム化エポキシ樹脂
や三酸化アンチモンのような難燃助剤、シランカップリ
ング剤、チタン系カップリング剤、アルミニウム系カッ
プリング剤などのカップリング剤やカーボンブラックな
どの着色剤、ノニオン系界面活性剤、フッ素系界面活性
剤、シリコーンオイルなどの濡れ向上剤や消泡剤なども
場合によっては添加することができる。
Further, a flame retardant aid such as brominated epoxy resin or antimony trioxide, a coupling agent such as a silane coupling agent, a titanium-based coupling agent, an aluminum-based coupling agent, or carbon black for flame retardation. In some cases, a coloring agent such as a nonionic surfactant, a fluorinated surfactant, a wetting enhancer such as silicone oil, an antifoaming agent, and the like can be added.

【0027】製造方法としては上記した諸原料を高速混
合機などを用い、均一に混合した後熱二本ロールや連続
混練装置などで十分混練すればよい。
As a production method, the above-mentioned raw materials are uniformly mixed using a high-speed mixer or the like, and then sufficiently kneaded with a hot double roll or a continuous kneader.

【0028】[0028]

【発明の効果】本発明によれば、封止用樹脂組成物を基
板と半導体素子との空隙部に確実に充填することがで
き、ボイド等の発生もなく、半田ボールを破損すること
もなく、短時間で効率よく、しかも簡単に樹脂封止を行
うことができ、耐湿性に優れ、高信頼性の半導体装置を
得ることができる。
According to the present invention, the gap between the substrate and the semiconductor element can be reliably filled with the sealing resin composition, and no voids or the like are generated, and the solder balls are not damaged. It is possible to efficiently and easily perform resin sealing in a short time and obtain a highly reliable semiconductor device having excellent moisture resistance.

【0029】[0029]

【実施例】以下、実施例と比較例を示し、本発明を具体
的に説明するが、本発明は下記の実施例に制限されるも
のではない。
EXAMPLES The present invention will be described below in detail with reference to examples and comparative examples, but the present invention is not limited to the following examples.

【0030】〔実施例1〜3、比較例1,2〕表1に示
される組成成分を同表に示される割合で各成分を混合し
た。これを高速混合機で10分間混合した後、連続混練
装置を用いて50〜100℃で混練し、シート化した。
冷却後粉砕し、円筒状に打錠し、ペレット化し、樹脂組
成物(実施例1〜3、比較例1,2)を得た。その特性
は表2に示す通りである。
Examples 1 to 3 and Comparative Examples 1 and 2 The components shown in Table 1 were mixed at the ratios shown in the table. This was mixed with a high-speed mixer for 10 minutes, and then kneaded at 50 to 100 ° C. using a continuous kneader to form a sheet.
After cooling, the mixture was pulverized, tableted into a cylindrical shape, and pelletized to obtain a resin composition (Examples 1 to 3, Comparative Examples 1 and 2). Its characteristics are as shown in Table 2.

【0031】[0031]

【表1】 [Table 1]

【0032】[0032]

【化3】 硬化剤(1):ノボラック型フェノール樹脂,水酸基当
量:110 硬化剤(2):フェノールアラルキル樹脂(明和化成社
製MEH7800),水酸基当量:175 臭素化ノボラック型エポキシ樹脂:BREN−S(日本
化薬社製),エポキシ当量:280 無機質充填剤: 平均粒径(μm) 最大粒径(μm) 球状シリカ(1) 3 10 球状シリカ(2) 5 20 球状シリカ(3) 5 48 球状アルミナ 3 15 触媒(1):トリフェニルホスフィン 触媒(2):TPP−K(テトラフェニルホスホニウム
テトラフェニルボレート) カップリング剤:γ−グリシドキシプロピルトリメトキ
シシラン なお、上記無機質充填剤の平均粒径及び最大粒径は、シ
ラス社(CILASALCATEL(France))
製のレーザー光回折式粒度分布測定装置:Granur
ometer 920を用いて測定した。
Embedded image Curing agent (1): Novolak type phenol resin, hydroxyl equivalent: 110 Curing agent (2): Phenol aralkyl resin (MEH7800, manufactured by Meiwa Kasei Co., Ltd.), hydroxyl equivalent: 175 Brominated novolak type epoxy resin: BREN-S (Nippon Kayaku) Epoxy equivalent: 280 Inorganic filler: Average particle size (μm) Maximum particle size (μm) Spherical silica (1) 3 10 Spherical silica (2) 520 Spherical silica (3) 548 Spherical alumina 315 Catalyst (1): triphenylphosphine Catalyst (2): TPP-K (tetraphenylphosphonium tetraphenylborate) Coupling agent: γ-glycidoxypropyltrimethoxysilane Average particle size and maximum particle size of the above-mentioned inorganic filler Is Shirasu (CILASCALTEL (France))
Laser Diffraction Particle Size Distribution Analyzer: Granur
It was measured using an Omter 920.

【0033】[0033]

【表2】 [Table 2]

【0034】スパイラルフロー 成形温度175℃、成形圧力70kgf/cm2でトラ
ンスファー成形することでスパイラルフローを測定し
た。ゲル化時間 175℃及び160℃の熱板でエポキシ樹脂組成物がゲ
ルになるまでの時間を測定した。溶融粘度 高化式フローテスターを用い、10kgの加圧下、直径
1mmのノズルを用い、温度175℃の粘度を測定し
た。ガラス転移温度、線膨張係数 175℃、70kgf/cm2、成形時間2分の条件で
4×4×15mmの試験片を成形し、180℃で4時間
ポストキュアーしたものを用い、ディラトメーターによ
り5℃/分で昇温させることにより測定した。
[0034] Spiral flow molding temperature 175 ° C., it was measured spiral flow by transfer molding at a molding pressure of 70 kgf / cm 2. Gel time The time until the epoxy resin composition became a gel on a hot plate at 175 ° C. and 160 ° C. was measured. The viscosity at a temperature of 175 ° C. was measured using a nozzle having a diameter of 1 mm under a pressure of 10 kg using a melt viscosity increasing type flow tester. A test piece of 4 × 4 × 15 mm was molded under the conditions of a glass transition temperature, a coefficient of linear expansion of 175 ° C., 70 kgf / cm 2 and a molding time of 2 minutes, and was subjected to post-curing at 180 ° C. for 4 hours. It was measured by raising the temperature at 5 ° C / min.

【0035】次に、厚さ0.28mmのBT基板と10
mm×10mmで厚さ0.25mmの半導体素子を直径
75μmの半田ボール450個で接合した半導体装置を
図3で示されるように160℃に加熱されている金型に
セットした。次に円筒状に成形されたそれぞれの樹脂組
成物を高周波予熱機で65℃に加熱した後、プランジャ
ーポットに投入し、成形圧力40kgf/cm2で20
秒かけて注入した。注入後60秒間硬化させ、次いで金
型を開き、半導体装置を取り出した。成形で得られた半
導体装置を超音波探傷装置を用いて空隙内に完全に樹脂
組成物が充填されているか、あるいはボイドが存在して
いないかどうかを確認した。結果を表3に示す。
Next, a BT substrate having a thickness of 0.28 mm and 10
A semiconductor device in which a semiconductor element having a size of 10 mm and a thickness of 0.25 mm was joined with 450 solder balls having a diameter of 75 μm was set in a mold heated to 160 ° C. as shown in FIG. Next, each of the resin compositions formed into a cylindrical shape was heated to 65 ° C. by a high-frequency preheater, and then charged into a plunger pot, and then heated at a molding pressure of 40 kgf / cm 2 .
Injected over seconds. The injection was cured for 60 seconds, the mold was opened, and the semiconductor device was taken out. The semiconductor device obtained by molding was checked using an ultrasonic flaw detector to determine whether the voids were completely filled with the resin composition or whether there were no voids. Table 3 shows the results.

【0036】[0036]

【表3】 [Table 3]

【0037】更に、耐湿性の比較のために、従来使用さ
れている酸無水物硬化型のフリップチップ用アンダーフ
ィル材(エポキシ樹脂組成物)を用い、実施例で使用し
た半導体装置を封止した(比較例3)。酸無水物硬化型
のフリップチップ用アンダーフィル材としては下記配合
のものを用いた。 ビスフェノールA型エポキシ樹脂 50重量部 4−メチルヘキサヒドロ無水フタル酸 30重量部 平均粒径5μmで最大粒径15μmの球状シリカ 100重量部 2−フェニルイミダゾール 0.2重量部耐湿性の評価 実施例1で封止した半導体装置と比較例3で封止した半
導体装置それぞれ5個を121℃、2.1気圧のプレッ
シャークッカー容器に入れ、所定の時間ごとに取り出
し、超音波探傷装置で素子表面と封止樹脂間の剥離状態
を観察した。結果を表4に示す。
Further, for comparison of moisture resistance, the semiconductor device used in the examples was encapsulated by using a conventionally used underfill material (epoxy resin composition) for an acid anhydride-curable flip chip. (Comparative Example 3). The following composition was used as an acid anhydride-curable underfill material for flip chips. Bisphenol A type epoxy resin 50 parts by weight 4-methylhexahydrophthalic anhydride 30 parts by weight Spherical silica having an average particle size of 5 μm and a maximum particle size of 15 μm 100 parts by weight 2-phenylimidazole 0.2 parts by weight Evaluation of moisture resistance Example 1 Each of the semiconductor device sealed in Example 1 and the semiconductor device sealed in Comparative Example 3 was placed in a pressure cooker container at 121 ° C. and 2.1 atm, taken out at predetermined time intervals, and sealed with the element surface using an ultrasonic flaw detector. The state of peeling between the resin was observed. Table 4 shows the results.

【0038】[0038]

【表4】 [Table 4]

【図面の簡単な説明】[Brief description of the drawings]

【図1】半導体素子と基板が接合された状態の一例を示
す概略断面図である。
FIG. 1 is a schematic sectional view showing an example of a state in which a semiconductor element and a substrate are joined.

【図2】半田の配列例を示す平面図である。FIG. 2 is a plan view showing an example of solder arrangement.

【図3】半導体素子が搭載された基板を樹脂封止する状
態を説明する概略図である。
FIG. 3 is a schematic diagram illustrating a state in which a substrate on which a semiconductor element is mounted is sealed with a resin.

【図4】本発明により得られる半導体装置の一例を示す
概略断面図である。
FIG. 4 is a schematic sectional view showing an example of a semiconductor device obtained by the present invention.

【符号の説明】[Explanation of symbols]

1 基板 2 配線電極 3 半田 4 半導体素子 5 電極部 6 空隙部 10 金型 11 上金型 12 下金型 13 ギャビティ−部 14 プランジャー 15 ゲート部 16 封止用樹脂組成物 17 封止樹脂 18 半導体装置 DESCRIPTION OF SYMBOLS 1 Substrate 2 Wiring electrode 3 Solder 4 Semiconductor element 5 Electrode part 6 Void part 10 Die 11 Upper die 12 Lower die 13 Gavity part 14 Plunger 15 Gate part 16 Sealing resin composition 17 Sealing resin 18 Semiconductor apparatus

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 配線回路基板の配線電極に半田を介して
半導体素子の電極部を当接し、半田を加熱溶融して基板
に半導体素子を接合し、次いでこの半導体素子の搭載さ
れた基板を金型キャビティー部にセットし、封止用樹脂
組成物を溶融状態で金型のゲート部からキャビティー部
に加圧下に導入して上記基板と半導体素子との空隙部に
圧送、充填し、封止用樹脂組成物を硬化させて、上記基
板と半導体素子との空隙部を樹脂封止するようにした半
導体装置の製造方法であって、上記封止用樹脂組成物が
(a)エポキシ樹脂、(b)硬化剤、(c)最大粒径が
24μm以下の無機質充填剤を必須成分とし、(c)成
分の含有量が組成物全体の50〜85重量%であり、成
形温度での溶融粘度が200ポイズ以下であることを特
徴とする半導体装置の製造方法。
An electrode portion of a semiconductor element is brought into contact with a wiring electrode of a printed circuit board via solder, the solder is heated and melted to join the semiconductor element to the substrate, and then the substrate on which the semiconductor element is mounted is formed of gold. It is set in the mold cavity, the sealing resin composition is introduced in a molten state from the mold gate to the cavity under pressure, and is pressure-fed into the gap between the substrate and the semiconductor element, filled, and sealed. A method of manufacturing a semiconductor device in which a sealing resin composition is cured to seal the gap between the substrate and the semiconductor element with a resin, wherein the sealing resin composition comprises: (a) an epoxy resin; (B) a curing agent, (c) an inorganic filler having a maximum particle size of 24 μm or less as an essential component, a content of the component (c) is 50 to 85% by weight of the whole composition, and a melt viscosity at a molding temperature. Semiconductor device characterized by having a value of 200 poise or less. Manufacturing method.
JP11007757A 1998-02-02 1999-01-14 Manufacture of semiconductor device Pending JPH11288979A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11007757A JPH11288979A (en) 1998-02-02 1999-01-14 Manufacture of semiconductor device

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP10-35453 1998-02-02
JP3545398 1998-02-02
JP11007757A JPH11288979A (en) 1998-02-02 1999-01-14 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH11288979A true JPH11288979A (en) 1999-10-19

Family

ID=26342102

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11007757A Pending JPH11288979A (en) 1998-02-02 1999-01-14 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH11288979A (en)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002060468A (en) * 2000-08-16 2002-02-26 Sumitomo Bakelite Co Ltd Epoxy resin composition, prepreg, and copper-clad laminate using the prepreg
KR20030049284A (en) * 2001-12-14 2003-06-25 삼성전기주식회사 Package substrate for flip chip bonding
US6632320B1 (en) 1999-08-19 2003-10-14 Sony Chemicals Corp. Adhesive material and circuit connection method
JP2005194502A (en) * 2003-12-12 2005-07-21 Shin Etsu Chem Co Ltd Liquid epoxy resin composition and semiconductor device
JP2006016433A (en) * 2004-06-30 2006-01-19 Shin Etsu Chem Co Ltd Liquid epoxy resin composition for semiconductor encapsulation and flip chip semiconductor device
JP2006016431A (en) * 2004-06-30 2006-01-19 Shin Etsu Chem Co Ltd Liquid epoxy resin composition for semiconductor sealing and flip chip type semiconductor
JP2006282824A (en) * 2005-03-31 2006-10-19 Somar Corp Epoxy resin composition for protecting electronic component, and semiconductor device using the same
KR100678808B1 (en) * 2003-12-04 2007-02-05 닛토덴코 가부시키가이샤 Method for producing epoxy resin composition for semiconductor encapsulation and epoxy resin composition for semiconductor encapsulation and semiconductor device obtained thereby
JP2007217708A (en) * 2007-05-16 2007-08-30 Hitachi Chem Co Ltd Epoxy resin molding material for sealing and semiconductor device
JP2008004674A (en) * 2006-06-21 2008-01-10 Fujitsu Ltd Semiconductor device formed of semiconductor element and circuit board
US7397139B2 (en) 2003-04-07 2008-07-08 Hitachi Chemical Co., Ltd. Epoxy resin molding material for sealing use and semiconductor device
KR100966944B1 (en) * 2003-03-28 2010-06-30 스미토모 베이클리트 컴퍼니 리미티드 Epoxy resin composition and semiconductor apparatus

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6632320B1 (en) 1999-08-19 2003-10-14 Sony Chemicals Corp. Adhesive material and circuit connection method
JP2002060468A (en) * 2000-08-16 2002-02-26 Sumitomo Bakelite Co Ltd Epoxy resin composition, prepreg, and copper-clad laminate using the prepreg
KR20030049284A (en) * 2001-12-14 2003-06-25 삼성전기주식회사 Package substrate for flip chip bonding
KR100966944B1 (en) * 2003-03-28 2010-06-30 스미토모 베이클리트 컴퍼니 리미티드 Epoxy resin composition and semiconductor apparatus
US7397139B2 (en) 2003-04-07 2008-07-08 Hitachi Chemical Co., Ltd. Epoxy resin molding material for sealing use and semiconductor device
KR100678808B1 (en) * 2003-12-04 2007-02-05 닛토덴코 가부시키가이샤 Method for producing epoxy resin composition for semiconductor encapsulation and epoxy resin composition for semiconductor encapsulation and semiconductor device obtained thereby
JP2005194502A (en) * 2003-12-12 2005-07-21 Shin Etsu Chem Co Ltd Liquid epoxy resin composition and semiconductor device
JP4557148B2 (en) * 2003-12-12 2010-10-06 信越化学工業株式会社 Liquid epoxy resin composition and semiconductor device
JP2006016433A (en) * 2004-06-30 2006-01-19 Shin Etsu Chem Co Ltd Liquid epoxy resin composition for semiconductor encapsulation and flip chip semiconductor device
JP2006016431A (en) * 2004-06-30 2006-01-19 Shin Etsu Chem Co Ltd Liquid epoxy resin composition for semiconductor sealing and flip chip type semiconductor
JP2006282824A (en) * 2005-03-31 2006-10-19 Somar Corp Epoxy resin composition for protecting electronic component, and semiconductor device using the same
JP2008004674A (en) * 2006-06-21 2008-01-10 Fujitsu Ltd Semiconductor device formed of semiconductor element and circuit board
JP4732252B2 (en) * 2006-06-21 2011-07-27 富士通株式会社 Semiconductor device comprising semiconductor element and circuit board
JP2007217708A (en) * 2007-05-16 2007-08-30 Hitachi Chem Co Ltd Epoxy resin molding material for sealing and semiconductor device

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