JPH11288376A - キャッシュにおけるコ―ド変換方法 - Google Patents

キャッシュにおけるコ―ド変換方法

Info

Publication number
JPH11288376A
JPH11288376A JP11000862A JP86299A JPH11288376A JP H11288376 A JPH11288376 A JP H11288376A JP 11000862 A JP11000862 A JP 11000862A JP 86299 A JP86299 A JP 86299A JP H11288376 A JPH11288376 A JP H11288376A
Authority
JP
Japan
Prior art keywords
code
cache
chunk
pointers
chunks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP11000862A
Other languages
English (en)
Japanese (ja)
Other versions
JPH11288376A5 (enExample
Inventor
Lacky V Shah
ラッキー・ブイ・シャー
James S Mattson Jr
ジェームス・エス・マトソン，ジュニア
B Busby William
ウイリアム・ビー・バズビー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of JPH11288376A publication Critical patent/JPH11288376A/ja
Publication of JPH11288376A5 publication Critical patent/JPH11288376A5/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45504—Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Devices For Executing Special Programs (AREA)
JP11000862A 1998-01-06 1999-01-06 キャッシュにおけるコ―ド変換方法 Withdrawn JPH11288376A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US003,568 1998-01-06
US09/003,568 US6112280A (en) 1998-01-06 1998-01-06 Method and apparatus for distinct instruction pointer storage in a partitioned cache memory

Publications (2)

Publication Number Publication Date
JPH11288376A true JPH11288376A (ja) 1999-10-19
JPH11288376A5 JPH11288376A5 (enExample) 2006-03-23

Family

ID=21706488

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11000862A Withdrawn JPH11288376A (ja) 1998-01-06 1999-01-06 キャッシュにおけるコ―ド変換方法

Country Status (3)

Country Link
US (1) US6112280A (enExample)
EP (1) EP0930572A3 (enExample)
JP (1) JPH11288376A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990083691A (ko) * 1999-05-28 1999-12-06 김원선 전극봉식가습제어를포함한항온항습기제어용마이컴컨트롤러
JP2007531075A (ja) * 2003-07-15 2007-11-01 トランジティブ リミテッド プログラム・コードを変換するための共用コード・キャッシングの方法および装置

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US6349363B2 (en) * 1998-12-08 2002-02-19 Intel Corporation Multi-section cache with different attributes for each section
GB2348305A (en) 1999-03-24 2000-09-27 Int Computers Ltd Instruction execution mechanism
US6493800B1 (en) * 1999-03-31 2002-12-10 International Business Machines Corporation Method and system for dynamically partitioning a shared cache
US6591361B1 (en) 1999-12-28 2003-07-08 International Business Machines Corporation Method and apparatus for converting data into different ordinal types
US6859862B1 (en) 2000-04-07 2005-02-22 Nintendo Co., Ltd. Method and apparatus for software management of on-chip cache
US20030009750A1 (en) * 2001-07-09 2003-01-09 Robert Hundt Optimizing an executable computer program having linkage functions
US7904897B2 (en) * 2002-08-08 2011-03-08 Rudelic John C Executing applications from a semiconductor nonvolatile memory
GB2393274B (en) * 2002-09-20 2006-03-15 Advanced Risc Mach Ltd Data processing system having an external instruction set and an internal instruction set
US7124262B2 (en) * 2002-11-20 2006-10-17 Intel Corporation Selectivity pipelining and prefetching memory data
US7117306B2 (en) 2002-12-19 2006-10-03 Intel Corporation Mitigating access penalty of a semiconductor nonvolatile memory
US6781912B2 (en) * 2002-12-31 2004-08-24 Intel Corporation Providing protection against transistor junction breakdowns from supply voltage
US7103723B2 (en) * 2003-02-25 2006-09-05 Intel Corporation Priority-based code cache management
GB0316532D0 (en) * 2003-07-15 2003-08-20 Transitive Ltd Method and apparatus for partitioning code in program code conversion
US7930486B2 (en) * 2007-04-30 2011-04-19 Hewlett-Packard Development Company, L.P. Cache chunked list concrete data type
US9807468B2 (en) * 2009-06-16 2017-10-31 Microsoft Technology Licensing, Llc Byte range caching
US8516230B2 (en) * 2009-12-29 2013-08-20 International Business Machines Corporation SPE software instruction cache
US8631225B2 (en) 2010-06-25 2014-01-14 International Business Machines Corporation Dynamically rewriting branch instructions to directly target an instruction cache location
US20110320786A1 (en) 2010-06-25 2011-12-29 International Business Machines Corporation Dynamically Rewriting Branch Instructions in Response to Cache Line Eviction
US9459851B2 (en) 2010-06-25 2016-10-04 International Business Machines Corporation Arranging binary code based on call graph partitioning
US8522225B2 (en) 2010-06-25 2013-08-27 International Business Machines Corporation Rewriting branch instructions using branch stubs
US20130140807A1 (en) * 2011-12-06 2013-06-06 Gerald Milroy Van Dusen Clamp with spring loaded bolt to repair broken exhaust manifold flange bolts
CN103150197B (zh) * 2013-02-07 2016-01-20 浙江大学 基于静态划分的代码Cache管理方法
CN114817090B (zh) * 2022-06-09 2023-06-02 远峰科技股份有限公司 低ram消耗mcu通信管理方法及系统

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4382278A (en) * 1980-06-05 1983-05-03 Texas Instruments Incorporated Hierarchial memory system with microcommand memory and pointer register mapping virtual CPU registers in workspace cache #4 and main memory cache
US5420993A (en) * 1991-06-13 1995-05-30 Unisys Corporation Extended address translation system for pointer updating in paged memory systems
DE9212788U1 (de) * 1992-09-23 1992-11-05 Nordischer Maschinenbau Rud. Baader GmbH + Co KG, 2400 Lübeck Fischbearbeitungsmaschine
US5404500A (en) * 1992-12-17 1995-04-04 International Business Machines Corporation Storage control system with improved system and technique for destaging data from nonvolatile memory
US5560013A (en) * 1994-12-06 1996-09-24 International Business Machines Corporation Method of using a target processor to execute programs of a source architecture that uses multiple address spaces
US5619665A (en) * 1995-04-13 1997-04-08 Intrnational Business Machines Corporation Method and apparatus for the transparent emulation of an existing instruction-set architecture by an arbitrary underlying instruction-set architecture
US5870576A (en) * 1996-12-16 1999-02-09 Hewlett-Packard Company Method and apparatus for storing and expanding variable-length program instructions upon detection of a miss condition within an instruction cache containing pointers to compressed instructions for wide instruction word processor architectures

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990083691A (ko) * 1999-05-28 1999-12-06 김원선 전극봉식가습제어를포함한항온항습기제어용마이컴컨트롤러
JP2007531075A (ja) * 2003-07-15 2007-11-01 トランジティブ リミテッド プログラム・コードを変換するための共用コード・キャッシングの方法および装置

Also Published As

Publication number Publication date
EP0930572A3 (en) 2000-10-18
US6112280A (en) 2000-08-29
EP0930572A2 (en) 1999-07-21

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