JPH11284696A - Analog signal generator and portable telephone set with the generator mounted thereon - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent occurrence of a harmonic component when an electronic tone such as a tone signal or an incoming call tone is generated or stopped by generating a tone signal while increasing a level gradually up to a high level and stopping the tone signal while gradually decreasing the high level to the low level. SOLUTION: A variable attenuator 201 outputs a tone signal 404 that is gradually increased according to a level control signal 406 and that is faded in after an operation control signal 410 changes to an H level. An operation control circuit 301 gives an enable signal 408 to a counter 302 in response to a change in an operation control signal 410 from an H level to an L level to make it start counting. Then a signal 407 instructing count-down is fed to an increment circuit 303, which makes it decrement synchronously with a carry- over signal CLK 2. When decrement operation is finished, an operation state signal 409 is fed to the operation control circuit 301.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for generating an analog signal for generating an electronic sound such as a tone signal or a ringing signal, and a portable telephone equipped with the same. Also, the present invention relates to an analog signal generation device that prevents harmonics generated at the end of the operation, eliminates discomfort to humans, and eliminates adverse effects on other electronic circuits connected to the periphery, and a mobile phone using the same.

[0002]

2. Description of the Related Art In recent years, electronic circuits incorporated in portable telephones are mostly circuits for processing digital signals. However, electronic sounds generated when an incoming call is received or a push button is pressed are controlled by the electronic circuits. The generated digital signal is output through a speaker by an analog signal obtained by D / A conversion.

The analog incoming signal, tone signal, and the like are generated at random and terminated at random. In that case, an analog signal generated from the digital signal is supplied to a speaker, and an electronic sound is output through the speaker.

FIG. 9 is a diagram showing generation and stop of a tone signal. When an incoming call is detected or when the push button is pressed, the operation control signal for prompting the output of the electronic sound becomes H level, and accordingly, a tone signal generating circuit (not shown) outputs a tone signal. Also, when the off-hook state or the push button release state is detected, the operation control signal becomes L level, and the generation of the tone signal is stopped. While the operation control signal is at the H level, a tone signal generation circuit (not shown) generates a predetermined digital signal in synchronization with an internal clock signal, and D / A converts the digital signal to generate a tone signal.

[0005]

However, as shown in the figure, the tone signal changes from the silence level to an arbitrarily high level as the operation control signal changes to the H level. With the change to the L level, the tone signal changes from an arbitrarily high level to a silent level. Such a sharp change in the tone signal level causes a harmonic component to be generated. The harmonic component generates noise (buzz) through the speaker, and gives a feeling of discomfort to humans. In particular, when the tone signal is stopped, noise at the time of stoppage is generated in a silent state after the stoppage, so that it is more noticeably recognized by the human ear and causes discomfort. Alternatively, the harmonic component adversely affects the operation of an electronic circuit incorporated adjacently.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an analog signal generator which prevents generation of harmonic components when an electronic sound such as a tone signal or a ring tone is generated or stopped, and a portable telephone equipped with the same. It is in.

[0007]

In order to achieve the above object, the present invention increases the tone signal amplitude from a low level to a high level in response to an operation control signal instructing generation of the tone signal. It occurs. Alternatively, according to the present invention, the amplitude of the tone signal is gradually attenuated from a high level to a low level in response to an operation control signal instructing to stop the tone signal, and then the tone signal is stopped. As described above, in the tone signal generating apparatus of the present invention, in order to prevent generation of harmonics at the start or stop of the tone signal generation, the tone signal is generated at the fade-in and stopped at the fade-out. . as a result,
When a tone signal is generated or stopped, it is possible to prevent a high frequency from being generated and causing noise or malfunction. Further, one invention in the present invention is not limited to simply increasing or decreasing the amplitude level of the tone signal at the time of fade-in or fade-out, but by using a level control data table and using an arbitrary level control data table. Can be shaped. By using the level control data table, an optimum level increase or attenuation can be realized even with a simple circuit configuration. The present invention performs control such that fade-in or fade-out is performed at the start or stop of generation of an analog signal without being limited to a tone signal.

[0008] To achieve the above object, the present invention provides:
In an analog signal generating device that generates an analog signal having a predetermined frequency component in response to a control signal, when the control signal instructs the generation of the analog signal to start, the generation of the analog signal is performed by the analog signal. Starting while gradually increasing the amplitude level from zero level, or when the control signal instructs the analog signal to stop, continues generating the analog signal,
After gradually reducing the amplitude level of the analog signal,
The generation of the analog signal is stopped.

[0009]

Embodiments of the present invention will be described below with reference to the drawings. However, the technical scope of the present invention is not limited to the embodiment.

FIG. 1 is a block diagram of a portable telephone having a tone signal generator according to the present invention. The mobile phone shown in FIG. 1 includes an antenna 610, a high-frequency amplifier 620, and a modem 63.
0, access control unit 640, audio codec 650, audio interface 660, speakers 670, 6
90, a microphone 680, a CPU 700, a key input unit 710, an internal clock generation circuit 730, and a battery 740. Audio interface 6
The tone signal generator 800 is built in the 60.

For example, when a call operation is performed by a mobile phone, a push button of the key input unit 710 is pressed by the operator. In response to the depression of the push button, the CPU 700 supplies a control signal for instructing generation of a tone signal to the tone signal generator 800. In response to this control signal, tone signal generator 800 outputs the faded-in tone signal, and outputs
Supply 0. In addition, in response to the completion of the pressing down of the push button, CPU 700 supplies a control signal for stopping the tone signal to tone signal generating device 800. In response to this control signal, tone signal generator 80
0 stops the tone signal on fade out.

When an incoming call arrives at the mobile phone, the received radio wave is amplified by the high frequency amplifier circuit 620,
It is converted by 30 into a baseband signal. When the access control unit 640 detects that the received signal is for itself, the CPU 7 informs the CPU 7 that there is an incoming call.
Tell 00. In response to the incoming call, a tone signal is generated in a fade-in manner as in the case of the above-described push button, and a ring tone is output from the speaker 690. And
When the user goes off-hook by the operation button, the tone signal is stopped at the fade-out, and the ring tone is stopped.

Further, in addition to the time of the above-mentioned push-button operation, in addition to the time of the incoming call, when the capacity of the battery 740 is reduced, a predetermined tone signal is generated at the fade-in, and the process ends at the fade-out.

The coded audio digital signal in the received radio wave is decoded by an audio codec 650 and converted into an audio digital signal, and the audio digital signal is converted into an analog signal by an audio interface 660, and a speaker 670 is output as audio.

FIG. 2 is a configuration diagram of a tone signal generator which is an analog signal generator according to an embodiment of the present invention. The tone signal generator of FIG.
01 and a variable attenuation amplifier 201 that variably attenuates or amplifies the analog tone signal 403 generated by the tone signal generation unit 101. The tone signal generation unit 101 is supplied with the clock CLK and receives the tone signal generation control signal 40.
2, an analog tone signal 403 is generated. The variable attenuating amplifier 201 attenuates or amplifies the tone signal 403 in accordance with the level control signal 406 to perform fade-in generation and fade-out stop of the tone signal.

An operation control signal 410 for instructing generation and stop of a tone signal supplied from a CPU or the like is supplied to an operation control circuit 301 in the timing control unit 202. The operation control circuit 301 responds to the operation control signal 410 instructing generation of the tone signal, and outputs the tone signal generation control signal 4
02 is output. The operation control circuit 301 supplies an enable signal 408 to the counter 302 in response to the operation control signal 410. The counter 302 counts the internal clock CLK in response to the enable signal 408, and supplies the carry-over output CLK2 to the increment circuit 303. The increment circuit 303 outputs the count-up / down signal 40 from the operation control circuit 301.
7 and its count-up / down signal 407
Count-up or count-down is performed in synchronization with carry-over output CLK2. The output 405 of the increment circuit 303 is supplied to the level control data storage (level control data table) 304 in the level control signal generator 203 as an address signal. The address signal 405 is held in the latch circuit 305 in the level control signal generator 203, and is, for example, a 4-bit digital signal. Further, the increment circuit 303 outputs an operation state signal 409 indicating that the increment or the decrement has been completed to the operation control circuit 30.
Output to 1.

The level control signal generation section 203 converts the address signal 405 linearly incremented or decremented in synchronization with the clock CLK into a level control signal 4
It has a level control data storage unit 304 for converting the data to 06, and a latch circuit 305 for holding the address signal 405. The level control signal 406 is supplied to the variable attenuation amplifier 201, and the tone signal (first analog signal) 403 generated by the tone signal generator 101 is converted to the level control signal 40.
The tone signal (second analog signal) 404 that is attenuated or amplified in accordance with 6 and fades in or out is generated.

FIG. 3 is a timing chart showing the operation of the tone signal generator of FIG. In FIG. 3, an operation control signal 410 indicates generation of a tone signal at an H level.
An instruction to stop the tone signal is issued at the L level.

At time t1, the operation control signal 410 changes from the L level to the H level to instruct generation of a tone signal. In response to the operation control signal 410, the operation control circuit 301 sends the tone signal generation control signal 402 to the tone signal generator 101 and the enable signal 408 to the counter 30.
2 and the count-up signal 407 are supplied to the increment circuit 303. Tone signal generation section 101 starts outputting tone signal 403 having a constant amplitude level in response to tone signal generation control signal 402.

The counter 302 has an enable signal 408
, The count of the clock CLK is started, and the carry-over signal CLK2 is output every predetermined number of clocks CLK. Then, the increment circuit 303 performs an increment operation in synchronization with the carry-over signal CLK2 in accordance with the signal 407 instructing the increment, and outputs an address signal 405 that is linearly incremented in synchronization with the clock CLK. The address signal 405 is
For example, in the case of 4 bits, it becomes a 4-bit binary signal corresponding to 1 to 16 in order. Increment circuit 3
03, when the increment is completed at time t2, the operation control circuit 30 indicates that the increment has been completed by the operation state signal 409.
Give to 1. The operation control circuit 301 disables the enable signal 408 to the counter 302 in response to the operation state signal 409 indicating the end. as a result,
The counter 302 stops, and the increment circuit 303 stops.

The level control data storage section 304 is a memory table in which 16 types of level control signals 406 are recorded corresponding to the address signals 405. The level control signal 406 is an m-bit binary signal, and in the example of FIG. 3, is a 3-bit binary signal. As shown in the example of FIG. 3, in response to the address signal 405 that increases linearly, the level control data storage unit 304 sets the level control signal 406 as a decimal 1,1,1,2,2,2,
3, 3, 4, 5,..., 7 and 8 are output as 3-bit binary signals. That is, while the address signal 405 is linearly incremented in synchronization with the clock CLK, the level control signal 406 changes so as to realize an arbitrary amplification control curve. The example of the level control signal 406 shown in FIG. 3 has such a change that the amplitude level is slowly increased immediately after the time t1, then rapidly increased, and finally, the amplitude level is slowly increased again immediately before the time t2. That is, the level of the tone signal 404 changes in a shape along a so-called S-shaped curve.

In accordance with the level control signal 406, the variable attenuation amplifier 201, which is an electronic volume circuit, outputs a tone signal 404 whose level gradually increases from time t1 to time t2. As a result, the operation control signal 410
Is changed to the H level, a tone signal 404 that fades in is generated, and generation of a high-frequency component is prevented.

On the other hand, at time t3, the operation control signal 410
Changes from the H level to the L level. In response,
The operation control circuit 301 supplies the enable signal 408 to the counter 302 to start the counting operation. However,
At time t3, the operation control circuit 301 keeps generating the tone signal 403 without changing the tone signal generation control signal 402 to the L level. Further, the operation control circuit 30
1 supplies a signal 407 instructing a countdown to the increment circuit 303, and the carry-over signal CLK
The decrement operation is performed in synchronization with 2. As a result, the address signal 405 changes as a 4-bit binary signal corresponding to 16 to 1 as shown in FIG.

When the decrement operation is completed at time t4, the increment circuit 303 outputs the operation state signal 4
09 is supplied to the operation control circuit 301 to notify that effect.
In response to the operation state signal 409, the operation control circuit 30
1 changes the tone signal generation signal 402 to L level, and stops the output of the tone signal 403 from the tone signal generation unit 101.

When address signal 405 is sequentially decremented from time t3 in synchronization with clock CLK2, level control signal 406 corresponding to address signal 405 is decremented.
Is output from the level control data storage unit 304. In the example shown in FIG. 3, a 3-bit level control signal 406 is used.
Is the decimal number 8, 8, 8, 7, 7, 7, 6, 6, 5,
4. The binary value corresponding to 2, 1, 1 changes. That is, the voltage gradually decreases immediately after time t3, then decreases rapidly, and finally decreases again immediately before time t4.
The level control signal 406 changes. Also in this example, the level of the tone signal 404 is controlled so as to draw an S-shaped curve.

At time t4, when the level of the tone signal 404 approaches zero, the tone signal generation control signal 40
2 changes to the L level, and the tone signal generator 101 stops the level of the tone signal 403 at the intermediate level when there is no sound. As a result, the tone signal from the speaker 690 stops completely.

As described above, when the generation of the tone signal is instructed by the operation control signal 410, from the time t1 to the time t1
By 2, the tone signal 404 is controlled so that its level gradually increases from an intermediate value during silence (amplitude level zero) according to the level control signal 406 stored in the level control data storage unit. Therefore, fade-in of the tone signal is realized. Further, when the stop of the tone signal is instructed by the operation control signal 410, from time t3 to t4
By then, the tone signal 404 has decreased from the maximum amplitude level to a median value during silence according to the level control signal 406. As a result, fade-out of the tone signal is realized.

The timing control section 202 of the tone signal generator of FIG.
02, the carry-over signal CLK2 is incremented or decremented by an increment circuit. However, the counter 302 may be built in the increment circuit 303. If the clock CLK is low speed, the counter 302 is unnecessary.

FIG. 4 is a diagram showing a configuration example of the tone signal generator 101. In this example, a counter 502 to which an internal clock CLK is supplied, and an increment circuit 50 to which a carryover signal CO from the counter 502 is supplied
3 is provided. Further, an address signal 5 output from the increment circuit 503 is output.
04, a tone data storage unit 505 that outputs a digital tone signal 506, and a digital tone signal 50.
And a D / A converter 508 that performs D / A conversion on C.6 and outputs an analog tone signal 403. The tone data storage unit 505 is a table memory in which an m-bit digital tone signal 506 corresponding to an n-bit address signal 504 is recorded.

An operation control signal 402 is supplied to the tone signal generator 101. In this example, the operation control signal
When 02 is at the H level, the operation of the increment circuit is enabled, and when the operation control signal 402 is at the L level, the operation is disabled and reset.

FIG. 5 is a diagram for explaining the operation of the tone signal generator. When the operation control signal 402 changes to the H level, the increment circuit 503 sequentially changes, for example, the 4-bit address signal 504 to a binary signal corresponding to a decimal number from 1 to 16. The address signal 504
Is a decimal number 0, 3, 5, 8, 8, 5, 3, 3 in this example.
0, 0, -3, -5. . . And change. Here, the state where the digital tone signal 506 is 0 corresponds to an intermediate value at the time of silence. When the digital tone signal 506 is D / A converted by the D / A converter 508, as shown in FIG.
The tone signal 403 is an analog sine wave signal. When the control signal 402 becomes L level, the increment circuit 503 is reset, the address signal 504 becomes a binary signal corresponding to, for example, 1, the digital tone signal 506 becomes 0, and the intermediate level is maintained.

FIG. 6 is a diagram showing a modification of the tone signal generator shown in FIG. In the tone signal generator of FIG. 5, the level control signal generator 203 of the example of FIG. 2 is omitted. That is, the linearly increasing and decreasing output signal from the increment circuit 303 is directly sent to the variable attenuation amplifier 201 as an electronic volume as the level control signal 406.
Supplied to Therefore, the address signal 405 that linearly increases in synchronization with the carry-over signal CLK2 of the counter and is shown in the timing chart of FIG. 3 is used as the level control signal 406. As a result, the tone signal 404 that has been variably attenuated becomes an analog signal whose amplitude level increases linearly.

On the other hand, when the tone signal is stopped, the increment circuit 303 decrements the address signal 40.
5 as the level control signal 406
1 and the amplitude level of the tone signal 404 decreases linearly and stops.

FIG. 7 is a block diagram of a tone signal generator according to another embodiment. The example of FIG. 7 differs from FIG. 2 in that the tone signal generation unit 10 uses the level control signal 406.
Within 1, the level is gradually increased at the start of tone signal generation, and is gradually decreased when the tone signal is stopped. Therefore, in the example of FIG. 7, the variable attenuation amplifier 201 is not used.

The tone signal generator 101 shown in FIG.
Is a multiplier 50 between the D / A converter 508 and the tone data storage 505 of the tone signal generator shown in FIG.
9 is added. The m-bit level control signal 406 from the level control data storage unit is supplied to the multiplier 509.
Is supplied. The timing control unit 202 shown in FIG.
Circuit has the same configuration. The level control signal generator 203 in FIG. 7 has the same configuration as in FIG. 2, but the level control data storage unit 304 stores multiplier data provided to the multiplier 509 as level control data 406.

As described with reference to FIG. 5, the tone signal generator 1
In 01, the tone data storage unit 505 generates a digital tone signal 506A according to the address 504 output from the increment circuit 503. This digital tone signal 506A is a signal having a large amplitude level. Therefore, in the present embodiment, the level is gradually increased when the tone signal is generated, and the level is gradually increased when the tone signal is stopped by multiplying the digital tone signal 506A by the level control signal 406 in the multiplier 509. Generates a digital tone signal 506B that gradually decreases.
This digital tone signal 506B is supplied to the D / A converter 50.
In step 8, the digital tone signal is converted into an analog tone signal 403. This analog tone signal 403
Is a signal whose level gradually increases when a tone signal is generated and gradually decreases when the tone signal is stopped, similarly to the tone signal 404 in FIG.

Unlike the case of FIG. 3, the level control data storage section 304 stores m-bit multiplication data for generating the digital tone signal 506B.

In the above-described embodiment, at the stage of the digital signal in the tone signal generator 101, processing is performed so that the fade-in and fade-out of the analog tone signal are realized, as shown in FIG. There is no need to provide a variable attenuation amplifier.

FIG. 8 is a block diagram of a tone signal generator according to a modification of FIG. In the example shown in FIG.
At the stage of the digital signal in 01, signal processing is performed so that fade-in and fade-out are realized. FIG.
7, the level control data storage unit 304 is omitted and the output of the increment circuit 303 is used as the level control signal 406 as compared with the example of FIG.
01 is supplied to the shift circuit 510. Shift circuit 5
10 shifts the digit of the m-bit digital tone signal 506A in accordance with the data of the level control signal 406, and generates a digital tone signal 506B when a tone signal is generated.
Is 1/16, 1/1 of the signal 506A, for example.
The processing is performed so as to be 8, 1/4, 1/2, 1 time, 2 times, 4 times, and 8 times. Conversely, when the tone signal is stopped, the level of the digital tone signal 506B is, for example, 8 times, 4 times, 2 times, 1 time, 1/2, 1/4, 1/8, 1 of the signal 506A.
/ 16. That is, the shift circuit 510 is controlled by the shift amount of the digit of the digital tone signal 506A.
, The level of the digital tone signal 506B is simply faded in and out.

As described above, when an electronically generated analog signal such as a tone signal is generated and stopped, a fade signal is generated.
By performing the in and fade out, generation of harmonics in the electronic sound whose start and stop are controlled at random timing is prevented. Fade-in and fade-out can be performed by variably amplifying and attenuating an analog signal generated from digital data using an electronic volume. Further, even if an electronic volume is not used, an analog signal that fades in and out can be generated by processing the digital value at the stage of digital data. In particular, by making the analog signal fade out when stopped,
Eliminates noise (buzz) caused by harmonics,
Discomfort to humans is prevented.

[0041]

As described above, according to the present invention, the amplitude level of an electronic analog signal such as a tone signal is gradually increased when a signal is generated, and gradually reduced when the signal is stopped, so that a steep level change occurs. Can be eliminated, and generation of harmonic components at the time of signal generation or signal stop can be prevented. As a result, it is possible to generate an analog signal that is free from noise and does not cause discomfort. Further, it is possible to prevent an operation failure in an adjacent circuit due to a harmonic component.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a mobile phone having a tone signal generator according to the present invention.

FIG. 2 is a configuration diagram of a tone signal generation device according to an embodiment of the present invention.

FIG. 3 is a timing chart showing an operation of the tone signal generator of FIG. 2;

FIG. 4 is a diagram illustrating a configuration example of a tone signal generation unit 101;

FIG. 5 is a diagram illustrating an operation of a tone signal generation unit.

FIG. 6 is a diagram showing a modification of the tone signal generator shown in FIG. 2;

FIG. 7 is a configuration diagram of a tone signal generator according to another embodiment.

FIG. 8 is a configuration diagram of a tone signal generation device according to a modification of FIG. 7;

FIG. 9 is a diagram showing generation and stop of a tone signal.

[Explanation of symbols]

 Reference Signs List 101 Tone signal generation unit 201 Variable attenuation amplifier 202 Timing control unit 203 Level control signal generation unit 303 Increment circuit 304 Level control data storage unit (table) 403 First analog tone signal 404 Second analog tone signal 505 Tone data storage unit 506 Digital tone signal 506A First digital tone signal 506B Second digital tone signal 508 D / A converter

Claims (16)

[Claims] 1. An analog signal generator for generating an analog signal having a predetermined frequency component in response to a control signal, wherein when the control signal instructs the analog signal to stop, the analog signal is generated. An analog signal generating apparatus, wherein the generation of the analog signal is stopped after the amplitude level of the analog signal is gradually reduced. 2. An analog signal generating apparatus for generating an analog signal having a predetermined frequency component in response to a control signal, comprising: when the control signal instructs start of generation of the analog signal, generation of the analog signal. In which the amplitude level of the analog signal is gradually increased from the zero level. 3. An analog signal generating device for generating an analog signal having a predetermined frequency component in response to a control signal, wherein when the control signal instructs start of generation of the analog signal, generation of the analog signal is performed. Is started while gradually increasing the amplitude level of the analog signal from the zero level. When the control signal instructs the analog signal to stop, the generation of the analog signal is continued, and the amplitude level of the analog signal is increased. An analog signal generation device characterized in that the generation of the analog signal is stopped after gradually decreasing. 4. An analog signal generator for generating an analog signal having a predetermined frequency component in response to a control signal, wherein the first analog signal having a predetermined amplitude level is generated using a supplied clock. An analog signal generator that variably attenuates or amplifies the amplitude level of the first analog signal and outputs a second analog signal; and a response signal to the control signal instructing signal generation start. And causing the analog signal generator to start generating the first analog signal for a predetermined period in response to the control signal instructing the signal to stop. A level control signal for gradually attenuating the amplitude level of the first analog signal during the predetermined period; Analog signal generating apparatus characterized by having a part. 5. The control unit according to claim 4, wherein the control unit includes an increment circuit for incrementing or decrementing in synchronization with a clock, an output of the increment circuit as an address signal, and a desired amplitude level corresponding to the address signal. A level control data storage unit for storing the level control signal enabling attenuation, wherein the level control signal is output by operating the increment circuit during a predetermined period when the signal is stopped. Signal generator. 6. The control unit according to claim 4, wherein the control unit has an increment circuit that increments or decrements in synchronization with a clock, and operates the increment circuit during a predetermined period when the signal is stopped to output the output of the increment circuit. Is supplied as the level control signal. 7. An analog signal generator for generating an analog signal having a predetermined frequency component in response to a control signal, wherein the first analog signal having a predetermined amplitude level is generated using a supplied clock. An analog signal generator that variably attenuates or amplifies the amplitude level of the first analog signal and outputs a second analog signal; and a response signal to the control signal instructing signal generation start. , Causing the analog signal generation unit to start generating the first analog signal, and setting the first analog signal in a predetermined period after the start of the generation.
A control unit for supplying a level control signal for gradually increasing the amplitude level of the analog signal to the variable attenuation amplifier. 8. The control unit according to claim 7, wherein the control unit includes an increment circuit for incrementing or decrementing in synchronization with a clock, an output of the increment circuit as an address signal, and a desired amplitude level corresponding to the address signal. A level control data storage unit for storing the level control signal enabling the increase, wherein the level control signal is output by operating the increment circuit in a predetermined period at the start of the signal generation. Analog signal generator. 9. The control unit according to claim 7, wherein the control unit has an increment circuit that increments or decrements in synchronization with a clock, and operates the increment circuit during a predetermined period when the signal is stopped to output the output of the increment circuit. Is supplied as the level control signal. 10. An analog signal generator for generating an analog signal having a predetermined frequency component in response to a control signal, comprising: an increment circuit for incrementing or decrementing in synchronization with a supplied clock, and an output of said increment circuit. And a tone data storage unit for outputting a first digital signal having a predetermined waveform corresponding to the address signal, and a digital signal for converting the first digital signal from digital to analog to generate the analog signal An analog signal generator having an analog converter; and in response to the control signal instructing the start of signal generation, causing the analog signal generator to start generating the first analog signal and instruct signal stop. In response to the control signal, the analog signal generation unit is provided with the And a control section for supplying a level control signal to the analog signal generation section for continuously generating the analog signal of the first digital signal and gradually attenuating the amplitude level of the first digital signal during the predetermined period. Signal generator. 11. The analog signal generation unit according to claim 10, wherein the analog signal generation unit has a multiplier between the tone data storage unit and a digital-to-analog converter, and the multiplier converts the first digital signal into a digital signal. An analog signal generator, comprising: multiplying the supplied level control signal; and supplying the multiplied second digital signal to the digital-to-analog converter. 12. The analog signal generator according to claim 10, wherein the analog signal generator has a shift circuit between the tone data storage and a digital-to-analog converter.
An analog signal, wherein the shift circuit shifts the first digital signal according to the supplied level control signal, and supplies the shifted second digital signal to the digital-to-analog converter. Generator. 13. An analog signal generator for generating an analog signal having a predetermined frequency component in response to a control signal, comprising: an increment circuit for incrementing or decrementing in synchronization with a supplied clock; and an output of said increment circuit. And a tone data storage unit for outputting a first digital signal having a predetermined waveform corresponding to the address signal, and a digital signal for converting the first digital signal from digital to analog to generate the analog signal An analog signal generator having an analog converter; and in response to the control signal instructing start of signal generation, causing the analog signal generator to start generating the first analog signal. In the predetermined period, the first
And a control section for supplying a level control signal for gradually increasing the amplitude level of the digital signal to the analog signal generation section. 14. The digital signal according to claim 13, wherein the analog signal generator has a multiplier between the tone data storage and the digital-to-analog converter. An analog signal generator, comprising: multiplying the supplied level control signal; and supplying the multiplied second digital signal to the digital-to-analog converter. 15. The analog signal generator according to claim 13, wherein the analog signal generator has a shift circuit between the tone data storage and a digital-to-analog converter.
An analog signal, wherein the shift circuit shifts the first digital signal according to the supplied level control signal, and supplies the shifted second digital signal to the digital-to-analog converter. Generator. 16. A mobile phone comprising: the analog signal generator according to claim 1; and a speaker to which the analog signal is supplied and outputs an electronic sound.