JPH11282433A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable executing a prescribed work in a vertical blanking period by which a signal indicating a pseudo scanning period is generated, by providing a means for monitoring the signal indicating a scanning period and the means for generating the signal indicating the pseudo scanning period by means of the omission of the signal indicating the scanning period of the former means. SOLUTION: The monitor means 2 monitors the signal DE indicating the scanning period from the signal which is obtained with reception terminals 3 and 4 for receiving a data signal and a timing signal, etc., from an equipment such as a personal computer and a word processor and with a control means 6 if necessary. The signal generating means 5 generates the signal RD indicating the pseudo scanning period by the omission of the signal indicating the scanning period of the means 2 for monitoring the signal DE indicating the scanning period. The means 6 reproduces the data signal and the various kinds of control signals if necessary from the signal which is obtained with the reception terminals 3 and 4 and outputs the data signals and kinds of control signals to a liquid crystal cell driving circuit consisting of a canning circuit 11 connected to a gate electrode group and a signal circuit 12 connected to a source electrode group.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a liquid crystal display device suitable for an active matrix.

[0002]

2. Description of the Related Art Conventionally, in a liquid crystal display device, various devices for improving image quality have been made as disclosed in Japanese Patent Application Laid-Open No. 5-6151. In the driving of a liquid crystal cell having a switching element for each pixel, which is called an active matrix type, if a voltage is applied during the scanning time, the display is maintained by the subsequent voltage holding effect. The big problem is how to apply and what kind of voltage to apply.

[0003]

Therefore, when applying a voltage during scanning, various measures are taken to lengthen the application time, and a plurality of voltage values are used for the applied voltage. However, for these reasons, it is not sufficient to perform signal processing only during line-sequential scanning, and processing is required at a predetermined timing even in a vertical flyback period.

[0004]

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and includes means for monitoring a signal indicating a scanning period, and means for monitoring a signal indicating the scanning period. Means for generating a signal indicating a pseudo scanning period due to a lack of a signal indicating the above.

Further, according to the present invention, two scanning means for counting the length of the signal indicating the scanning period and the counting means are used alternately to determine the state of the signal indicating the scanning period after the predetermined counting. Control means for determining a lack of a signal indicating a period, generating a signal indicating a pseudo scanning period based on the lack of a signal indicating a scanning period, and providing a predetermined signal to a liquid crystal cell driving circuit based on the signal indicating the pseudo scanning period; It is provided with.

The present invention further provides means for counting the length of a vertical blanking period, means for detecting that a vertical blanking period has been entered, and output of means for detecting that a vertical blanking period has been entered. Means for generating a signal indicating a pseudo scanning period by
A means for counting a length of a retrace period based on an output of a means for generating a signal indicating the pseudo scanning period, determining a predetermined timing and providing a predetermined signal to a liquid crystal cell driving circuit. More preferably, the means for giving a predetermined signal causes the liquid crystal cell driving circuit to operate such that a voltage of a substantially intermediate value of gradation is applied to the electrode of the liquid crystal cell for scanning performed at the beginning of the screen. is there.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram of a liquid crystal display device according to an embodiment of the present invention. Reference numeral 10 denotes an active matrix type liquid crystal cell, which has an active element such as an a-Si TFT for each pixel and is provided between substrates. The liquid crystal layer is sandwiched. The liquid crystal cell 10 is connected to a liquid crystal cell driving circuit including a scanning circuit 11 connected to a group of gate electrodes and a signal circuit 12 connected to a group of source electrodes.

[0008] Reference numeral 2 denotes a signal DE which indicates a scanning period from signals obtained via the receiving units 3 and 4 for receiving data signals, timing signals, and the like from devices such as personal computers and word processors, and control means 6 as necessary. Receiving means 3,
Reference numeral 4 may be a simple terminal or a buffer, but may be a circuit including a waveform shaping circuit and an error correction circuit, or an I / O port. Reference numeral 5 denotes a unit for generating a signal RD indicating a pseudo scanning period due to the lack of the signal indicating the scanning period of the unit 2 for monitoring the signal indicating the scanning period. Reference numeral 6 denotes a gate electrode group that reproduces data signals and various control signals as necessary from signals obtained from devices such as personal computers and word processors via the receiving units 3 and 4 or generates new control signals and the like. And a control circuit that outputs these data signals and various control signals to a liquid crystal cell driving circuit including a scanning circuit 11 connected to the LCD and a signal circuit 12 connected to the source electrode group.

The control means 6 supplies a predetermined signal to the liquid crystal cell drive circuit based on a signal indicating the pseudo scanning period, counts the length of the vertical blanking period, and determines a predetermined timing. There are provided a means for supplying a predetermined signal to the liquid crystal cell driving circuit, a storage means 63 for storing a signal of a voltage having an intermediate gradation value, and the like. This control means 6
Are integrated in one integrated circuit element 13 together with the means 2 for monitoring the signal DE indicating the scanning period and the means 3 for generating the signal indicating the pseudo scanning period, which are not clearly hardware independent. Is preferred.

In these configurations, the means 2 for monitoring the signal DE indicating the scanning period and the means 5 for generating the signal indicating the pseudo scanning period have a configuration as shown in FIG. 2, for example. First, two counting means for counting the length of the signal indicating the scanning period, specifically, counters 21 and 22 having gates (G) at the front and back, and the scanning period after a predetermined count are alternately used by using the counting means. Means for determining the lack of the signal indicating the scanning period by determining the state of the indicated signal, specifically, a register 23 for storing a predetermined numerical value and a coincidence determination circuit 24 are provided. The counters 21 and 22 respond to a flip-flop 25 which responds to the rise of the signal DE indicating the scanning period, and determine how many dot clocks (XCLK) are present in the period of the signal indicating the scanning period (for example, the display driver of the device). Is set to be 512), and when the counting result exceeds 768, the coincidence determination circuit 24 outputs an output.

In these configurations, a means for generating a signal indicating a pseudo scanning period due to a lack of a signal indicating a scanning period, specifically, an arithmetic unit 51 and a counter 52 comprising a self-reset type preset counter are provided. A function output buffer (for example, a selector port) that outputs a signal indicating a scanning period, a signal indicating a pseudo scanning period, and a signal indicating a generation period of a signal indicating a pseudo scanning period while shaping the waveform as necessary. The output stage 53 is provided, and when a signal indicating the scanning period is lost, the arithmetic unit 51 calculates a time difference from the determination time to a delimiter time corresponding to the scanning time, and outputs a dot clock (XCL) corresponding to the time.
From the counting of K), the counter 21 is used by the counter 52,
22 and counts and resets based on the count value of the dot clock (XCLK) indicating the original scan time remaining in any of the scan timings 22 to obtain the timing of the pseudo scan period.

The operation of the liquid crystal display device having such a configuration will be described. First, power and various signals are obtained from the device by turning on the device. The counter 61 of the control means 6 counts the length of the vertical retrace period from the lack of the vertical flyback signal or the signal DE indicating the scanning period, The length of the vertical blanking period is, for example, the number (number) n of signals DE indicating the scanning period, and the value is stored in the vertical period register 62. In the above-described configuration, the means for judging the lack of the signal indicating the scanning period by the means 2 for monitoring the signal DE indicating the scanning period is also a means for detecting the start of the vertical blanking period.

Referring to FIG. 3, a signal DE indicating a scanning period obtained from a device or obtained by signal processing thereafter indicates an effective pixel signal (data) transmission period for each scanning line. During the H level period 3a, it indicates that pixel signals for one scan (line) are transmitted in synchronization with the dot clock. The flip-flop 21 outputs a waveform as shown in FIG. 3B at the output Q and an inverted waveform at the output Q bar in response to the rising edge of the signal DE indicating the scanning period, and the gate (G ) Are alternately opened and closed, and the counter is reset at the moment when the designated gate is opened, whereby the length of the signal DE indicating the scanning period is counted by the dot clock (XCLK). For example, if the gate is reset at the rising edge and the gate (G) is opened at the H level, the counters 21 and 22 alternately count at the arrow portions as shown in FIGS. In ()), basically, the counters 21 and 22 count 512 in the above example and switch to the counter of the other party. If necessary, the contents of the two counters 21 and 22 at the end of counting may be compared and used for correction of clock deviation and error correction.

In the vertical blanking period, since the signal DE indicating the scanning period is not inverted, the counter 22 continues counting, for example, in the example shown in FIG. 3D. When the number reaches the number 768 stored in the register 23, the output of the coincidence determination circuit 24 is inverted (FIG. 3E). That is, the lack of the signal indicating the scanning period is determined by alternately using the counting means, and by setting the number in the register 23 to a predetermined number, it is determined that the period is the vertical blanking period. At this time, if a signal indicating the pseudo scanning period is generated immediately, it will deviate from the original 512 dot clock position. Therefore, the selector 27 reads the count value 512 of the signal DE indicating the original scanning period from the counter 22 that has stopped counting, and outputs the signal DE indicating the original scanning period.
The operation unit 51 calculates the position.

For example, a counter 21 that counts 768
Signal D indicating the original scanning period based on the start of counting
The position of E is 512, 1024, 1536, 2048 ...
Since the signal indicating the original scanning period should be generated at that timing, the counter 52 is preset so that the signal indicating the pseudo scanning period can be started after 256 dots clock from 768 during the current counting. At the same time, the inverted output of the match determination circuit 24 opens the gate G of the counter 52, so that the counter 52 counts up to the preset value. The OR output MDE of the signal DE indicating the scanning period and the signal indicating the pseudo scanning period of the output stage 53 is constant only by omitting the first waveform in which the signal DE indicating the scanning period is missing as shown in FIG. Can be maintained.

Accordingly, the control means 6 performs the capacitive coupling drive at the gate output of the last line, for example, as shown in FIG. 3g, based on the output e of the coincidence determination circuit 24 and the signal indicating the pseudo scanning period. In this case, the voltage correction of the last line can be performed at exactly the same timing t as the other lines. Also, the length n of the vertical retrace period counted earlier
In order to apply a precharge to the liquid crystal cell 10 before the end of the vertical blanking period, scanning can be started and data for the scanning can be generated. The example of FIG. 3H shows a data set when a predetermined signal is supplied to the liquid crystal cell driving circuit two scans before the start of the scan (n-1) and n. In this case, if data of 256 gradations is handled, it is considered that black data is better in terms of precharging. However, the actual image signal of the first scanning line has not arrived at this time and the image signal Since it is unknown whether the data is close to white or close to black, the first scan of the screen (approximately the first scan), such as applying data of the 127th gradation in n-1 and n periods, rather than handling black data It is preferable to operate the liquid crystal cell driving circuit so as to apply a voltage of an intermediate value of gradation to the electrodes of the liquid crystal cell 10 (scanning lines). However, the data may be used by pre-reading, or may be predicted from the previous screen and used for precharging.

[0017]

As described above, according to the present invention, a signal indicating the scanning period is also generated in the vertical blanking period in a pseudo manner.
It is easy to take the desired timing in the vertical flyback period,
The display quality of the liquid crystal cell display can be maintained high.

[Brief description of the drawings]

FIG. 1 is a block diagram of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a block diagram of a main part of FIG.

FIG. 3 is a diagram illustrating the state of FIG. 2;

[Explanation of symbols]

 Reference Signs List 10 liquid crystal cell 11 scanning circuit 12 signal circuit 2 means for monitoring signal indicating scanning period 5 means for generating signal indicating pseudo scanning period 6 control means

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Yutaka Nojiri 3-201 Minamiyoshikata, Tottori City, Tottori Prefecture Inside Sanyo Electric Co., Ltd. (72) Inventor Kazuki Asai 3-201 Minamiyoshikata, Tottori City, Tottori Sanyo Electric Tottori Inside the corporation

Claims (4)

[Claims] A means for monitoring a signal indicating a scanning period;
A liquid crystal display device comprising: a means for monitoring the signal indicating the scanning period; and a means for generating a signal indicating the pseudo scanning period due to a lack of the signal indicating the scanning period. 2. A method for counting the length of a signal indicating a scanning period.
The missing of the signal indicating the scanning period is determined by determining the state of the signal indicating the scanning period after the predetermined counting by using the two counting units and the counting unit alternately, and the pseudo scanning is performed based on the lack of the signal indicating the scanning period. Generate a signal indicating the period,
Control means for providing a predetermined signal to a liquid crystal cell drive circuit based on a signal indicating a pseudo scanning period. 3. A means for counting the length of the vertical retrace interval,
Means for detecting that a vertical blanking period has been entered; means for generating a signal indicating a pseudo scanning period based on an output of the means for detecting that the vertical blanking period has entered; A liquid crystal display device comprising: means for determining a predetermined timing from a means for counting the length of the retrace period based on an output of the generating means and providing a predetermined signal to a liquid crystal cell driving circuit. . 4. The liquid crystal cell driving circuit according to claim 1, wherein the means for applying the predetermined signal applies a voltage having a substantially intermediate value of gradation as a precharge to an electrode of the liquid crystal cell for scanning performed at the beginning of the screen. The liquid crystal display device according to claim 3, wherein the liquid crystal display device operates.