JPH11265933A - Producing method for semiconductor device and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To keep electrically improved insulating property even when element separate width is reduced. SOLUTION: Before filling a trench groove 3 on a silicon substrate 1 with filling formed by CVD using ozone-tetraethoxysilane, a side wall 5 composed of a material (silicide, for example,) having the growing speed of filler 6 due to CVD using ozone-tetraethoxysilane higher than that of a silicon nitride film 11 is selectively formed on the side wall of the trench groove 3. Thus, the generation of void in the filler 6 can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an STI (Shallow Tren)
The present invention relates to a semiconductor device having a groove on the surface of a silicon substrate such as an isolation structure and a method for manufacturing the same.

[0002]

2. Description of the Related Art In recent years, the size of a semiconductor device has been reduced in accordance with high integration and high speed of the semiconductor device. Current,
The degree of integration of a semiconductor memory, which represents the advance in the technology of miniaturization of semiconductor devices, is 256 megabit memory or 1 gigabit memory. in use.

With the miniaturization and high speed operation of semiconductor devices, the size of semiconductor devices (for example, MOSFET transistors) has been reduced, and the demand for reduction of the minimum line width and pitch size of element isolation has increased. As an element isolation structure suitable for such a demand for miniaturization, STI (Shallow Trench Isolation) is used.
latioin) has been developed. In this method, a trench is formed between elements, and the formed trench is filled with an insulator.

In the STI structure, as the semiconductor device is miniaturized, the aspect ratio (groove depth / minimum groove width) of the trench is increasing. There is a need for a technique for reliably filling with an insulator. As a method of filling an insulator capable of meeting such a demand, a CVD method using ozone-tetraethoxysilane has been receiving attention.

[0005] C using ozone-tetraethoxysilane
Since the VD method is superior to other filling methods (for example, other CVD methods) in filling uniformity (performance of whether or not a fine structure can be filled in every corner), the trench is fine and has a large aspect ratio. This method is suitable as a method for filling a trench with an insulator. Conventionally, attempts have been made to fill a trench groove with silicon oxide as an insulator by this CVD method.

[0006]

However, in the STI structure formed by the CVD method using ozone-tetraethoxysilane, as the trench groove is further miniaturized, voids are formed inside the silicon oxide to be filled. There has been a problem that bubbles are generated and the filling of the insulator becomes uncertain, which causes deterioration of characteristics of the semiconductor device.

An object of the present invention is to provide an element isolation method capable of reliably performing element isolation even in a semiconductor device with advanced miniaturization.

[0008]

According to the present invention, a groove is formed in a silicon substrate having a film, and the groove is formed by a filler made of an insulator formed by a CVD method using ozone-tetraethoxysilane. A method of manufacturing a semiconductor device to be filled, wherein a growth rate of the filler by a CVD method using ozone-tetraethoxysilane is higher than that of the film before filling the groove with the filler. Is selectively formed on the side wall of the groove, thereby achieving the above object.

[0009]

DETAILED DESCRIPTION OF THE INVENTION According to the first aspect of the present invention, a groove is formed in a silicon substrate having a coating.
What is claimed is: 1. A method of manufacturing a semiconductor device in which a groove is filled with an insulator formed by a CVD method using ozone-tetraethoxysilane, wherein the groove is filled with the ozone-tetraethoxysilane before filling the groove with the filler. Sidewalls made of a material having a growth rate of the filler by the CVD method using ethoxysilane that is faster than that of the coating are selectively formed on the side walls of the groove, thereby having the following effects.
That is, it is considered that the causes of voids in the filler filling the grooves are as follows. That is, at the time of filling of the filler, the upper layer side of the filler is completed before the lower layer side and the upper layer side is stuck to each other,
An unfilled space of the filler remains on the lower layer side, and this unfilled space becomes a void. The voids thus formed are:
The larger the aspect ratio of the groove, the easier it is to form.

On the other hand, it has been pointed out that the CVD method using ozone-tetraethoxysilane employed in the present invention has an underlayer dependence on the film growth rate.
By selecting the base, the degree of film formation (filling) can be controlled to some extent. In the present invention, paying attention to this point, the growth rate of the filler by the CVD method using ozone-tetraethoxysilane is formed on the side wall of the groove by forming a sidewall made of an insulator faster than the film. When the filler is filled by the CVD method, the filler grows on the side wall of the groove (specifically, the side wall of the side wall) before the side wall of the film. Therefore, an unfilled space of the filler hardly remains in the groove located on the lower layer side of the coating, and the generation of voids is also prevented.

Such a manufacturing method which is a feature of the present invention is effective if it is carried out on a silicon substrate having a trench as described in claim 2 of the present invention.

According to a third aspect of the present invention, there is provided the method for manufacturing a semiconductor device according to the first or second aspect, wherein the silicon substrate is filled with plasma-nitrogen before filling the groove with the filler. It is characterized in that it is processed, and has the following effects. That is, by subjecting the silicon substrate to plasma-nitrogen treatment before filling the groove with a filler, the dependence of the film formation rate of the CVD method on the base is promoted.

According to a fourth aspect of the present invention, there is provided the method of manufacturing a semiconductor device according to any one of the first to third aspects, wherein a silicon nitride film is formed as the film, and a silicon oxide film is formed as the sidewall. It is characterized in that an object is formed and silicon oxide is filled in the groove as the filler, thereby having the following effect. That is, the film growth rate when a filler is grown by CVD using ozone-tetraethoxysilane on a silicon oxide film formed as a sidewall and a silicon nitride film formed as a film is a silicon oxide film. Is faster than the silicon nitride film. Therefore, when these substances are selected, the effect of claim 1 can be reliably exerted.

According to a fifth aspect of the present invention, there is provided a method of forming a silicon nitride film on a silicon substrate, forming a groove in the silicon substrate over the silicon nitride film, and using ozone-tetraethoxysilane. Forming a silicon oxide film on the surface of the silicon nitride film including the groove surface by the CVD method, etching the silicon oxide film by the thickness of the silicon oxide film on the silicon nitride film surface, After the plasma-nitrogen treatment, a step of filling the groove with a silicon oxide formed by a CVD method using ozone-tetraethoxysilane was used to constitute a method for manufacturing a semiconductor device. By providing such a configuration, the present invention has the following operation. That is, in the step of forming a silicon oxide film on the surface of the silicon nitride film including the groove surface by a CVD method using ozone-tetraethoxysilane after the silicon substrate is treated with plasma-nitrogen, the silicon substrate is formed on the silicon nitride film. The growth rate of the silicon oxide film formed on the groove is higher than that of the silicon oxide film formed on the groove, and the thickness of the silicon oxide film on the groove is larger than the thickness of the silicon oxide film on the silicon nitride film. Therefore, in the next step, if the silicon oxide film is etched by the thickness of the silicon oxide film on the surface of the silicon nitride film, the silicon oxide film remains on the groove side wall to form a sidewall. The sidewalls formed in this manner will be treated with ozone
When the trench is filled with a silicon oxide formed by a CVD method using tetraethoxysilane, the silicon oxide is formed first on the sidewall of the trench (specifically, on the sidewall of the sidewall) rather than the sidewall of the silicon nitride film. Things will grow. Therefore, no space filled with silicon oxide remains in the trench located below the silicon nitride film, and voids do not occur.

According to a sixth aspect of the present invention, there is provided a method of forming a silicon nitride film on a silicon substrate, forming a groove in the silicon substrate over the silicon nitride film, and forming a silicon nitride film including a groove surface. A step of forming a silicon oxide film on the surface, a step of anisotropically etching the silicon oxide film until the side wall of the silicon nitride film above the trench is completely exposed, and a CVD method using ozone-tetraethoxysilane. And a step of filling the trench with silicon oxide. By providing such a configuration, the present invention has the following operation. That is, when the silicon oxide film is anisotropically etched until the side wall of the silicon nitride film above the groove is completely exposed, the silicon oxide film remains on the side wall of the groove and becomes a sidewall. When the trench is filled with a silicon oxide formed by a CVD method using ozone-tetraethoxysilane in the next step, the sidewall formed in this manner is more sidewall than the sidewall of the silicon nitride film (specifically, Specifically, the silicon oxide grows first on the side wall of the sidewall). Therefore, no space filled with silicon oxide remains in the trench located below the silicon nitride film, and no void is generated.

According to a seventh aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the sixth aspect, wherein the silicon oxide film is formed by a CVD method using ozone-tetraethoxysilane. have. This has the following effect. That is, in the step of forming a silicon oxide film on the surface of the silicon nitride film and the surface of the trench groove by the CVD method using ozone-tetraethoxysilane, the formed silicon oxide film becomes slightly porous and the film density is reduced. It becomes slightly rough. Therefore, the processing time for removing the silicon oxide film by anisotropic etching is shortened by the increase in the film density of the silicon oxide film. In addition, CV using ozone-tetraethoxysilane
In the step of forming the silicon oxide film on the surface of the silicon nitride film and the surface of the trench groove by the method D, the silicon oxide film formed on the silicon nitride film is formed on the silicon nitride film rather than on the groove (silicon substrate). Since the growth rate is slower, the thickness of the silicon oxide film on the silicon nitride film is smaller than the thickness of the silicon oxide film on the trench. Therefore, in the anisotropic etching performed until the silicon oxide film on the previously formed silicon nitride film is exposed, the processing time is shortened. Then, as the etching processing time becomes shorter in this manner, the amount of the corner portion of the silicon nitride film that is etched away becomes smaller.

According to an eighth aspect of the present invention, there is provided the method for manufacturing a semiconductor device according to the seventh aspect, wherein the silicon oxide film is formed by a CV using ozone-tetraethoxysilane.
It is characterized in that the silicon substrate is subjected to plasma-nitrogen treatment before being formed by the method D, thereby having the following effects. That is, by subjecting the silicon substrate to plasma-nitrogen treatment before forming the silicon oxide film by the CVD method using ozone-tetraethoxysilane, the dependence of the film formation rate of the CVD method on the underlayer is promoted. You.

According to a ninth aspect of the present invention, there is provided a semiconductor device, comprising: a trench formed on a silicon substrate for isolating an element formation region; a sidewall made of an insulator provided on a side wall of the trench; And a filler made of an insulator filled in the trench. Accordingly, in the present invention, adjacent element formation regions are electrically separated by a two-layer insulator, a sidewall provided between the filler filling the trench groove and the sidewall of the trench groove. Therefore, the electric breakdown voltage performance of the element isolation structure is improved.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a schematic sectional view of a semiconductor device manufactured by the method of manufacturing a semiconductor device according to the present invention. In this semiconductor device, a trench 3 is provided between element forming regions 2 on a silicon substrate 1. A thermal silicon oxide film 4 is provided on the inner surface of the trench 3. On the surface of the thermal silicon oxide film 4, a sidewall 5 made of an insulating material is provided. The insulator constituting the sidewall 5 is made of silicon oxide, and the sidewall 5 made of such an insulator is selectively provided on the side wall of the trench 3. The trench 3 provided with the thermal silicon oxide film 4 and the sidewalls 5 is filled with a filler 6 made of silicon oxide which is an insulator.

A semiconductor device typified by a transistor is formed in each element formation region 2. The present invention has a feature in an element isolation structure, and the semiconductor device itself has some features in its configuration. However, the configuration of each semiconductor device is not shown.

In the structure of this semiconductor device, by further providing a side wall 5 made of an insulator between the filling material 6 and the trench 3, the element isolation characteristics, especially the withstand voltage characteristics are improved, and the entire element isolation is improved. Can be improved in reliability. Hereinafter, a method for manufacturing such a semiconductor device will be described with reference to the drawings.

First Manufacturing Method FIGS. 2 to 4 are schematic cross-sectional views of a method for forming element isolation of a semiconductor device, which is a feature of the first manufacturing method of a semiconductor device according to the present invention.

First, 800 to 100 on the silicon substrate 1
The thermal silicon oxide film 10 having a thickness of about 10 to 20 nm (this thermal silicon oxide film 10
Is different from the thermal silicon oxide film 4 described above). Then, a reduced pressure CV is formed on the thermal silicon oxide film 10.
The silicon nitride film 11 having a thickness of about 100 to 300 nm by a method such as the D method (corresponding to a coating in the claims)
To form (Refer to FIG. 2A.) Further, a resist pattern (not shown) according to the design is formed on the silicon nitride film 11 using photolithography technology, and then the silicon nitride film 11 is formed using dry etching technology. The trench 3 is formed by etching the thermal silicon oxide film 10 and the silicon substrate 1. After forming the trench 3, the resist pattern is removed. (Refer to FIG. 2B).
A thermal silicon oxide film 4 having a thickness of about 10 to 20 nm is formed on the inner surface of the trench 3 by performing a heat treatment of about 10 nm. Furthermore, the silicon substrate 1 after the formation of the thermal silicon film 4
In order to improve the reliability of element isolation, ion species such as boron and phosphorus are implanted as needed. (Refer to FIG. 3A.) The silicon substrate 1 after the thermal silicon oxide film 4 is formed
After plasma-nitrogen treatment, a silicon oxide film 12 is formed on the surface of the silicon substrate 1, that is, the surface of the silicon nitride film 11 and the inner surface of the trench 3 by a CVD method using ozone-tetraethoxysilane to a thickness of 10 nm or more. 1
It is formed to a thickness of about 00 nm.

At this time, the feature of the CVD method using ozone-tetraethoxysilane is that it depends on the underlayer, and the silicon oxide film 12 formed on the silicon nitride film 11 is higher than the trench groove 3 (thermal silicon oxide film 4). The growth rate of the silicon oxide film 12 formed on the substrate is higher. Further, by subjecting the silicon substrate 1 to plasma-nitrogen treatment before performing such a CVD method treatment, the dependence on the base is promoted. Therefore, in the silicon oxide film 12 thus formed, the thickness of the silicon oxide film 12 formed on the trench 3 is larger than that of the silicon oxide film 12 formed on the silicon nitride film 11. It gets thicker. (See FIG. 3B.) After the silicon oxide film 12 is thus formed, the silicon oxide film 12 is partially removed using a solution such as hydrofluoric acid. That is, the silicon oxide film 12 is removed by the thickness of the silicon oxide film 12 deposited on the side wall of the silicon nitride film 11. At this time, as described above, the thickness of the silicon oxide film 12 is larger at the portion on the trench groove 3 than at the portion on the silicon nitride film 11. Therefore, when the silicon oxide film 12 is removed by the thickness deposited on the side wall of the silicon nitride film 11, only the silicon oxide film 12 deposited on the side wall of the silicon nitride film 11 is selectively removed, and the trench is removed. The silicon oxide film 12 remains on the inner wall of the groove 3. Thus, the silicon oxide film 12 remaining in the trench 3 becomes the sidewall 5. (See FIG. 4A.) Next, after performing a plasma-nitrogen treatment on the silicon substrate 1, C using ozone-tetraethoxysilane is used.
According to the VD method, the surface of the silicon substrate 1, that is, the surface of the silicon nitride film 11 and the inner surface of the trench 3 are
The silicon oxide filling layer 13 is formed, and the trench 3 is filled with the silicon oxide filling layer 13.

At this time, since the CVD method using ozone-tetraethoxysilane has an underlayer dependence, the silicon oxide filling layer 13 formed on the silicon nitride film 11 is formed.
The silicon oxide filling layer 13 formed on the silicon oxide film 12 has a higher growth rate. Furthermore,
By subjecting the silicon substrate 1 to plasma-nitrogen treatment before performing such a CVD process, the dependence on the base is promoted. Therefore, in the silicon oxide filling layer 13 formed by this method, the deposition rate on the side wall of the silicon nitride film 11 is lower than the deposition rate on the trench 3 (side wall 5) under the silicon nitride film 11. As a result, the filling of the sidewall of the silicon nitride film 11 is not completed before the filling of the trench 3 is completed. Therefore, no void is generated in the silicon oxide filling layer 13 in the trench 3, and good step coverage characteristics can be obtained. (See FIG. 4B) Finally, the silicon oxide filling layer 13 other than the silicon oxide filling layer 13 serving as the filling material 6 and the silicon nitride film 1
1 is removed by CMP (Chemical Mechanical Polishing) or the like, thereby completing the formation of the element isolation structure of the semiconductor device shown in FIG. When the silicon oxide filling layer 13 and the silicon nitride film 11 are removed by the CMP method, the silicon nitride film 11 functions as a polishing stopper film.

In the semiconductor device thus formed, the structure of the semiconductor device main body is formed in the element forming region 2. However, the structure of the semiconductor main body is not related to the present invention, and therefore, the details of the manufacturing method are described. The description of is omitted.

Second Manufacturing Method FIGS. 5 and 6 are schematic sectional views showing a method of forming element isolation of a semiconductor device, which is a feature of the second manufacturing method of the semiconductor device.

First, as shown in FIG. 5A, a thermal silicon oxide film 10, a silicon nitride film 1
1, a trench 3 and a thermal silicon oxide film 4 are formed. The manufacturing method of these configurations is the same as the above-described first manufacturing method, and thus the description thereof is omitted.

Thereafter, the silicon substrate 1 is formed by the CVD method.
On the surface of the silicon nitride film 11 and the inner surface of the trench 3 by a thickness of 10 nm.
It is formed to a thickness of about 100 nm. (See FIG. 5B.) Further, the silicon oxide film 20 is etched by anisotropic dry etching until the side wall of the silicon nitride film 11 is exposed, so that the surface of the thermal silicon oxide film 4 (the side wall of the trench 3). , A sidewall 5 is formed. This will be described below.

Anisotropic dry etching is characterized in that an etching rate of a film to be etched in a direction perpendicular to the etching direction is lower than that of a film to be etched in an etching direction. Therefore, when the silicon oxide film 20 (formed on the surface of the silicon nitride film 11 and the surface of the thermal silicon oxide film 4 on the side wall of the trench 3) is subjected to anisotropic dry etching, the side wall of the silicon nitride film 11 Etching until exposed,
The unetched silicon oxide film 20 remains on the surface of the thermal silicon oxide film 4 located below. Therefore, if the etching is stopped when the side wall of the silicon nitride film 11 is exposed, the silicon oxide film 20 remains on the surface of the thermal silicon oxide film 4 to form the sidewall 5. (Refer to FIG. 6 (a).) Next, after performing a plasma-nitrogen treatment on the silicon substrate 1, C using ozone-tetraethoxysilane is used.
According to the VD method, the surface of the silicon substrate 1, that is, the surface of the silicon nitride film 11 and the inner surface of the trench 3 are
The silicon oxide filling layer 13 is formed, and the trench 3 is filled with the silicon oxide filling layer 13 without forming a void (see FIG. 6B). At this time, the reason why voids are unlikely to be generated in the oxide filling layer 13 is the same as the reason described in the first manufacturing method, and therefore the description thereof is omitted. Further, the silicon oxide filling layer 13 other than the silicon oxide filling layer 13 serving as the filling material 6 and the silicon nitride film 11 are subjected to a CMP (Chemical Mechanical) method.
The formation of the element isolation structure of the semiconductor device shown in FIG. Since these steps are the same as those in the first manufacturing method, the description is omitted.

In the second manufacturing method described above, the silicon oxide film 20 is simply formed by the CVD method. However, the silicon oxide film 20 is formed by the CVD method using ozone-tetraethoxysilane. Then, the time of anisotropic dry etching is shortened. This is based on the following reasons. That is, the first reason is that ozone
When the silicon oxide film 20 is formed by a CVD method using tetraethoxysilane, the silicon oxide film 20 becomes porous and has a low film density, so that etching becomes easy. The second reason is that the silicon oxide film 20 on the silicon nitride film 11 (which is selectively removed in the next anisotropic dry etching step) due to the underlayer dependency of the CVD method using ozone-tetraethoxysilane.
Is thinner than the thickness of the silicon oxide film 20 on the trench 3, so that the etching time can be reduced.

As described above, when the silicon oxide film 20 is formed by the CVD method using ozone-tetraethoxysilane in the second manufacturing method, the etching time of the silicon oxide film 20 is shortened. Membrane 11
The shaving amount of the corner portion becomes small, and the deposition shape of the silicon oxide filling layer 13 is accurately maintained when the silicon oxide filling layer 13 is formed by a CVD method using ozone-tetraethoxysilane in a later step. As a result, the reliability of element isolation is further improved.

In the above-described embodiment, the side wall 5 made of silicon oxide is formed. However, the side wall in the present invention is formed by the growth rate of the filler by the CVD method using ozone-tetraethoxysilane. If the insulator is faster than the coating (such as the silicon nitride film 11),
It goes without saying that any other insulator can be used.

In the above-described embodiment, the trench 3 is used as an example of the groove formed in the silicon substrate. However, the present invention can be applied to any groove formed in the silicon substrate. Needless to say.

Further, in the above-described embodiment, the present invention is applied to a silicon substrate having a silicon nitride film as a film, but the present invention can be similarly applied to a silicon substrate having another film. Needless to say.

[0037]

According to the first, second and fourth aspects of the present invention, the space which is not filled with the filler hardly remains in the groove located on the lower layer side of the coating, and the generation of voids is prevented. Therefore, even in a semiconductor device in which the aspect ratio of a groove is increased due to miniaturization, the electrical characteristics of the semiconductor device can be improved while maintaining the reliability of element isolation.

According to the third aspect, before the groove is filled with a filler formed by a CVD method using ozone-tetraethoxysilane, the silicon substrate is subjected to plasma-nitrogen treatment. CV used
As a result of promoting the dependence of the film formation rate of the method D on the base,
The effects of claims 1 and 2 become clearer.

According to the fifth and sixth aspects, it is possible to manufacture the sidewalls with high accuracy and by a relatively simple method. As a result, the effects of the first, second and fourth aspects are increased in manufacturing cost. Can be acquired without inviting.

According to the seventh and eighth aspects, the processing time of the anisotropic etching performed by the manufacturing method of the sixth aspect can be shortened, and as a result, the shaved amount of the corner portion of the silicon nitride film can be reduced. Therefore, the deposition shape of silicon oxide by a CVD method using ozone-tetraethoxysilane to be performed later can be accurately maintained, and the reliability of element isolation is further improved.

According to the ninth aspect of the present invention, the element formation region adjacent to the filling material filled in the trench groove by a two-layer insulator called a sidewall provided between the filling material and the side wall of the trench groove. Are electrically separated from each other,
The electric breakdown voltage performance of the element isolation structure is improved.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a structure of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a first step of the first method of manufacturing the semiconductor device according to the above embodiment;

FIG. 3 is a process cross-sectional view showing a middle step of a first manufacturing method of the semiconductor device of the embodiment.

FIG. 4 is a process cross-sectional view showing a latter stage of a first manufacturing method of the semiconductor device according to the above embodiment;

FIG. 5 is a process cross-sectional view showing a middle step of a second manufacturing method of the semiconductor device of the above embodiment.

FIG. 6 is a process cross-sectional view showing a latter process of the second method of manufacturing the semiconductor device of the above embodiment.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 Element formation area 3 Trench groove 4 Thermal silicon oxide film 5 Side wall 6 Filler 10 Thermal silicon oxide film 11 Silicon nitride film 12 Silicon oxide film 13 Silicon oxide filling layer 20 Silicon oxide film

Claims (9)

[Claims] A groove is formed in a silicon substrate having a coating, and a groove is formed on the silicon substrate using ozone-tetraethoxysilane.
A method of manufacturing a semiconductor device in which the groove is filled with a filler made of an insulator formed by a VD method, wherein the groove is filled with the filler by a CVD method using ozone-tetraethoxysilane. A method of manufacturing a semiconductor device, wherein a sidewall made of an insulator having a growth rate of the filler faster than that of the coating is selectively formed on a sidewall of the groove. 2. The method of manufacturing a semiconductor device according to claim 1, wherein said groove is a trench. 3. The method for manufacturing a semiconductor device according to claim 1, wherein a plasma-nitrogen treatment is performed on the silicon substrate before filling the groove with the filler. Method. 4. The method of manufacturing a semiconductor device according to claim 1, wherein a silicon nitride film is formed as the film, a silicon oxide is formed as the sidewall, and silicon is used as the filler. A method for manufacturing a semiconductor device, comprising filling the trench with an oxide. 5. A step of forming a silicon nitride film on a silicon substrate, a step of forming a groove in the silicon substrate over the silicon nitride film, and a step of subjecting the silicon substrate to plasma-nitrogen treatment and using ozone-tetraethoxysilane. Forming a silicon oxide film on the surface of the silicon nitride film including the groove surface by the CVD method, etching the silicon oxide film by the thickness of the silicon oxide film on the silicon nitride film surface, Filling the groove with a silicon oxide formed by a CVD method using ozone-tetraethoxysilane after plasma-nitrogen treatment. 6. A step of forming a silicon nitride film on a silicon substrate, a step of forming a groove in the silicon substrate over the silicon nitride film, and a step of forming a silicon oxide film on the surface of the silicon nitride film including the groove surface Anisotropically etching the silicon oxide film until the side wall of the silicon nitride film above the trench is completely exposed; and forming the silicon substrate by plasma-nitrogen treatment and then by a CVD method using ozone-tetraethoxysilane. Filling the trench with silicon oxide. 7. The method of manufacturing a semiconductor device according to claim 6, wherein the silicon oxide film is formed by a CVD method using ozone-tetraethoxysilane. 8. The method of manufacturing a semiconductor device according to claim 7, wherein the silicon substrate is subjected to plasma-nitrogen treatment before the silicon oxide film is formed by a CVD method using ozone-tetraethoxysilane. A method for manufacturing a semiconductor device, comprising: 9. A trench formed on a silicon substrate for isolating an element formation region, a sidewall made of an insulator provided on a side wall of the trench, and a filler made of an insulator filled in the trench. A semiconductor device comprising: