JPH11265861A - Polishing and manufacture of semiconductor device - Google Patents

Polishing and manufacture of semiconductor device

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Publication number
JPH11265861A
JPH11265861A JP6591698A JP6591698A JPH11265861A JP H11265861 A JPH11265861 A JP H11265861A JP 6591698 A JP6591698 A JP 6591698A JP 6591698 A JP6591698 A JP 6591698A JP H11265861 A JPH11265861 A JP H11265861A
Authority
JP
Japan
Prior art keywords
polishing
silicon oxide
magnesium oxide
abrasive grains
main component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6591698A
Other languages
Japanese (ja)
Inventor
Toshiya Kinoshita
俊哉 木下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Steel Corp
Original Assignee
Nippon Steel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Steel Corp filed Critical Nippon Steel Corp
Priority to JP6591698A priority Critical patent/JPH11265861A/en
Publication of JPH11265861A publication Critical patent/JPH11265861A/en
Pending legal-status Critical Current

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  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

PROBLEM TO BE SOLVED: To enable the chemical and mechanical polishing at a pH of 10 and below of a semiconductor device and to eliminate the occurrence of damage due to polishing at the high polishing rate of the semiconductor device by a method wherein a work containing a silicon oxide or containing a silicon oxide as its main component is polished using a polishing agent containing abrasive grains, which contain magnesium oxide as their main component. SOLUTION: A work containing a silicon oxide or containing a silicon oxide as its main component is polished using a polishing agent containing abrasive grains, which contain magnesium oxide as their main component. Moreover, an insulatator layer, comprising a silicon oxide layer, on the surface of a semiconductor substrate is polished using a polishing agent containing abrasive grains, which contain magnesium oxide as their main component, and after the insulator layer is flattened, the polished semiconductor substrate is cleaned using an acid selected from among a hydrochloric acid, a nitric acid and/or a sulfuric acid. As the polishing agent for the work containing the silicon oxide as its main component, such as glass and a quartz wafer, a polishing agent containing abrasive grains, which contain magnesium oxide as their main component, is used, whereby the high polishing rate of a semiconductor device can be obtained.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、シリコン酸化物な
どの研磨方法とその研磨方法を含む半導体装置の製造方
法に関する。
The present invention relates to a method for polishing silicon oxide or the like and a method for manufacturing a semiconductor device including the polishing method.

【0002】[0002]

【従来の技術】半導体基板のポリッシングにおいては、
研磨速度を確保しつつ、しかも機械的歪などの欠陥が入
らない研磨法が要求される。従来の機械的研磨法におい
ては、砥粒の粒径や研磨荷重を大きくすることにより、
研磨速度を確保することが可能である。しかし、研磨に
より、種々の欠陥が入り、研磨速度の確保と被研磨材を
無欠陥に保つことの両立は不可能であった。そこで、化
学的機械的研磨(CMP:Chemical Mechanical Polish
ing )と呼ばれる研磨法が考案された。この方法は機械
的研磨作用に化学的研磨作用を重畳して働かせることに
より、研磨速度の確保と被研磨材が無欠陥であることの
両立を可能としたものである。CMPは、研磨速度の確
保と被研磨材が無欠陥であることの両立が必要であるシ
リコンウエハーのポリッシング工程で広く使用されてい
る。また、近年では、デバイスの高集積化に伴い集積回
路を製造する所定の段階で、ウエハーやウエハー表面に
導電体や誘電体層が形成された半導体基板の表面を研磨
することが必要となってきた。半導体基板は研磨され
て、高い隆起が除去され、平坦化がなされる。通常、こ
の工程は、ウエハー上に種々の装置および集積回路を形
成する間に行われる。この研磨工程では、シリコンウエ
ハーのポリッシング工程と同様に、研磨速度の確保と無
欠陥であることの両立が必要である。化学スラリーを導
入することにより、半導体表面に、より大きな研磨除去
速度および無欠陥性が与えられるCMPが行われる。一
般に、CMP工程は、薄くかつ平坦な半導体材料を、制
御された圧力および温度下で、湿った研磨表面に対して
保持し、かつ回転させる工程を含む。
2. Description of the Related Art In polishing a semiconductor substrate,
A polishing method is required that ensures a polishing rate and does not cause defects such as mechanical strain. In the conventional mechanical polishing method, by increasing the abrasive grain size and polishing load,
It is possible to secure a polishing rate. However, various defects are caused by the polishing, and it has been impossible to secure both the polishing rate and the material to be polished without defects. Therefore, chemical mechanical polishing (CMP)
A polishing method called ing) was devised. In this method, a chemical polishing action is superimposed on a mechanical polishing action so that a polishing speed can be ensured and a material to be polished has no defect. CMP is widely used in a polishing process of a silicon wafer, which needs to ensure both a high polishing rate and a defect-free material. Also, in recent years, it has become necessary to polish the surface of a wafer or a semiconductor substrate having a conductor or dielectric layer formed on the surface of the wafer at a predetermined stage of manufacturing an integrated circuit with high integration of devices. Was. The semiconductor substrate is polished to remove high bumps and planarize. Typically, this step is performed during the formation of various devices and integrated circuits on the wafer. In this polishing step, as in the polishing step of the silicon wafer, it is necessary to ensure both the polishing rate and the defect-free state. By introducing the chemical slurry, CMP is performed on the semiconductor surface to provide a higher polishing removal rate and defect-freeness. In general, a CMP process involves holding and rotating a thin, planar semiconductor material against a wet polishing surface under controlled pressure and temperature.

【0003】CMP工程の代表例としては、例えば5〜
300nm程度の粒径を有するシリカ粒子を苛性ソーダ
等のアルカリ溶液に懸濁させてpH9〜12程度にした
研磨スラリーとポリウレタン樹脂等からなる研磨布が用
いられる。研磨時には化学スラリーを流布しながら、半
導体基板を研磨布に当接させて相対回転させることによ
り、研磨が行われる。
As typical examples of the CMP process, for example,
A polishing cloth made of a polishing slurry prepared by suspending silica particles having a particle diameter of about 300 nm in an alkaline solution such as caustic soda to a pH of about 9 to 12 and a polyurethane resin is used. At the time of polishing, the semiconductor substrate is brought into contact with the polishing cloth and rotated relatively while the chemical slurry is being spread, thereby performing the polishing.

【0004】[0004]

【発明が解決しようとする課題】シリコン酸化物よりな
る絶縁物層の研磨は、上記のシリカ粒子を含む研磨スラ
リーを研磨剤として用いることにより、研磨が可能とな
ることが知られている。しかし、その研磨速度は充分と
は言えず、研磨に長時間を要し、コスト高の原因となっ
ている。また、シリコン酸化物をシリカ砥粒で研磨する
ことは共摺りであり、研磨傷の導入が問題となってい
る。また、研磨後の洗浄方法としてスクラブ洗浄などの
物理的手法が用いられるため、完全なシリカ粒子の除去
は困難であり、高集積化の進展と共に残留シリカ粒子が
製造歩留まり低下の原因となってきている。更に、シリ
カ粒子を含む研磨スラリーは、研磨速度の向上を目的と
したpH調整のため、一般的に水酸化カリウムを始めと
したアルカリ金属を含んでいる。しかし、半導体装置の
製造において、カリウムなどのアルカリ金属類を含有し
た材料を用いると、半導体装置がアルカリ金属によって
汚染され、その電気特性が劣化する。このため、水酸化
カリウムの代替えとしてアンモニアを含有したシリカ粒
子を含む研磨スラリーがあるものの、このスラリーを用
いた研磨速度は、水酸化カリウムを含んだスラリーの2
/3程度と遅く、より研磨速度が速い研磨剤の開発が求
められていた。
It is known that polishing of an insulator layer made of silicon oxide can be performed by using the above-mentioned polishing slurry containing silica particles as a polishing agent. However, the polishing rate cannot be said to be sufficient, and a long time is required for polishing, which causes an increase in cost. In addition, polishing silicon oxide with silica abrasive grains is a common rub, and the introduction of polishing flaws is a problem. In addition, since a physical method such as scrub cleaning is used as a cleaning method after polishing, it is difficult to completely remove the silica particles, and with the progress of high integration, residual silica particles have become a cause of a decrease in manufacturing yield. I have. Further, a polishing slurry containing silica particles generally contains an alkali metal such as potassium hydroxide for pH adjustment for the purpose of improving the polishing rate. However, when a material containing an alkali metal such as potassium is used in the manufacture of a semiconductor device, the semiconductor device is contaminated with the alkali metal, and its electrical characteristics deteriorate. For this reason, although there is a polishing slurry containing silica particles containing ammonia as a substitute for potassium hydroxide, the polishing rate using this slurry is 2 times that of the slurry containing potassium hydroxide.
There has been a demand for the development of an abrasive which is as slow as about / 3 and has a higher polishing rate.

【0005】[0005]

【課題を解決するための手段】被研磨物であるシリコン
酸化物より硬度が低く、シリコン酸化物に対して高い化
学活性を有する物質を砥粒として使用することにより、
pHが10以下でのCMPが可能となり、高研磨速度で
あり、研磨傷が入らず、アルカリ汚染が防止できる研磨
スラリーが実現できる。シリコン酸化物のCMPに使用
する砥粒として、酸化マグネシウムはシリコン酸化物と
比べて低硬度を有し、シリコン酸化物に対して化学活性
であり、有用であることを、発明者は見い出した。ま
た、酸化マグネシウムは塩酸、硝酸、硫酸などの酸に容
易に溶解するため、極めて洗浄性のよい研磨工程が実現
できる。
According to the present invention, a substance having a lower hardness than silicon oxide to be polished and having a high chemical activity with respect to silicon oxide is used as abrasive grains.
CMP at a pH of 10 or less becomes possible, and a polishing slurry which has a high polishing rate, does not cause polishing scratches, and can prevent alkali contamination can be realized. As an abrasive used for CMP of silicon oxide, the inventors have found that magnesium oxide has a lower hardness than silicon oxide, is chemically active on silicon oxide, and is useful. In addition, since magnesium oxide is easily dissolved in acids such as hydrochloric acid, nitric acid, and sulfuric acid, a polishing process with extremely good cleaning properties can be realized.

【0006】本発明は酸化マグネシウムを主成分とする
砥粒を含む研磨剤を用いることにより、シリコン酸化物
又はシリコン酸化物を主成分とする被加工物を研磨する
方法である。また、本発明は、半導体基板表面のシリコ
ン酸化物よりなる絶縁物層を、酸化マグネシウムを主成
分とする砥粒を含む研磨剤を使用して研磨することによ
り平坦化する工程と、平坦化工程の終了後、研磨された
半導体基板を塩酸,硝酸および/または硫酸から選ばれ
た酸により洗浄する工程とを含むことを特徴とする半導
体装置の製造方法である。
The present invention is a method for polishing silicon oxide or a workpiece mainly containing silicon oxide by using an abrasive containing abrasive grains mainly containing magnesium oxide. Further, the present invention provides a step of flattening the insulator layer made of silicon oxide on the surface of the semiconductor substrate by polishing using an abrasive containing abrasive grains mainly composed of magnesium oxide; Cleaning the polished semiconductor substrate with an acid selected from hydrochloric acid, nitric acid, and / or sulfuric acid after the step is completed.

【0007】[0007]

【発明の実施の形態】酸化マグネシウムの硬度は、Proc
eedings of the Royal Society of London.Series A の
322巻(1971年)73頁に示されているように、
酸化マグネシウム単結晶の種々の結晶面に対して400
〜800kg/cm2である。一方、シリコン酸化物の硬度
は、Journal of American Ceramics Societyの78巻
(1995年)737頁に示されているように、石英単
結晶の(011)面に対して、1200kg/cm2である。
つまり、本発明で用いた酸化マグネシウムを主成分とす
る砥粒は、被研磨材であるシリコン酸化物よりも硬度が
低く、研磨傷は生成しない。また、酸化マグネシウムは
シリコン酸化物と化学反応を起こし−Si−O−Si−
ネットワークを切断する。このため、シリコン酸化物の
表面層が軟化し、酸化マグネシウム砥粒によりシリコン
酸化物の表面層が削り取られる。このように、酸化マグ
ネシウム砥粒を用いたシリコン酸化物の研磨において
は、顕著な化学機械的研磨機構が働くため、シリカ粒子
を含む研磨スラリーを研磨剤として用いた場合より、高
い研磨速度が実現できることを発明者は見い出した。し
たがって、シリコン酸化物を主成分とする被加工物、例
えばガラスや石英ウエハー等の研磨剤として、酸化マグ
ネシウムを主成分とする砥粒を含む研磨剤を用いること
により、高い研磨速度を得ることができる。また、研磨
速度が大きいため、pHを11程度以上に設定する必要
がないので、水酸化カリウムなどの強塩基を用いる必要
がなく、アンモニア等のアルカリ金属を含まない塩基を
使用しても高い研磨速度を実現できる。従って、アルカ
リ金属の残留の問題を解決する。また、酸化マグネシウ
ムは容易に酸に溶解する。従って、酸化マグネシウムを
主成分とする砥粒を含む研磨剤を使用すれば、半導体装
置の製造に用いられるCMPにおいてしばしば重要な課
題となる、アルカリ金属および砥粒の残留汚染の問題は
解決できる。半導体基板表面のシリコン酸化物よりなる
絶縁物層を、酸化マグネシウムを主成分とする砥粒を含
む研磨剤を使用して研磨することにより、平坦化する工
程を含むことを特徴とする半導体装置の製造方法を図1
に示した。シャロートレンチ分離構造の製造を例として
説明する。図1(a) はシリコン基板1上に熱酸化膜2と
研磨ストッパ層として窒化シリコン層3とが形成された
構造を示している。この構造に対しマスクをし、エッチ
ングを行なうことによって素子分離に必要な溝を形成
し、シリコン基板を酸化することにより、図1(b) の構
造が得られる。この構造の上に、化学蒸着法(CVD:
Chemical Vapor Depositio
n)によりシリコン酸化物絶縁膜4を図1(c) に示した
ように作成する。この最上部のシリコン酸化物絶縁膜に
対して、酸化マグネシウムよりなる砥粒を含む研磨剤を
使用して研磨することにより、平坦化し、図1(d) に示
したシャロートレンチ分離構造を製造することができ
る。更に、酸化マグネシウムは塩酸、硝酸、硫酸などの
酸に容易に溶解するため、酸を用いた後洗浄工程によ
り、酸化マグネシウム砥粒は完全に除去され、シリカ砥
粒を含んだスラリーを使用した場合に見られる残留砥粒
に起因する製品歩留まりの低下は起こらない。また、洗
浄液に過酸化水素を含有させることにより、酸化マグネ
シウムの溶解はより早くなり、洗浄時間の短縮化が図れ
る。
DETAILED DESCRIPTION OF THE INVENTION The hardness of magnesium oxide is Proc.
As shown in the eedings of the Royal Society of London. Series A, Volume 322 (1971), p. 73,
400 for various crystal planes of magnesium oxide single crystal
800800 kg / cm 2 . On the other hand, the hardness of silicon oxide is 1200 kg / cm 2 with respect to the (011) plane of a quartz single crystal as shown in Journal of American Ceramics Society, Vol. 78 (1995), p. 737.
In other words, the abrasive grains mainly composed of magnesium oxide used in the present invention have lower hardness than silicon oxide as the material to be polished, and do not generate polishing scratches. Also, magnesium oxide undergoes a chemical reaction with silicon oxide to form -Si-O-Si-
Disconnect the network. Therefore, the surface layer of the silicon oxide is softened, and the surface layer of the silicon oxide is scraped off by the magnesium oxide abrasive grains. As described above, in the polishing of silicon oxide using magnesium oxide abrasive grains, a remarkable chemical mechanical polishing mechanism works, so that a higher polishing rate is realized than when using a polishing slurry containing silica particles as an abrasive. The inventor has found what can be done. Therefore, a high polishing rate can be obtained by using a polishing agent containing abrasive grains mainly containing magnesium oxide as a polishing agent for a workpiece mainly containing silicon oxide, for example, a glass or quartz wafer. it can. In addition, since the polishing rate is high, it is not necessary to set the pH to about 11 or more. Therefore, it is not necessary to use a strong base such as potassium hydroxide, and a high polishing rate can be obtained even when a base containing no alkali metal such as ammonia is used. Speed can be realized. Therefore, the problem of residual alkali metal is solved. Also, magnesium oxide readily dissolves in acids. Therefore, the use of an abrasive containing abrasive grains containing magnesium oxide as a main component can solve the problem of residual contamination of alkali metal and abrasive grains, which is often an important issue in CMP used in the manufacture of semiconductor devices. A step of polishing the insulator layer made of silicon oxide on the surface of the semiconductor substrate by using an abrasive containing abrasive grains containing magnesium oxide as a main component, thereby flattening the semiconductor device. Figure 1 shows the manufacturing method
It was shown to. The manufacture of the shallow trench isolation structure will be described as an example. FIG. 1A shows a structure in which a thermal oxide film 2 and a silicon nitride layer 3 as a polishing stopper layer are formed on a silicon substrate 1. The structure shown in FIG. 1 (b) is obtained by masking this structure and performing etching to form grooves necessary for element isolation, and oxidizing the silicon substrate. On top of this structure, a chemical vapor deposition (CVD:
Chemical Vapor Deposition
According to n), a silicon oxide insulating film 4 is formed as shown in FIG. The uppermost silicon oxide insulating film is polished by using an abrasive containing abrasives made of magnesium oxide, thereby planarizing the silicon oxide insulating film, thereby producing the shallow trench isolation structure shown in FIG. be able to. Furthermore, since magnesium oxide is easily dissolved in acids such as hydrochloric acid, nitric acid and sulfuric acid, the magnesium oxide abrasive grains are completely removed by a washing step using an acid, and a slurry containing silica abrasive grains is used. No decrease in the product yield due to the residual abrasive grains shown in FIG. In addition, by including hydrogen peroxide in the cleaning solution, the dissolution of magnesium oxide becomes faster and the cleaning time can be shortened.

【0008】酸化マグネシウムを主成分とする砥粒の粒
径は10μmより大きいと沈降が起こり易くなり、スラ
リーの供給配管の詰まりが起こるため、粒径は10μm
以下が好ましい。化学活性を活用するためには微粒子を
用い、比表面積を大きくすることが有効であり、酸化マ
グネシウムを主成分とする砥粒の粒径は2〜500nm
であることが特に好ましい。スラリー中の酸化マグネシ
ウム砥粒の含有量は、0.1wt%未満では研磨効果が
低く、30wt%以上含有しても研磨速度はほぼ一定と
なるので0.1〜30wt%の範囲が望ましい。
If the particle size of the abrasive particles containing magnesium oxide as a main component is larger than 10 μm, sedimentation is likely to occur, and the supply pipe of the slurry is clogged.
The following is preferred. In order to utilize the chemical activity, it is effective to use fine particles and increase the specific surface area, and the particle size of the abrasive grains mainly composed of magnesium oxide is 2 to 500 nm.
Is particularly preferred. If the content of magnesium oxide abrasive grains in the slurry is less than 0.1 wt%, the polishing effect is low, and if the content is 30 wt% or more, the polishing rate is almost constant. Therefore, the range of 0.1 to 30 wt% is desirable.

【0009】[0009]

【実施例】被研磨物としては、CVD法を用いて、シリ
コンウエハー上にTEOS−SiO2 膜を約700nm
厚みに蒸着したウエハーを準備した。研磨スラリーは平
均粒径200nmの酸化マグネシウムを5wt%含有
し、アンモニアを用いてpH=10としたスラリーを用
いた。一方、比較のため、従来シリカスラリーとして、
Cabot社より市販されているSEMI−SRERS
E12(平均2次粒径150nmのフュームドシリカ1
2.5wt%含有、KOHベースでpH=11)を用い
た。研磨パッドはロデール・ニッタ社より市販されてい
るIC1000/SUBA400の2層パッドを用い
た。研磨時の圧力は400g/cm2 であり、各ウエハ
ー当たり2分間の研磨を行なった。SiO2 膜の膜厚は
ナノメトリックス社製ナノスペックを用いて測定した。
研磨を行なった後、本発明の酸化マグネシウムを含有し
たスラリーで研磨したウエハーに対しては、塩酸溶液で
洗浄を行い、比較例のSEMI−SRERSE12を用
いて研磨したウエハーに対しては、SC−1洗浄後、ブ
ラシスクラブ洗浄を行なった。洗浄後のウエハーは、純
水リンスした後、研磨面の0.17μm以上の大きさの
残留パーティクル数を日立DECO製パーティクルカウ
ンターで評価し、また研磨面の残留カリウム量をICP
分析により評価した。なお、ICP分析でのカリウムの
定量下限は1×1010原子/cm2 である。結果を図2
の表1に示す。
EXAMPLES The object to be polished, by using the CVD method, about 700nm to TEOS-SiO 2 film on a silicon wafer
A wafer deposited to a thickness was prepared. The polishing slurry used was a slurry containing 5 wt% of magnesium oxide having an average particle diameter of 200 nm and having a pH of 10 using ammonia. On the other hand, for comparison, as a conventional silica slurry,
SEMI-SRERS commercially available from Cabot
E12 (fumed silica 1 having an average secondary particle size of 150 nm)
2.5 wt% content, pH = 11) based on KOH. As the polishing pad, a two-layer pad of IC1000 / SUBA400 commercially available from Rodale Nitta was used. The polishing pressure was 400 g / cm 2 , and each wafer was polished for 2 minutes. The film thickness of the SiO 2 film was measured using Nanospec manufactured by Nanometrics.
After the polishing, the wafer polished with the magnesium oxide-containing slurry of the present invention was washed with a hydrochloric acid solution, and the wafer polished using SEMI-SLERSE12 of Comparative Example was SC- After one washing, brush scrub washing was performed. After the rinsed wafer is rinsed with pure water, the number of residual particles having a size of 0.17 μm or more on the polished surface is evaluated with a Hitachi DECO particle counter, and the amount of residual potassium on the polished surface is determined by ICP.
It was evaluated by analysis. The lower limit of quantification of potassium in ICP analysis is 1 × 10 10 atoms / cm 2 . Figure 2 shows the results.
Is shown in Table 1.

【0010】結果として、本発明の酸化マグネシウムス
ラリーは、従来のシリカスラリーに比べ、研磨速度が顕
著に大きい。また、残留パーティクル数も顕著に少なく
なった。パーティクルカウンターでは、実施例において
も、52個/ウエハーの表面異物が見られたが、この異
物は主に結晶起因のピット(COP:CristalO
riginated Particle)などの表面欠
陥に起因すると思われる。確認のため、マグネシウムに
ついてICP分析を行なったところ、残留マグネシウム
量は定量下限(=1×109 原子/cm2 )未満であ
り、本発明の酸化マグネシウム砥粒は容易に酸溶液によ
る洗浄で溶解することを確認した。また、本発明におい
ては研磨剤中にアルカリ金属を添加していないため、残
留カリウム量はICP分析の定量下限(=1×1010
子/cm2 )未満であり、比較例のシリカスラリーの残
留カリウム量に比べ著しく少ない。以上のことから、本
発明の研磨剤は、研磨速度の向上、砥粒およびアルカリ
金属の残留汚染の減少に著しい効果があることを確認し
た。
As a result, the magnesium oxide slurry of the present invention has a significantly higher polishing rate than the conventional silica slurry. Also, the number of remaining particles was significantly reduced. In the particle counter, 52 foreign particles / wafer surface foreign matter were also observed in the example, and the foreign matter was mainly caused by pits (COP: Crystal O) caused by crystals.
It is thought to be due to surface defects, such as a registered particle. For confirmation, ICP analysis was performed on magnesium. The amount of residual magnesium was less than the lower limit of quantification (= 1 × 10 9 atoms / cm 2 ), and the magnesium oxide abrasive of the present invention was easily dissolved by washing with an acid solution. Make sure you do. In the present invention, since no alkali metal was added to the polishing agent, the amount of residual potassium was less than the lower limit of quantification (= 1 × 10 10 atoms / cm 2 ) of ICP analysis, and the residual amount of silica slurry of the comparative example was It is significantly less than the amount of potassium. From the above, it was confirmed that the abrasive of the present invention has a remarkable effect on improving the polishing rate and reducing residual contamination of abrasive grains and alkali metal.

【0011】なお、本発明は、上記の実施例に限定され
るものではなく、その要旨の範囲内において、種々の変
形が可能である。
The present invention is not limited to the above-described embodiment, and various modifications can be made within the scope of the invention.

【0012】[0012]

【発明の効果】本発明の研磨方法および半導体装置の製
造方法を用いれば、半導体基板上のシリコン酸化物絶縁
物層の研磨において、高い研磨速度が達成でき、スルー
プットが向上すると共に、砥粒およびアルカリ金属の残
留汚染の減少による製造歩留まりの向上が実現し、半導
体装置を低いコストで製造できる。
According to the polishing method and the method for manufacturing a semiconductor device of the present invention, a high polishing rate can be achieved in polishing a silicon oxide insulator layer on a semiconductor substrate, the throughput is improved, and the abrasive grains and An improvement in the production yield due to a reduction in the residual contamination of the alkali metal is realized, and the semiconductor device can be manufactured at low cost.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(a)〜(d)は半導体装置の製造工程を示す
図である。
FIGS. 1A to 1D are diagrams illustrating a manufacturing process of a semiconductor device.

【図2】実験結果を示す表である。FIG. 2 is a table showing experimental results.

【符号の説明】[Explanation of symbols]

1 シリコン基板 2 シリコン酸化膜 3 シリコン窒化膜 4 シリコン酸化物絶縁膜 Reference Signs List 1 silicon substrate 2 silicon oxide film 3 silicon nitride film 4 silicon oxide insulating film

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 シリコン酸化物又はシリコン酸化物を主
成分とする被加工物を研磨する方法であって、酸化マグ
ネシウムを主成分とする砥粒を含む研磨剤を用いること
を特徴とする研磨方法。
1. A polishing method for polishing a silicon oxide or a workpiece mainly composed of silicon oxide, comprising using an abrasive containing abrasive grains mainly composed of magnesium oxide. .
【請求項2】 半導体基板表面のシリコン酸化物よりな
る絶縁物層を、酸化マグネシウムを主成分とする砥粒を
含む研磨剤を使用して研磨することにより平坦化する工
程と、平坦化工程の終了後、研磨された半導体基板を塩
酸,硝酸および/または硫酸から選ばれた酸により洗浄
する工程とを含むことを特徴とする半導体装置の製造方
法。
2. A step of flattening an insulator layer made of silicon oxide on the surface of a semiconductor substrate by polishing using an abrasive containing abrasive grains mainly composed of magnesium oxide, and a step of flattening. Cleaning the polished semiconductor substrate with an acid selected from hydrochloric acid, nitric acid and / or sulfuric acid after completion.
JP6591698A 1998-03-16 1998-03-16 Polishing and manufacture of semiconductor device Pending JPH11265861A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6591698A JPH11265861A (en) 1998-03-16 1998-03-16 Polishing and manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6591698A JPH11265861A (en) 1998-03-16 1998-03-16 Polishing and manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH11265861A true JPH11265861A (en) 1999-09-28

Family

ID=13300786

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6591698A Pending JPH11265861A (en) 1998-03-16 1998-03-16 Polishing and manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH11265861A (en)

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