JPH11261500A - Rssi circuit operatable at low voltage - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain the circuit that can simply correct a temperature, by providing a differential output signal from a differential output node, receiving it, providing a 1st rectification signal, providing a rectified signal in response to the differential output signal, and providing a voltage signal proportional substantially to the rectified signal in response to the rectified signal. SOLUTION: The level of a base electrode of transistor(TRs) 313, 314 is increased (decreased) when input signal levels (v1, v2) increase (decrease). Emitter electrodes of TRs 313, 314, 415 are connected in common and a collector current of the TR 315 changes inversely to a collector current of the TRs 313, 314. Resistors and TRs of a differential amplifier circuit and a current source are in existence between a power supply Vcc and ground. A voltage produced across a differential output resistor is about 0.1 V and a base-emitter voltage of the NPN TRs 313 or the like is about 0.7 V, and then a current source consisting of the NPN TRs has a voltage of about 0.2 V.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an RSSI circuit in a radio receiver, for example, and more particularly to an RSSI circuit capable of operating at a low voltage in a paging receiver or the like.

[0002]

2. Description of the Related Art Generally, a radio receiver converts a high-frequency radio signal obtained from an antenna into an intermediate frequency signal (IF signal).
And amplifies the IF signal and inputs it to a detector to perform desired signal processing. In this case, the strength of the radio wave received by the radio receiver is generally RSSI (Rec
eived Signal Strength Indicater) circuit.
FIG. 1 is a circuit diagram showing a general RSSI circuit in a wireless receiver. In the illustrated circuit, there are six amplifying stages including an IF amplifier and an RSSI amplifier, and an input terminal I
A signal is input from F_In, amplified, and output terminal Out
Output from 1 and 2. The amplified signal is also input to the RSSI amplifier, and the output current from the RSSI amplifier is converted to a voltage by a current-voltage conversion circuit, and an RSSI output voltage is provided at an output terminal RSSI.

FIG. 2 is a circuit diagram showing an example of a conventional IF amplifier, RSSI amplifier, and current / voltage conversion circuit. In this circuit diagram, the IF amplifier is composed of a differential amplifier composed of two sets of resistors R and transistors, the RSSI amplifier is composed of resistors and transistors, and the current-voltage conversion circuit is composed of a current mirror circuit composed of two transistors. ing. From the power supply to the ground, the signal flows through a resistor R and a transistor of the differential amplifier, a transistor of the RSSI amplifier, and a current source. Therefore, the power supply voltage Vcc is 2 * Vbe + Vce (sat) + R * Iee
The above voltage is required. Here, Vbe is a voltage between the base and the emitter of the NPN transistor and has a value of about 0.7 volt. Vce (sat) is a saturation voltage between the collector and the emitter of the NPN transistor.
Take a value of about 2 volts. Iee is the current flowing from the current source, and the voltage effect in the current source takes a value of about 0.1 volt. Therefore, when such a circuit configuration is employed, power supply voltage Vcc requires a high voltage of about 1.7 volts or more.

In the circuit example shown in FIG. 2, since a signal is input to the RSSI amplifier from the emitter of the differential amplifier in the IF amplifier, the output level of the RSSI amplifier changes with temperature. To remove this temperature dependence,
The current supplied by the current source must be given an appropriate temperature dependency and must be temperature compensated, but the temperature compensation circuit is generally complicated.

[0005]

However, in a small radio receiver such as a paging receiver, it is desired to operate with a lower power supply voltage. An object of the present invention is to provide an RSSI circuit that can operate at a low voltage of, for example, about 1 volt. Another object of the present invention is to provide an RSSI circuit that can easily perform temperature correction.

[0006]

The above-mentioned problem is solved by the RSSI circuit described below. The RSSI circuit includes: an input terminal (in_p, in_n) for receiving an input signal, an output resistor coupled between the first power supply (Vcc) and the differential output node, and a coupling between the input terminal and the differential output node. A first amplifier for providing a differential output signal at a differential output node; a control terminal for receiving the differential output signal; a first controlled terminal for providing a first rectified signal; Transistor having control terminal (323,324)
A second amplifier for providing a rectified signal (I1) in response to the differential output signal; and providing a voltage signal (RSSI signal) substantially proportional to the rectified signal in response to the rectified signal (I1). A conversion circuit.

[0007]

FIG. 3 is a circuit diagram showing an RSSI circuit 300 according to the present invention. The RSSI circuit 300 is
The first amplifier stage 310 includes an IF amplifier and an RSSI amplifier, the second amplifier stage 320 includes a third amplifier stage including an IF amplifier, and the current-voltage conversion circuit 340. The IF amplifier in the first amplification stage 310 includes a bipolar transistor 311, 312 having a collector electrode coupled to a power supply Vcc via a resistor R, and a current source coupled to a commonly connected emitter electrode of the bipolar transistors 311, 312. 316. bipolar·
The base electrodes of the transistors 311 and 312 are i
The differential input signal is received by being coupled to terminals indicated by n_p and in_n. The IF amplifier of the second amplifying stage 320 is configured similarly,
The base electrode of the first amplification stage 310
It is configured to receive a differential output signal from the amplifier.
Further, the IF amplifier of the third amplification stage 330 is configured in the same manner, except that the base electrodes of the bipolar transistors 331 and 332 receive the differential output signal from the IF amplifier of the second amplification stage. The differential output signal amplified from the collector electrode 332 is supplied to the terminal Out.
1 and Out2. On the other hand, the amplification stage 31
0 RSSI amplifier is a bipolar transistor 31
3, 314, 315 and a current source 317. Unlike the conventional example (FIG. 2) which receives an input signal from the emitter side of the differential amplifier, the bipolar transistor 31
The base electrode of 3,314 receives the differential output signal from the IF amplifier, and the base electrode of bipolar transistor 315 is coupled to power supply Vcc. Collector electrodes of bipolar transistors 313 and 314 and bipolar transistors
The collector electrode of transistor 315 is coupled to the input node of current-to-voltage conversion circuit 340. The emitter electrodes of the bipolar transistors 313, 314, and 315 are commonly connected, and are coupled to the ground GND via the current source 317. The RSSI amplifier of the amplification stage 320 is similarly configured.

[0008] Resistors Ra and Rb are respectively coupled between the input node of the current-voltage conversion circuit 340 and the power supply Vcc. The source electrode of PMOS transistor 341 is coupled to one input node, and the drain electrode is coupled to the drain electrode of NMOS transistor 342. NMOS
The source electrode of transistor 342 is coupled to ground GND. The input node on the resistor Rb side is a current source 34.
6 to ground GND. The source electrode of PMOS transistor 343 is coupled to the other input node, and the drain electrode is coupled to the drain electrode of NMOS transistor 344. The source electrode of NMOS transistor 344 is coupled to ground GND. The drain electrode of the PMOS transistor 345 is connected to the ground GND via the output resistance Rrs. PMOS transistor 34
1,343,345 gate electrodes are coupled together and N
The gate electrodes of MOS transistors 342 and 344 are also coupled to each other. The gate electrodes and the drain electrodes of the MOS transistors 341 and 344 are respectively coupled to form
Transistors 341, 343, 342, 344, 341
And 345 each form a current mirror, and in the case of this embodiment, are a self-bias type current mirror. PM
Gate electrodes of OS transistors 341 and 343 and N
A capacitor C is provided between the gate electrodes of the MOS transistors.
To determine the frequency characteristic of the current-to-voltage conversion circuit 340 and prevent the current-to-voltage conversion circuit 340 from oscillating.

Next, the operation will be described. First, input signals are input from terminals indicated by in_p and in_n, and are passed through amplification stages 310, 320, 330, Out 1, O 2.
An output terminal indicated by ut2 is input to, for example, a detector. On the other hand, the differential output signal from the first amplification stage 310 is R
Input to the input to the SSI amplifier, rectified and I1, I2
To give a rectified signal represented by Here, the operation of the RSSI amplifier rectifying the input signal will be described with reference to FIG. FIG. 4A shows a circuit diagram of the RSSI amplifier. FIGS. 4B and 4C show typical waveforms of the differential output voltage from the IF amplifier. The amplitude of the waveform is 0.1 volt because the bipolar transistor 31
This is because the voltage drop due to the resistor R coupled between the collector electrodes 1 and 312 and the power supply Vcc is about 0.1 volt. FIG. 4D shows an output waveform of the rectified current. The input / output characteristics of the differential amplifier shown in FIG. 4E are generally as shown by a curve drawn by a solid line in FIG.
This curve is a characteristic for Ic1, but a characteristic for Ic2 is as a curve drawn by a broken line in FIG. This type of differential amplifier is used for an operational amplifier or the like, and usually uses input / output characteristics based on an input potential difference Vd = 0v. However, in this embodiment, since the rectifying operation is performed using such a differential amplifier, Vd = −0.
1v is used as a reference. That is, the offset is given by the voltage drop due to the resistor R. When the input signal levels (v1, v2) increase (decrease), the potentials of the base electrodes of the transistors 313, 314 increase (decrease), and the sum (I0) of the collector currents of the transistors 314, 315 increases (decreases). Transistors 313,
Since the emitter electrodes of 314 and 315 are commonly connected, the collector current of the transistor 315 shows a change opposite to the collector current of the transistors 313 and 314.
For example, if the collector current of transistors 313 and 314 increases from 0 to Iee / 2,
The collector current of No. 5 decreases from Iee to Iee / 2.
In this way, the RSSI amplifier can rectify the input signal.

In this embodiment, the power supply Vcc is changed to the ground GN.
Up to D, the signal flows through the resistor R of the differential amplifier, the transistor, and the current source. The potential difference between both ends of the differential output resistor R is about 0.1 volt, and the NPN transistor 313
Etc., the potential difference between the base and the emitter is about 0.7 volts.
A potential difference of 2 volts results. Therefore, the power supply voltage Vc
If c is 0.1 + 0.7 + 0.2 = 1.0 volt or more, the IF amplifier and the RSSI amplifier can be operated. Also, the IF amplifier and the RSSI amplifier can be constituted by MOS transistors, unlike the present embodiment. However, the potential difference between the gate and the source of the NMOS transistor is about 0.7 volt, and the current source is about 0.1 V. 2
A volt potential difference occurs. Therefore, when a circuit is constituted by MOS transistors, power supply voltage Vcc is about 1.0
If it is above volts, the IF and RSSI amplifiers can be activated. In any case, operation is possible at a low voltage of about 1 volt. This is the same even if the logic is inverted by exchanging the transistor types such as N-type and P-type.

Next, the signal rectified by the RSSI amplifier is supplied to input nodes A and B (FIG. 3) of the current / voltage conversion circuit 340. A current Io is generated in response to this signal, and the current Io flows through the output resistor Rrs, and the voltage Vrs
(= Rrs * Io) is the finally obtained RSSI output voltage. First, when the current I1 generated by the RSSI amplifier is 0, the current Imax (= N * Iss) is applied to the resistor Rb.
Flows, the potential difference generated across the resistor Rb is Rb * I
max. On the other hand, when the current I1 is 0, the current I2 is I
max, and since this current flows through the resistor Ra, the resistor R
The potential difference generated at both ends of a is Ra * Imax. In this embodiment, since the resistance values of the resistors Ra and Rb are equal, the potentials of the input nodes A and B are equal, and no current Io is generated. Thereafter, when the current I1 increases, the current flowing through the resistor Rb also increases, so that the potential difference generated between both ends of the resistor Rb increases. On the other hand, when the current I1 increases, the current I2 becomes Imax
, The potential difference generated between both ends of the resistor Ra becomes smaller. Therefore, a potential difference occurs between input nodes A and B, causing current Io, and an RSSI output voltage is obtained. Here, the voltage drop Vs due to the resistors Ra and Rb
Is set to be Vbe-Vce (sat) at the maximum. Vbe is a voltage between the base and the emitter of the NPN transistor and generally takes a value of about 0.7 volt.
Vce (sat) is the collector of the NPN transistor.
This is the saturation voltage between the emitters and generally takes a value of about 0.2 volt. In the present embodiment, the maximum value of the voltage drop Vs due to the resistors Ra and Rb is Rb * N * Iss. Is
s is a constant current value by a current source used in the RSSI amplifier, and N is the number of stages of the amplifier.

Next, the temperature dependency of the RSSI output voltage will be considered. In FIG. 5, if the potential difference between the power supply Vcc and the gate electrodes of the PMOS transistors 341, 343, and 345 is Vd, the following equation is established.

Vd = Ra * (2 * Io + I2) + Vgs2 = Rb * (Io + Imax + I1) + Vgs1 where Vgs1 is the voltage between the gate and source of the transistor 341 and Vgs2 is the transistor 343,3
45 is the voltage between the gate and the source. In this embodiment,
Ra = Rb, Imax = I1 + I2, and Vgs1 = Vgs2 because the drain currents are equal. Therefore, 2 * Io + I2 = Io + Imax + I1I
o = Imax + I1-I2Io = 2 * I1. Since the output voltage Vrs is Rrs * Io, Vrs = 2 * Rrs * I1. Therefore, the RSSI output voltage is proportional to the input current, and its temperature dependence is determined only by the temperature dependence of the output resistance Rrs. By the way, it is conceivable to extract the RSSI output signal from the input currents I1 and I2 using a general current mirror circuit. However, for example, if a circuit configuration as shown in FIG. 6 is employed, the value of Vgs2 changes depending on the value of the output current, so that Vgs1 = Vg
The relationship of s2 cannot be used. For this reason,
As in the present embodiment, it is difficult to secure a wide range of linearity (linearity), and the temperature dependency becomes complicated.

Next, the temperature correction of the RSSI output voltage will be described. The temperature characteristics in this embodiment are as follows: (1) IF
It is considered that the temperature characteristics depend on three factors: temperature characteristics caused by the gain of the amplifier, (2) temperature characteristics caused by the rectification of the RSSI amplifier, and (3) temperature characteristics in the current-voltage conversion circuit. However, since the temperature change caused by the rectification of the RSSI amplifier is small, it can be substantially ignored. The temperature dependency (1) due to the gain of the IF amplifier can be eliminated by making the current Iee flowing through the current source of each differential amplifier have a predetermined temperature coefficient. This can be done by using a bias circuit. The predetermined temperature coefficient is 1 / T
-A. Here, T is the absolute temperature, and a is the temperature coefficient of the resistor R. First, if the gain per stage of the IF amplifier is Av, then Av = gm * R = Iee / (2 * Vt) * R. gm is the transconductance [A / V], R
Is the output resistance [ohm] of the differential amplifier, Iee is the current [A] on the emitter side of the differential amplifier, and Vt is the thermal voltage [v] of the transistor. Thermal voltage is k * T /
It is an amount represented by q, k is Boltzmann's constant, and q is the charge amount [c] of electrons. Av temperature coefficient TC [ppm /
K] is TC = 1 / Av * d / dT (Av) = a + b-1 / T. Here, a is the temperature coefficient of resistance, and 1 / R *
It is represented by d / dT (R). b is a temperature coefficient of the current Iee and is represented by 1 / Iee * d / dT (Iee).
Therefore, if the temperature coefficient b of the current Iee is 1 / Ta, the temperature coefficient TC of the differential amplifier can be set to 0, and the temperature dependency can be eliminated.

Next, the temperature dependency in the current-voltage conversion circuit can be eliminated by making the constant current Iss in the RSSI amplifier have a predetermined temperature coefficient. This can also be performed by using a bias circuit. The predetermined temperature coefficient has the same absolute value as the temperature coefficient of the resistor Rrs and the opposite sign. In the present embodiment, the current-voltage conversion circuit 34
The maximum value of the input signal I1 of 0 was Imax / 2, but in this case, the RSSI output voltage Vrs is Rrs * 2 *
I1 = Rrs * Imax. RSSI output voltage Vr
The temperature coefficient TC of s is TC = 1 / Vrs * d / dT (V
rs) = a + c. Here, a is the temperature coefficient of the resistance, and is represented by 1 / Rrs * d / dT (Rrs). c
Is the temperature coefficient of the current Imax, and 1 / Imax * d /
It is represented by dT (Imax). Therefore, if the temperature coefficient c of the current Imax is −a, the temperature dependency of the RSSI output voltage Vrs can be eliminated.

In this embodiment, the power supply Vcc is switched to the ground GN.
Before reaching D, a resistor Rb, transistors 341 and 3
Via 42. Therefore, power supply voltage Vcc is
It needs to be equal to or more than s + Vgs + Vds. Vs is set to be at most Vbe-Vce (sat), which is about 0.5 volts. Vgs is about 0.7
Volts and Vds are about 0.2 volts. Therefore,
Assuming that Vs is 0.1 volt, the power supply voltage Vcc is about 1.
It suffices that the voltage be 0 volt or more, which enables low-voltage operation of the current-voltage conversion circuit. Also, unlike the present embodiment, the current-voltage conversion circuit can be constituted by a bipolar transistor. However, the potential difference between the base and the emitter of the PNP transistor is about 0.7 volt, and the collector-emitter voltage of the NPN transistor is Produces a potential difference of about 0.2 volts. The potential difference between the base and the emitter of the NPN transistor is about 0.7 volt, and the potential difference between the emitter and the collector of the PNP transistor is about 0.2 volt. Therefore, when a circuit is constituted by bipolar transistors, if Vs = 0.1 volts, the power supply voltage V
If cc is about 1.0 volt or more, the current-voltage conversion circuit can be operated. In any case, operation is possible at a low voltage of about 1 volt. This is because N-type and P
The same is true even if the logic is inverted by exchanging the transistor type such as the type. Since all of the IF amplifier, the RSSI amplifier, and the current-voltage conversion circuit can operate at a low voltage, the RSSI circuit configured from these can also operate at a low voltage.

FIG. 6 is an input / output characteristic diagram obtained as a result of performing a simulation on the RSSI circuit according to the present invention. In the simulation, as shown in FIG. 7, a circuit composed of an IF amplifier composed of six stages of differential amplifiers, an RSSI amplifier composed of five stages, and a current-voltage conversion circuit is used. Further, a bias circuit shown in FIG. 8 is used to perform temperature correction. In this circuit, the current value of the constant current source is Iss = Iee = 5 μA, the differential output resistance R is 40 kohm, the maximum current value Imax is 25 μA, R
The SSI output resistance is 24 kohm, and the resistances Ra and Rb in the current-voltage conversion circuit are both 2 kohm. In the characteristic diagram of FIG. 6, the horizontal axis represents the input signal level [dBm] from the IF amplifier, and the vertical axis represents the RSSI output voltage [v]. As is clear from FIG. 6, linearity can be obtained over a wide range of about 60 dBm, and an RSSI circuit having a wide dynamic range can be obtained. This range is
It can be expanded by increasing the number of stages of the differential amplifier of the IF amplifier. The set temperature is set to -20 degrees Celsius,
It was confirmed that the temperature change of the input / output characteristics when the temperature was changed to 0 degrees and 75 degrees was extremely small and was within the range of +/- 0.5 dB.

Although the present invention has been described with reference to a particular embodiment, it is not intended to be limited to this. For example, the transistors used are bipolar transistors, MO
It can also be constituted by an SFET or the like. However, as in the present embodiment, the IF amplifier and the RSSI amplifier are configured by bipolar transistors, and the current-voltage conversion circuit is configured by the MO.
The configuration using the SFET has an advantage that the matching between the devices is good in the portion configured by the bipolar transistor, and the current-voltage conversion circuit can reduce the current consumption.

[Brief description of the drawings]

FIG. 1 is an IF amplifier circuit and an RS in a wireless receiver.
FIG. 3 is a partial circuit diagram illustrating an SI circuit.

FIG. 2 is a circuit diagram showing an example of a conventional RSSI circuit.

FIG. 3 is a circuit diagram showing an RSSI circuit according to the present invention.

FIG. 4 is an explanatory diagram of an operation of the rectifier circuit used in the RSSI circuit according to the present invention.

FIG. 5 is a circuit diagram showing a conventional current-voltage conversion circuit.

FIG. 6 is an input / output characteristic diagram obtained as a result of performing a simulation on the RSSI circuit according to the present invention.

FIG. 7 is a circuit diagram used in the simulation of the RSSI circuit according to the present invention.

FIG. 8 is a circuit diagram showing a bias circuit that can be used in the RSSI circuit according to the present invention.

[Explanation of symbols]

21, 22, 23, 311 to 315, 321 to 325, 331, 332 Bipolar transistors 316, 317, 326, 327, 333, 346 Current sources 341 to 345 MOS transistors

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[Procedure amendment]

[Submission date] April 23, 1998

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0003

[Correction method] Change

[Correction contents]

FIG. 2 is a circuit diagram showing an example of a conventional IF amplifier, RSSI amplifier, and current / voltage conversion circuit. In this circuit diagram, the IF amplifier is composed of a differential amplifier composed of two sets of resistors R and transistors, the RSSI amplifier is composed of resistors and transistors, and the current-voltage conversion circuit is composed of a current mirror circuit composed of two transistors. ing. From the power supply to the ground, the signal flows through a resistor R and a transistor of the differential amplifier, a transistor of the RSSI amplifier, and a current source. Therefore, the power supply voltage Vcc is 2 * Vbe + Vce (sat) + R * Iee
The above voltage is required. Here, Vbe is a voltage between the base and the emitter of the NPN transistor and has a value of about 0.7 volt. Vce (sat) is a saturation voltage between the collector and the emitter of the NPN transistor.
Take a value of about 2 volts. Iee is the current flowing from the current source, and the voltage drop at the resistor takes a value of about 0.1 volt. Therefore, when such a circuit configuration is employed, power supply voltage Vcc requires a high voltage of about 1.7 volts or more.

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0009

[Correction method] Change

[Correction contents]

Next, the operation will be described. First, the input signal is in p and in n from the terminals indicated by n, through the amplification stages 310, 320, 330, Out1, O
An output terminal indicated by ut2 is input to, for example, a detector. On the other hand, the differential output signal from the first amplification stage 310 is R
Input to the input to the SSI amplifier, rectified and I1, I2
To give a rectified signal represented by Here, the operation of the RSSI amplifier rectifying the input signal will be described with reference to FIG. FIG. 4A shows a circuit diagram of the RSSI amplifier. FIGS. 4B and 4C show typical waveforms of the differential output voltage from the IF amplifier. The amplitude of the waveform is 0.1 volt because the bipolar transistor 31
This is because the voltage drop due to the resistor R coupled between the collector electrodes 1 and 312 and the power supply Vcc is about 0.1 volt. FIG. 4D shows an output waveform of the rectified current. The input / output characteristics of the differential amplifier shown in FIG. 4E are generally as shown by a curve drawn by a solid line in FIG.
This curve is a characteristic for Ic1, but a characteristic for Ic2 is as a curve drawn by a broken line in FIG. This type of differential amplifier is used for an operational amplifier or the like, and usually uses input / output characteristics based on an input potential difference Vd = 0 volt . However, in this embodiment, since the rectification operation is performed using such a differential amplifier, Vd = −
0.1 volt is used as a reference. That is, the offset is given by the voltage drop due to the resistor R. When the input signal levels (v1, v2) increase (decrease), the potentials of the base electrodes of the transistors 313, 314 increase (decrease), and the sum (10) of the collector currents of the transistors 314, 315 increases (decreases). Since the emitter electrodes of the transistors 313, 314, and 315 are commonly connected, the collector current of the transistor 315 changes opposite to the collector current of the transistors 313, 314. For example, if the collector current of the transistor 313 and 314 is increased from 0 to Iss / 2, the collector current of the transistor 315 is reduced from Iss into Iss / 2. In this way, the RSSI amplifier can rectify the input signal.

[Procedure amendment 3]

[Document name to be amended] Statement

[Correction target item name] 0013

[Correction method] Change

[Correction contents]

Vd = Ra * (2 * Io + I2) + Vgs2 = Rb * (Io + Imax + I1) + Vgs1 where Vgs1 is the voltage between the gate and source of the transistor 341 and Vgs2 is the transistor 343,3
45 is the voltage between the gate and the source. In this embodiment,
Ra = Rb, Imax = I1 + I2, and Vgs1 = Vgs2 because the drain currents are equal. Becomes Since the output voltage Vrs is Rrs * Io, Vrs = 2 * Rrs * I1. Therefore, the RSSI output voltage is proportional to the input current, and its temperature dependence is determined only by the temperature dependence of the output resistance Rrs. By the way, it is conceivable to extract the RSSI output signal from the input currents I1 and I2 using a general current mirror circuit. But for example figure
If the circuit configuration shown in FIG. 5 is adopted, the value of Vgs2 changes depending on the value of the output current, so that Vgs1 = Vg
The relationship of s2 cannot be used. For this reason,
As in the present embodiment, it is difficult to secure a wide range of linearity (linearity), and the temperature dependency becomes complicated.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0017

[Correction method] Change

[Correction contents]

FIG. 6 is an input / output characteristic diagram obtained as a result of performing a simulation on the RSSI circuit according to the present invention. In the simulation, as shown in FIG. 7, a circuit composed of an IF amplifier composed of six stages of differential amplifiers, an RSSI amplifier composed of five stages, and a current-voltage conversion circuit is used. Further, a bias circuit shown in FIG. 8 is used to perform temperature correction. In this circuit, the current value of the constant current source is Iss = Iee = 5 μA, the differential output resistance R is 40 kohm, the maximum current value Imax is 25 μA, R
The SSI output resistance is 24 kohm, and the resistances Ra and Rb in the current-voltage conversion circuit are both 2 kohm. In the characteristic diagram of FIG. 6, the horizontal axis represents the input signal level [dBm] from the IF amplifier, and the vertical axis represents the RSSI output voltage [v]. As is clear from FIG. 6, linearity can be obtained over a wide range of about 60 dB, and an RSSI circuit having a wide dynamic range can be obtained. This range is
It can be expanded by increasing the number of stages of the differential amplifier of the F amplifier. Also, the set temperature is set to -20 degrees Celsius,
It was confirmed that the temperature change of the input / output characteristics when the temperature was changed to 75 degrees was extremely small and was within the range of +/- 0.5 dB.

[Procedure amendment 5]

[Document name to be amended] Statement

[Correction target item name] Figure 3

[Correction method] Change

[Correction contents]

FIG. 3

Claims (6)

[Claims] An input terminal for receiving an input signal (in_p, in_n)
A differential output node; an output resistor coupled between a first power supply (Vcc) and the differential output node; and a differential transistor pair coupled to the input terminal and the differential output node. A first amplifier for providing a differential output signal at the differential output node; a transistor having a control terminal for receiving the differential output signal and a controlled terminal for providing a rectified signal (I1) that is a rectified current signal (313, 314) for providing a rectified signal (I1) in response to the differential output signal; and a voltage signal substantially responsive to the rectified signal in response to the rectified signal (I1) ( A conversion circuit for providing an RSSI signal).
SI circuit. 2. An input terminal for receiving an input signal (in_p, in_n).
And an output resistor coupled between the first power supply (Vcc) and the differential output node; and a differential transistor coupled to the input terminal and the differential output node. A first amplifier for providing a dynamic output signal; first and second rectified signals (I1, I2) in response to the differential output signal
And a transistor having a control terminal for receiving the differential output signal, a first controlled terminal for providing the first rectified signal, and a second controlled terminal.
14), wherein the second rectified signal (I2) is the first rectified signal
A second amplifier that decreases as (I1) increases and increases as the first rectified signal (I1) decreases; and provides an RSSI signal in response to the first and second rectified signals (I1, I2). A conversion circuit, the conversion circuit comprising:
A first input node for receiving a rectified signal; a second input node for receiving the second rectified signal; a first transistor having a control terminal and a controlled terminal coupled to the first input node; A second transistor (343) having a control terminal coupled to the control terminal of one transistor (341) and a controlled terminal coupled to the second input node; a control terminal coupled to the control terminal of the first transistor; A third transistor (345) having a first controlled terminal coupled to the second input node and a second controlled terminal coupled to an output node for providing an RSSI output signal; and a third transistor (345) connected to the output node and a second power supply. An output resistor (Rrs) coupled therebetween, wherein the current flowing through the output resistor is substantially proportional to the first rectified signal. 3. The first, second, and third conversion circuits in the conversion circuit.
3. The RSSI circuit according to claim 2, wherein the transistors form a current mirror circuit. 4. When T indicates an absolute temperature and a indicates a temperature coefficient of the output resistance, a temperature coefficient indicating a temperature dependency of a current flowing through the first current source is substantially (1 / T−
3. The RSSI circuit according to claim 2, wherein a temperature coefficient represented by a) and indicating a temperature dependency of a current flowing through the second current source is substantially represented by (-a). 5. The potential of the first power supply includes a voltage generated between both ends of an output resistor coupled between the differential output node and the first power supply, and control of a transistor forming the second amplifier. 3. A voltage generated between a terminal and a second controlled terminal, a voltage generated in a current source included in the second amplifier, and a potential of the second power supply, substantially equal to the sum of the potentials. The described RSSI circuit. 6. The potential of the first power supply includes a voltage generated between both ends of a first resistor of the conversion circuit, a voltage generated between a control electrode and a controlled electrode of the first transistor, and a potential of the first power supply. 3. The RSSI circuit according to claim 2, wherein a voltage generated between a controlled electrode of the transistor coupled between the transistor and the second power supply is substantially equal to a sum of a potential of the second power supply.