JPH11251521A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form one electrode of a capacitor of the same time with an active layer(contact layer) of an FET(field-effect transistor). SOLUTION: An active layer (n-type region) 2 is formed in an FET region of a GaAs substrate 1 through ion implantation. When a contact layer (N<+> -type region) 4, etc., are formed by still further ion implantation in both end parts of the active layer 2, a lower electrode 22 is also formed in a capacitor formation region by ion implantation. Then, an SiNx film 6 is formed on the lower electrode 22, and a capacitor is prepared by putting an upper electrode overlapping it.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a semiconductor device. In particular, the present invention relates to a technique for forming a capacitor in a semiconductor device.

[0002]

2. Description of the Related Art FIGS. 1 (a) to 1 (d) and FIGS. 2 (a) to 2 (d) show a structure and a manufacturing method of a conventional semiconductor device having an FET (field effect transistor), a semiconductor resistance element and an MIM (Metal-Insulator-Metal) capacitor. This will be described with reference to e) to (h). First, the surface layer of the semi-insulating GaAs substrate 1 is doped with Si by ion implantation and activated by heat treatment to activate the active layer (n-type region) 2 and the semiconductor resistance layer (n-type region) 3.
To form Further, Si is heavily doped into both end regions of the active layer 2 and the semiconductor resistance layer 3 and activated by heat treatment to form contact layers (n ⁺ regions) 4 and 5 (FIG. 1A).

When the formation of the active layer 2, the semiconductor resistance layer 3, and the contact layers 4 and 5 is completed, the S
An iNx film 6 is formed [FIG. 1 (b)], and the SiNx film 6 is selectively formed by photolithography or an etching process in a region where an ohmic electrode of a FET, a Schottky electrode, and an ohmic electrode of a semiconductor resistor are to be formed. An opening 7 is provided by removing the film [FIG. 1 (c)]. Next, AuGe / Ni-based ohmic electrodes 8 and 9 are formed on each of the contact layers 4 and 5 by using processes such as photolithography, vapor deposition, and lift-off.
After heat-treating the ohmic electrodes 9 and 9 to form ohmic junctions with the GaAs substrate 1, a Schottky electrode 10 is formed on the active layer 2 (FIG. 1D). Thus, the FET 11 and the semiconductor resistance element (injection resistance) 12 are formed on the surface of the GaAs substrate 1.

Thereafter, a photoresist 13 is applied to the entire surface of the GaAs substrate 1, an opening is formed in the lower electrode formation region of the capacitor by photolithography, and a Ti / P
An electrode material 14 of t / Au is sequentially deposited [FIG.
(E)]. Then, the photoresist 13 is peeled off, and lift-off is performed to form Ti / Pt / A on the SiNx film 6.
The lower electrode 15 made of u is formed (FIG. 2F). Then, the entire GaAs substrate 1 is S
The SiNx film 16 is covered with an iNx film 16 and an opening 17 is formed in the SiNx film 16 for wiring to a lower electrode [FIG. 2 (g)]. Next, by using processes such as photolithography, vapor deposition, and lift-off, SiNx is formed in the capacitor region.
An upper electrode 18 made of Ti / Au or Ti / Pt / Au is formed on the film 16 [FIG. 2 (h)]. Thereby, the SiNx film (dielectric layer) 1 is formed on the GaAs substrate 1.
6 in which the upper electrode 18 and the lower electrode 15 face each other
An IM capacitor 19 is manufactured.

[0005]

On a semiconductor substrate, a field effect transistor (FET), a heterojunction bipolar transistor (HBT), a diode (Schottky barrier diode), a semiconductor resistor (epi resistance, injection resistance), a capacitor, and the like are provided. Are formed, and among them, as described above, the Ti / Au is formed on the semiconductor substrate.
Alternatively, an MIM capacitor having a structure in which a dielectric layer is sandwiched between an upper electrode and a lower electrode formed by evaporating Ti / Pt / Au is generally used. Here, the reason why Ti / Au or Ti / Pt / Au is used as the upper layer electrode and the lower layer electrode is that they have excellent adhesion to the dielectric layer.

However, the steps for forming the upper electrode and the lower electrode of the capacitor each require a single step, so that the number of manufacturing steps of the semiconductor device is increased and the manufacturing process is complicated.

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has as its object to simplify the manufacturing process of a semiconductor device by forming one of the electrodes of a capacitor with an ion doping layer. It is to improve the reliability of the electrical characteristics.

[0008]

DISCLOSURE OF THE INVENTION A semiconductor device according to the present invention is a semiconductor device in which a capacitor having a pair of electrodes opposed to each other with a dielectric layer interposed therebetween is formed on a semiconductor substrate. It is a doping layer.

Here, in order to use the ion doping layer as an electrode of a capacitor, its sheet resistance is 5
It is desirable that the resistance is not more than 00Ω / □. When the ion doping layer is formed by an ion implantation method, the peak carrier concentration may be set to 1 × 10 ¹⁷ cm ⁻³ or more.

In the present invention, one of the electrodes of the capacitor is formed by an ion doping layer.
One of the electrodes of the capacitor can be manufactured in the same process as the ion doping layer such as the active layer of the FET or the semiconductor resistance layer of the semiconductor resistance element. Further, process parameters (photolithography conditions, deposition conditions, and the like) to be managed in the capacitor electrode formation process can be reduced. Therefore, according to the present invention, the number of processes and management parameters required for manufacturing a semiconductor device can be reduced, the manufacturing process of the semiconductor device can be simplified, and the manufacturing cost can be reduced. Further, by simplifying a manufacturing process and reducing management parameters, variation in electrical characteristics of a semiconductor device can be reduced, and reliability of electrical characteristics can be improved.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure and manufacturing method of a semiconductor device having an FET, a semiconductor resistance element and a capacitor according to an embodiment of the present invention will be described with reference to FIGS.
(G). First, by ion implantation,
The surface layer of the semi-insulating GaAs substrate 1 is doped with Si and activated by heat treatment to form an active layer (n-type region) 2 and a semiconductor resistance layer (n-type region) 3. Further, Si is heavily doped into both end regions of the active layer 2 and the semiconductor resistance layer 3 and the capacitor forming region through the window 21a of the mask 21 formed on the surface of the GaAs substrate 1 [FIG. 3 (a)]. ,
Activated by heat treatment to form contact layers (n ⁺ regions) 4 and 5 of the FET and the semiconductor resistance element and to form a lower electrode (n ⁺ region) 22 of the capacitor [FIG.
(B)]. Here, doping of the lower electrode 22 with Si is performed by ion implantation, and the peak carrier concentration is 1%.
It is desirable that the resistivity is not less than × 10 ¹⁷ cm ⁻³ and the sheet resistance of the lower electrode 22 is not more than 500 Ω / □.

Next, the entire surface of the GaAs substrate 1 is covered with Si.
An Nx film 6 is formed (FIG. 3C), and a SiNx film 6 is formed in a region where an FET, a semiconductor resistor, or the like is to be formed.
Is selectively removed by photolithography or an etching process to provide an opening 7 (FIG. 3D). At this time, an opening 23 for exposing a part of the lower electrode 22 is simultaneously formed in the SiNx film 6.

Thereafter, through photolithography, deposition of a metal material for an ohmic electrode, and lift-off,
FET ohmic electrodes (source electrode, drain electrode)
8, an ohmic electrode (terminal electrode) 9 of the semiconductor resistor element and an ohmic electrode (terminal electrode) 24 of the lower electrode 22 are formed (FIG. 4E). Next, heat treatment is performed at 400 ° C. for 5 minutes in an N ₂ atmosphere to form ohmic electrodes 8 and
Ohmic contacts 9 and 24 are made to the GaAs substrate 1. Here, the metal material for the ohmic electrode is, for example, AuGe
(100 nm thick), Ni (30 nm thick), Au (100
nm thick). At this stage, the GaAs substrate 1 has
A semiconductor resistance element (injection resistance) 12 is manufactured.

Next, a Schottky electrode (gate electrode) 10 is formed on the active layer in the FET region [FIG.
(F)]. Thereby, the FET is formed on the GaAs substrate 1.
11 are produced.

Next, a photoresist (not shown) is applied to the surface of the GaAs substrate 1, and an opening for forming an upper electrode 25 of the capacitor is formed in the photoresist by a photolithography method, and Ti / Au or Ti
An electrode metal material of / Pt / Au is deposited, and the upper electrode 25 of the capacitor is formed by lift-off [FIG. 4 (g)]. Thus, on the GaAs substrate 1, the lower electrode 22 composed of the ion implantation layer and the upper electrode 2 composed of the metal electrode are formed.
A capacitor 26 having a structure in which the SiNx film 6 is interposed between the capacitors 5 is manufactured.

According to the semiconductor device having such a structure, since the lower electrode 25 of the capacitor 26 is formed by the ion-implanted layer, the number of electrodes (or the number of metal layers) of the semiconductor device can be reduced, and the cost can be reduced. Can be reduced. Further, since the ion-implanted layers (contact layers 4 and 5) of the FET and the semiconductor resistor and the lower electrode 22 of the capacitor 26 are simultaneously manufactured by the same process, a separate process for forming the lower electrode of the capacitor is not required. , Furthermore, photolithography conditions and electrode metal deposition conditions,
Since process parameters for controlling cleaning and the like can be reduced (unified with control parameters for forming a contact layer), the manufacturing process of the semiconductor device is simplified. Therefore, the manufacturing process of the semiconductor device can be simplified, and the manufacturing cost can be reduced. Further, by reducing the number of steps, variation in characteristics can be reduced, and reliability of electrical characteristics can be improved.

Further, as is clear from the fact that the SiNx film is conventionally formed on the GaAs substrate,
Since there is no problem with the adhesion between the x film and the GaAs substrate, there is no problem with the adhesion between the SiNx film 6 and the lower electrode 22, and there is no possibility that the capacitor will peel off.

The wiring for connecting the ohmic electrode 8 of the FET 11 or the ohmic electrode 9 of the semiconductor resistor 12 to the lower electrode 22 is also formed by an ion-implanted layer (n ⁺ region) ion-implanted into the GaAs substrate 1. You can also. Thus, the process for manufacturing a wiring of a semiconductor device can be simplified, and the reliability of electrical characteristics can be improved.

[Brief description of the drawings]

FIGS. 1A to 1D are schematic cross-sectional views illustrating a structure and a manufacturing method of a semiconductor device according to a conventional example.

FIGS. 2 (e) to (h) are continuation diagrams of the above.

3A to 3D are schematic cross-sectional views illustrating a structure and a method of manufacturing a semiconductor device according to an embodiment of the present invention.

4 (e) to 4 (g) are continuation diagrams of the above.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semi-insulating GaAs substrate 6 SiNx film 8, 9, 24 Ohmic electrode 11 FET 12 Semiconductor resistance element 22 Lower electrode of capacitor 25 Upper electrode of capacitor 26 Capacitor

Claims (4)

[Claims] 1. A semiconductor device in which a capacitor having a pair of electrodes opposed to each other via a dielectric layer is formed on a semiconductor substrate, wherein one electrode of the capacitor is an ion doping layer formed on the semiconductor substrate. Semiconductor device. 2. The semiconductor device according to claim 1, wherein an element other than the capacitor is formed on the semiconductor substrate together with the capacitor, wherein the ion doping layer of the capacitor is formed by the same process as the ion doping layer of the element other than the capacitor. A semiconductor device characterized by being formed. 3. The semiconductor device according to claim 1, wherein the ion doping layer has a sheet resistance of 500 Ω / □ or less. 4. The semiconductor according to claim 1, wherein the ion doping layer is formed by an ion implantation method, and has a peak carrier concentration of 1 × 10 ¹⁷ cm ⁻³ or more. apparatus.