JPH11233917A - Manufacture of multilayer board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the delamination of layers in a vertically multilayer board. SOLUTION: A copper film 22 is thermo-compression bonded to one side of an insulating resin sheet 21 made of prepreg, by vacuum pressing at a temperature (for example, 170 deg.C) lower than the resin hardening temperature under 30 kgf/cm<2> for 40 minutes. After that, an unwanted portion of the copper foil 22 is removed by an etching method for forming a pattern of a via-conductor 23. Furthermore, after the surface of the via-conductor 23 is made rough by soft etching, a plurality of insulating resin sheets 21 are stacked and integrated. After that, the multilayer body of the insulating resin sheets 21 is cut into board sizes by dicing, thus producing a plurality of multilayered boards 24. After the cutting, the multilayered board 24 is post-baked at a temperature (for example, 200 deg.C) not lower than the resin curing temperature for 2 hours in an N2 atmosphere. After that, buff polishing with a roughness of 2 μm is carried out on the cut surface of the multilayer board 24 for 20 minutes, and the cut surface is further polished by jet scrubbing and, thus the cut surface (component side) of the multilayered board 24 is planarized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a laminated substrate with an improved method of forming via conductors.

[0002]

2. Description of the Related Art With the recent increase in performance and miniaturization of IC chips, increasing the wiring density and increasing the number of pins of a substrate on which the IC chip is mounted have become important technical issues. Current,
An example of a high-density mounting board that has been put into practical use is a build-up multilayer board. This is, as shown in FIG.
An epoxy-based photosensitive insulating resin layer 12 is formed on both surfaces or one surface of a glass epoxy substrate 11 serving as a core substrate, and a via hole 13 is formed in the photosensitive insulating resin layer 12 by a photo-etching method. Then, the inner conductor pattern 14 and the via conductor 15 are formed, and thereafter, the same steps are sequentially repeated to form a multilayer.

[0003]

However, in the above-mentioned build-up multi-layer substrate, a multi-layered photosensitive insulating resin layer 12 is required.
Due to drying shrinkage of the substrate, the substrate is warped, which causes a bonding failure of an IC chip mounted on the substrate. Further, in the method of forming the via hole 13 by a photo etching method,
The via diameter is limited to 50 μmφ. This is because
In order to make the photosensitive insulating resin layer 12 a good insulating layer, it is necessary to use a photosensitive insulating resin paste having excellent thermal characteristics and reliability, because the resolution of photoetching is limited, and Since the via conductor 15 is formed by copper plating, the via hole 1 needs to be spread over the plating solution.
This is because the hole diameter of No. 3 is limited.

In order to solve such a problem, the present inventor has proposed that the bonding surface between the insulating resin layers be perpendicular to the mounting surface as shown in the specification of Japanese Patent Application No. 10-6650. A vertical laminated substrate has been proposed in which each insulating resin layer is laminated, cut into a substrate size, and a via conductor is formed with a wiring pattern formed in advance on each insulating resin layer. This vertical laminated substrate can form a via conductor of 30 μmφ by forming a pattern of the via conductor by a photoetching method.

However, according to recent test results, in the vertical laminated substrate, the pattern of the via conductor and the insulating resin layer may be slightly peeled off after cutting, and this delamination reduces the yield and the reliability. It turned out to be the cause.

[0006] The present invention has been made in view of such circumstances, and an object thereof is to prevent the occurrence of delamination after cutting in a vertical laminated substrate.
It is an object of the present invention to provide a method of manufacturing a laminated substrate that can improve the yield and the reliability.

[0007]

In order to achieve the above object, a method of manufacturing a laminated substrate according to the present invention comprises the steps of: forming a copper foil on an insulating resin sheet made of prepreg as a material for forming an insulating resin layer; After thermocompression bonding at a temperature, unnecessary portions of the copper foil are etched to form wiring patterns for via conductors. Thereafter, a plurality of insulating resin sheets are laminated, cut into a substrate size, cut, post-baked at a temperature equal to or higher than the resin curing temperature, and then the cut surface is polished to finish as a mounting surface.

In this case, when thermocompression bonding of the copper foil to the insulating resin sheet made of prepreg is performed at a temperature lower than the resin curing temperature, the curing of the insulating resin sheet is suppressed halfway. Then, after laminating and cutting the insulating resin sheet, post-bake at a temperature equal to or higher than the resin curing temperature,
In the process of completely thermosetting the insulating resin layer (insulating resin sheet) of the laminated substrate, the bonding force between the insulating resin layers and the bonding force between the via conductor pattern and the insulating resin layer are increased, and delamination is prevented. .

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a method for manufacturing a laminated substrate according to an embodiment of the present invention will be described with reference to FIG. Thermosetting insulating resin sheet 21 formed by prepreg
A copper foil 22 (thickness 10 to 12 μm) is superimposed on one side of at a temperature lower than the resin curing temperature (for example, 170 ° C.)
The copper foil 22 is thermocompression bonded to one surface of the insulating resin sheet 21 by vacuum pressing at 30 kgf / cm ² for 40 minutes. At this time, since the insulating resin sheet 21 is thermocompression-bonded at a temperature lower than the resin curing temperature, the curing of the insulating resin sheet 25 is suppressed halfway.

In the next step, a dry film (photosensitive film) not shown is laminated on the surface of the copper foil 22.
Instead of the dry film, a photosensitive resist may be applied to the entire surface of the copper foil 22 by a spin coater. Thereafter, only the via conductor pattern forming portion of the dry film is exposed (80 mj), and the exposed portion is immersed in an alkali developing solution for, for example, 30 seconds and developed, and the portion of the dry film other than the via conductor pattern forming portion is exposed. Is removed. Thereafter, the portion of the copper foil 22 exposed from the dry film (that is, the portion other than the via conductor pattern forming portion) is removed by etching with an alkaline etchant, and then the dry film is peeled off with acetone. Thereby, a pattern of the plurality of via conductors 23 is formed on the insulating resin sheet 21.

Thereafter, the surface of the via conductor 23 is roughened by soft etching, and an adhesive is applied to the entire surface of the insulating resin sheet 21.
Are laminated and integrated.

Thereafter, the laminate of the insulating resin sheets 21 is cut by dicing to a substrate size, and a plurality of laminate substrates 24 are formed from one laminate. After cutting, the laminated substrate 24 is post-baked in a N ₂ atmosphere at a temperature equal to or higher than the resin curing temperature (for example, 200 ° C.) for 2 hours. This allows
The insulating resin sheet 21 (insulating resin layer) is completely thermoset, thereby increasing the bonding force between the insulating resin sheets 21 and the bonding force between the pattern of the via conductors 23 and the insulating resin sheet 21 to prevent delamination. I do.

Thereafter, the cut surface of the laminated substrate 24 is subjected to buffing at a roughness of 2 μm for 20 minutes, and further polished with a jet scrub to flatten the cut surface (mounting surface) of the laminated substrate 24. In the next step, a photosensitive solder resist 25 is applied on the entire surface of the laminated substrate 24 by printing, and this is exposed and developed, and the upper end portion of the via conductor 23 is placed on the laminated substrate 24.
It is exposed from the coating of the solder resist 25 on the surface. Then, after the upper end exposed portion of the via conductor 23 is subjected to electroless Ni plating and electroless Au plating to form the pad 26,
A solder paste is screen-printed on the pad 26, and the solder on the pad 26 is melted by reflow to form a solder bump.

In the above-described method for manufacturing the laminated substrate 24, a reliability evaluation test for evaluating the effect of post-baking performed after the cutting of the laminated substrate 24 was performed. The test results are shown in Table 1 below.

[0015]

[Table 1]

The sample substrate used in the reliability evaluation test has 10 layers and has 5 patterns of via conductors per layer, and a total of 50 via conductor patterns are formed as a whole substrate. Table 1 shows that the PCT (Pressure Cooker) at 121 ° C. for 200 hours was used for each sample substrate.
Test) to measure the number of conductor blisters caused by delamination of each sample substrate. As a result, the sample substrate NO. In No. 1, conductor swelling occurred in 50 places.

On the other hand, after cutting, the sample substrate NO. Which was post-baked at a temperature (200 ° C.) higher than the resin curing temperature in an N ₂ atmosphere. 2 to NO. In No. 4, the number of conductor blisters was significantly reduced. The longer the post-baking time, the greater the effect of the post-baking (that is, the increase in the interlayer bonding force). ), The number of blisters in the conductor becomes one, and the post-bake (N
O. In 4), no conductor swelling occurred.

From the above test results, it has been confirmed that when post-baking is performed at a temperature equal to or higher than the resin curing temperature after cutting, the joining force between the insulating resin sheets and the joining force between the via conductor pattern and the insulating resin sheet are greatly increased. In particular, it was confirmed that swelling of the conductor (delamination) was reliably prevented when post-baking was performed for 2 hours. Note that the laminated substrate of the present invention may be joined to the base substrate by an adhesive, a conductive paste, or the like.

[0019]

As is apparent from the above description, according to the method of manufacturing a laminated substrate of the present invention, a copper foil is thermocompression-bonded to an insulating resin sheet at a temperature lower than the resin curing temperature, and the via conductor is formed by photoetching. After forming a wiring pattern for use, laminating a plurality of this insulating resin sheet and cutting it into a board size, post-baking is performed at a temperature equal to or higher than the resin curing temperature. The bonding strength with the resin layer can be increased, delamination can be prevented, and the yield and reliability can be improved.

[Brief description of the drawings]

FIGS. 1A and 1B illustrate a method for manufacturing a laminated substrate according to an embodiment of the present invention, in which FIG. 1A is a longitudinal sectional view showing a state in which copper foil is bonded to an insulating resin sheet, and FIG. Perspective view showing a state where a pattern of a via conductor is formed,
(C) is a perspective view showing a state in which the insulating resin sheets are laminated,
(D) is a perspective view of the laminated substrate.

FIG. 2 is a longitudinal sectional view schematically showing the structure of a conventional build-up multilayer substrate.

[Explanation of symbols]

21: insulating resin sheet, 22: copper foil, 23: via conductor,
24: laminated substrate, 25: solder resist, 26: pad.

Claims (1)

[Claims] 1. A laminated substrate in which insulating resin layers are laminated so that a bonding surface between insulating resin layers is perpendicular to a mounting surface, and a via conductor is formed with a wiring pattern formed in advance on each insulating resin layer. In the manufacturing method, after thermally bonding a copper foil to a prepreg insulating resin sheet to be a material for forming the insulating resin layer at a temperature lower than a resin curing temperature, an unnecessary portion of the copper foil is etched to form a via conductor. After forming a wiring pattern, laminating a plurality of the insulating resin sheets, cutting this into a substrate size, post-baking at a temperature equal to or higher than the resin curing temperature after the cutting, polishing the cut surface to finish as a mounting surface. A method for manufacturing a laminated substrate, comprising: