JPH11233562A - Semiconductor device and inspection device therefor - Google Patents
Semiconductor device and inspection device thereforInfo
- Publication number
- JPH11233562A JPH11233562A JP3173598A JP3173598A JPH11233562A JP H11233562 A JPH11233562 A JP H11233562A JP 3173598 A JP3173598 A JP 3173598A JP 3173598 A JP3173598 A JP 3173598A JP H11233562 A JPH11233562 A JP H11233562A
- Authority
- JP
- Japan
- Prior art keywords
- pad
- wiring
- wiring board
- semiconductor device
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体装置及び半
導体装置検査装置に係り、より詳しくは、半導体素子を
載置する載置板に配置されたハンダ端子と配線板に配置
されたパッドとの固着状態を確認可能な半導体装置及び
この固着状態を検査する半導体装置検査装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a semiconductor device inspection apparatus, and more particularly, to a method for forming a semiconductor device and a solder terminal disposed on a mounting plate for mounting a semiconductor element on a wiring board. The present invention relates to a semiconductor device capable of confirming a fixed state and a semiconductor device inspection apparatus for inspecting the fixed state.
【０００２】[0002]
【従来の技術】従来より、ボール・グリッド・アレイ
（ＢＧＡ）型の半導体装置は、半導体素子を載置板に載
置し、この載置板をプリント配線基板に固着している。
半導体素子には複数の配線が接続され、この複数の配線
は、載置板に設けられた貫通孔を介して、半導体素子載
置面と逆面に固着されたハンダ端子に接続されている。
そして、この複数のハンダ端子は、プリント配線基板上
の複数のパッドに、リフロー等により一括してハンダ付
けされている。2. Description of the Related Art Conventionally, in a ball grid array (BGA) type semiconductor device, a semiconductor element is mounted on a mounting plate, and the mounting plate is fixed to a printed wiring board.
A plurality of wirings are connected to the semiconductor element, and the plurality of wirings are connected to solder terminals fixed to the surface opposite to the semiconductor element mounting surface through through holes provided in the mounting plate.
The plurality of solder terminals are collectively soldered to a plurality of pads on the printed wiring board by reflow or the like.
【０００３】ここで、半導体装置が機能を発揮するため
には、載置板上の複数のハンダ端子とプリント配線板上
の複数のパッドとが正常にハンダ付けされていなければ
ならない。Here, in order for a semiconductor device to exhibit its function, a plurality of solder terminals on a mounting board and a plurality of pads on a printed wiring board must be properly soldered.
【０００４】一方、ＢＧＡ型の半導体装置では、載置板
とプリント配線板との間に隠れて、上記ハンダ端子とパ
ッドとが正常にハンダ付けされているか否かを直接確認
することができない。On the other hand, in a BGA type semiconductor device, it is not possible to directly check whether or not the solder terminals and pads are normally soldered, hidden between the mounting board and the printed wiring board.
【０００５】そこで、半導体装置をＸ線装置内に収納
し、Ｘ線を用いて半導体装置を透視し、ハンダの形状や
大きさを観察して、載置板上の複数の端子とプリント配
線板上の複数の端子とが正常にハンダ付けされているか
否かを確認している。[0005] Therefore, the semiconductor device is housed in an X-ray device, the semiconductor device is seen through using X-rays, the shape and size of the solder are observed, and a plurality of terminals on the mounting board and the printed wiring board are connected. It is checked whether the above terminals are properly soldered.
【０００６】[0006]
【発明が解決しようとする課題】しかしながら、従来の
方法は、Ｘ線を用いて半導体装置を透視し、間接的に確
認しているので、確認精度が悪い。However, in the conventional method, since the semiconductor device is seen through the X-ray and is indirectly checked, the checking accuracy is low.
【０００７】本発明は、上記事実に鑑み成されたもの
で、半導体素子を載置する載置板に配置されたハンダ端
子と配線板に配置されたパッドとが正常に接続されてい
るか否かを直接確認することの可能な半導体装置及びこ
の半導体装置を検査する半導体装置検査装置を提供する
ことを目的とする。The present invention has been made in view of the above-mentioned circumstances, and it is intended to determine whether or not a solder terminal disposed on a mounting plate on which a semiconductor element is mounted and a pad disposed on a wiring board are normally connected. It is an object of the present invention to provide a semiconductor device capable of directly confirming the above and a semiconductor device inspection apparatus for inspecting the semiconductor device.
【０００８】[0008]
【課題を解決するための手段】上記目的達成のため第１
の発明は、半導体素子を載置した載置板と、前記載置板
に対向するように近接配置され、第１の配線が設けられ
ると共に該第１の配線に接続されかつ前記載置板側面に
配置されたパッドを備えた配線板と、前記載置板の前記
配線板側の面に配置され、前記半導体素子に第２の配線
を介して接続されると共に前記パッドに固着されるハン
ダ端子と、を含んで構成された半導体装置であって、前
記配線板に、前記パッドと前記ハンダ端子との固着状態
を確認するための貫通孔を形成したことを特徴とする。In order to achieve the above object, a first method is provided.
According to the invention, there is provided a mounting plate on which a semiconductor element is mounted, disposed close to the mounting plate so as to face the mounting plate, provided with a first wiring, connected to the first wiring, and connected to a side surface of the mounting plate. And a solder terminal disposed on the wiring board-side surface of the mounting board, connected to the semiconductor element via a second wiring, and fixed to the pad. And a through hole for confirming a fixed state of the pad and the solder terminal in the wiring board.
【０００９】第１の発明に係る載置板には半導体素子が
載置される。第１の配線が設けられると共に該第１の配
線に接続されかつ載置板側面に配置されたパッドを備え
た配線板は、載置板に対向するように接近して配置され
る。そして、載置板の配線板側の面には、半導体素子に
第２の配線を介して接続されると共にパッドに固着され
るハンダ端子が配置される。A semiconductor element is mounted on the mounting plate according to the first invention. The wiring board provided with the first wiring and having pads connected to the first wiring and arranged on the side surface of the mounting plate is disposed close to and facing the mounting plate. A solder terminal connected to the semiconductor element via the second wiring and fixed to the pad is arranged on the surface of the mounting plate on the wiring board side.
【００１０】このように半導体素子に第２の配線を介し
て接続されるハンダ端子が、第１の配線に接続されるパ
ッドに固着されるので、配線板の第１の配線は、パッ
ド、ハンダ端子、及び第２の配線を介して、半導体素子
に接続される。As described above, the solder terminal connected to the semiconductor element via the second wiring is fixed to the pad connected to the first wiring, so that the first wiring of the wiring board is formed by the pad, the solder, and the like. The semiconductor device is connected to the semiconductor element through the terminal and the second wiring.
【００１１】ところで、ハンダ端子及びパッドは、載置
板及び配線板の間に隠れている。一方、第１の発明で
は、配線板に、パッドとハンダ端子との固着状態を確認
するための貫通孔を形成している。The solder terminals and pads are hidden between the mounting plate and the wiring board. On the other hand, in the first invention, a through hole is formed in the wiring board for confirming a fixed state between the pad and the solder terminal.
【００１２】このように、配線板に、パッドとハンダ端
子との固着状態を確認するための貫通孔を形成している
ので、貫通孔を介してハンダ端子とパッドとが正常に固
着しているか否かを直接視覚的に確認することができ
る。As described above, since the through-hole for confirming the fixing state of the pad and the solder terminal is formed in the wiring board, whether the solder terminal and the pad are properly fixed through the through-hole. It can be visually confirmed directly.
【００１３】このように、ハンダ端子とパッドとが正常
に固着しているか否かを目視的に直接確認することがで
きるので、確認精度が向上する。As described above, since it is possible to directly visually check whether the solder terminal and the pad are properly fixed, the checking accuracy is improved.
【００１４】なお、第２の発明のように、測定装置によ
り、第１の発明の半導体装置における貫通孔の深さを測
定して、ハンダ端子とパッドとが正常に固着されている
か否かを確認するようにしてもよい。As in the second invention, the depth of the through hole in the semiconductor device of the first invention is measured by a measuring device to determine whether or not the solder terminal and the pad are properly fixed. You may confirm it.
【００１５】このように貫通孔の深さを測定装置により
測定してハンダ端子とパッドとが正常に固着されている
か否かを確認するので、確認精度が向上する。As described above, since the depth of the through hole is measured by the measuring device to check whether the solder terminal and the pad are properly fixed, the checking accuracy is improved.
【００１６】[0016]
【発明の実施の形態】以下、本発明の実施の形態を図面
を参照して詳細に説明する。Embodiments of the present invention will be described below in detail with reference to the drawings.
【００１７】図１及び図２に示すように、本実施の形態
に係る半導体装置は、半導体素子１４を載置する載置板
１２を備えている。載置板１２の半導体素子載置面１２
Ａと逆面１２Ｂには、複数のハンダ端子２２Ｇ（２２Ｎ
Ｇ）が配置されている。ハンダ端子２２Ｇ（２２ＮＧ）
は、導通板１９が接続されている。導通板１９は、載置
板１２に形成された貫通孔１８の内面の図示しない導体
に接続されている。導体は、配線１７、バンプ端子１６
Ｂ２、配線１６、バンプ端子１６Ｂ１を介して半導体素
子１４に接続されている。即ち、複数のハンダ端子２２
Ｇ（２２ＮＧ）各々は半導体素子１４に接続されてい
る。なお、半導体素子１４、配線１７、バンプ端子１６
Ｂ１、１６Ｂ２、及び配線１６は、モールド樹脂１５に
より覆われている。As shown in FIGS. 1 and 2, the semiconductor device according to the present embodiment includes a mounting plate 12 on which a semiconductor element 14 is mounted. Semiconductor element mounting surface 12 of mounting plate 12
A and the opposite surface 12B have a plurality of solder terminals 22G (22N
G) is arranged. Solder terminal 22G (22NG)
Is connected to the conduction plate 19. The conduction plate 19 is connected to a conductor (not shown) on the inner surface of the through hole 18 formed in the mounting plate 12. The conductors are wiring 17, bump terminals 16
B2, wiring 16, and bump terminal 16B1 are connected to semiconductor element 14. That is, the plurality of solder terminals 22
G (22 NG) is connected to the semiconductor element 14. The semiconductor element 14, the wiring 17, the bump terminal 16,
B1, 16B2 and the wiring 16 are covered with the mold resin 15.
【００１８】また、半導体装置は、載置板１２の半導体
素子載置面１２Ａと逆面１２Ｂに対向するように近接配
置されたプリント配線板２４を備えている。プリント配
線板２４は、ハンダ端子２２Ｇ位置Ｐ１に対応する位置
Ｐ２に貫通孔２８Ｇ（２８ＮＧ）が形成されると共に図
示しない配線がプリントされたプリント板２５と、貫通
孔２８Ｇ（２８ＮＧ）における上記載置板１２側の先端
位置Ｐ２に配置されたパッド２６と、を備えている。Further, the semiconductor device includes a printed wiring board 24 arranged close to and opposite to the semiconductor element mounting surface 12A and the opposite surface 12B of the mounting plate 12. The printed wiring board 24 has a through-hole 28G (28NG) formed at a position P2 corresponding to the solder terminal 22G position P1, and a printed board 25 on which wiring (not shown) is printed, and a printed wiring board 24 on the through-hole 28G (28NG). And a pad 26 arranged at a tip position P2 on the plate 12 side.
【００１９】パッド２６には、プリント板２５上に形成
された貫通孔２８Ｇと径が同じ貫通孔２６Ｇ（２６Ｎ
Ｇ）が形成されている。The pad 26 has a through hole 26G (26N) having the same diameter as the through hole 28G formed on the printed board 25.
G) is formed.
【００２０】複数のハンダ端子２２Ｇ（２２ＮＧ）は、
リフロー等の方法により一括して、パッド２６にハンダ
付けされる。The plurality of solder terminals 22G (22NG)
The pads 26 are collectively soldered by a method such as reflow.
【００２１】図３には、複数のハンダ端子２２Ｇ（２２
ＮＧ）と複数のパッド２６とがハンダ付けされた様子が
示されている。図２の紙面左側から１番目、及び２番目
のハンダ端子２２Ｇ及びパッド２６間は正常にハンダ付
けされている。しかし、３番目のハンダ端子２２ＮＧ及
びパッド２６間は正常にハンダ付けされていない。FIG. 3 shows a plurality of solder terminals 22G (22
NG) and a plurality of pads 26 are shown as soldered. The space between the first and second solder terminals 22G and the pads 26 from the left side in FIG. 2 is normally soldered. However, the third solder terminal 22NG and the pad 26 are not properly soldered.
【００２２】ここで、各々の貫通孔２８Ｇ（２８ＮＧ）
を介して、外部から内側方向Ｇ、ＮＧに沿って内部を顕
微鏡等により観察すると、正常にハンダ付けされている
か否か、即ち、半導体素子を載置する載置板に配置され
たハンダ端子とプリント配線板に配置されたパッドとが
正常に固着されているか否かを目視的に直接確認するこ
とができる。よって、確認精度が向上する。Here, each through hole 28G (28NG)
When the inside is observed by a microscope or the like along the inward directions G and NG from outside, it is determined whether or not the soldering is normal, that is, with the solder terminals arranged on the mounting plate on which the semiconductor element is mounted. It can be visually confirmed directly whether or not the pads arranged on the printed wiring board are properly fixed. Therefore, confirmation accuracy is improved.
【００２３】ところで、ハンダ端子とパッドとの固着状
態を目視的に確認することに限定されず、図４に示すよ
うに、プリント配線板２４の外側を、プリント配線板２
４に沿って移動する図示しない測定装置により、貫通孔
２８の深さを測定して、直接確認するようにしてもよ
い。By the way, the present invention is not limited to visually confirming the fixed state between the solder terminals and the pads. As shown in FIG.
The depth of the through-hole 28 may be measured by a measuring device (not shown) moving along the position 4 to directly check the depth.
【００２４】即ち、図４に示すように、正常にハンダ付
けされている場合における、測定装置による測定面３２
とハンダ端子２２Ｇとの間の距離ＬG は、正常にハンダ
付けされていない場合における距離ＬNGより短くなる。
よって、貫通孔２８の深さを測定し、測定値が、距離Ｌ
G 以上でかつ距離ＬNGより小さい予め定められた値より
大きいか否かにより、ハンダ端子とパッドとが正常に固
着されているか否かを直接確認することができる。な
お、貫通孔の深さは、音波又は光を用いて測定すること
ができる。That is, as shown in FIG. 4, when the soldering is normally performed, the measuring surface 32 by the measuring device is used.
The distance L G between the solder terminal 22G is shorter than the distance L NG when the not soldered properly.
Therefore, the depth of the through hole 28 is measured, and the measured value is the distance L
Whether or not the solder terminal and the pad are properly fixed can be directly confirmed based on whether or not the value is equal to or more than G and is larger than a predetermined value smaller than the distance LNG . In addition, the depth of the through-hole can be measured using a sound wave or light.
【００２５】このように、貫通孔の深さを測定装置によ
り測定してハンダ端子とパッドとが正常に固着されてい
るか否かを直接確認するので、確認精度を向上させるこ
とができる。As described above, since the depth of the through hole is measured by the measuring device to directly check whether the solder terminal and the pad are properly fixed, the checking accuracy can be improved.
【００２６】前述した実施の形態では、パッドに、プリ
ント板の貫通孔と形状及び大きさが同じ貫通孔を設けて
いるが、本発明はこれに限定されず、切り欠き部を設け
るようにしてもよい。In the above-described embodiment, the pad is provided with the through-hole having the same shape and size as the through-hole of the printed board. However, the present invention is not limited to this. Is also good.
【００２７】前述した実施の形態では、プリント板及び
パッドの双方に貫通孔をプリント板面に垂直な方向に形
成してるが、本発明はこれに限定されず、図５に示すよ
うに、プリント板２５のみに貫通孔２８Ｇ（２８ＮＧ）
を設けるようにしてもよく、また、この貫通孔２８Ｇ
（２８ＮＧ）は、プリント板面に対して傾斜するように
形成してもよい。In the embodiment described above, the through holes are formed in both the printed board and the pad in a direction perpendicular to the printed board surface. However, the present invention is not limited to this, and as shown in FIG. Through hole 28G (28NG) only in plate 25
May be provided, and the through hole 28G
(28NG) may be formed so as to be inclined with respect to the surface of the printed board.
【００２８】[0028]
【発明の効果】以上説明したように第１の発明は、ハン
ダ端子とパッドとが正常に固着されているか否かを、配
線板に設けられた貫通孔により直接確認することがで
き、確認精度を向上させることができる、という効果を
有する。As described above, according to the first aspect of the present invention, whether or not a solder terminal and a pad are properly fixed can be directly confirmed by a through-hole provided in a wiring board, and confirmation accuracy can be confirmed. Can be improved.
【００２９】また、第２の発明は、貫通孔の深さを測定
装置によりハンダ端子とパッドとが正常に固着されてい
るか否かを確認するので、確認精度を向上させることが
できる、という効果を有する。According to the second aspect of the present invention, since the depth of the through hole is checked by the measuring device whether or not the solder terminal and the pad are properly fixed, the checking accuracy can be improved. Having.
【図１】本実施の形態に係る半導体装置の端面図であ
る。FIG. 1 is an end view of a semiconductor device according to the present embodiment.
【図２】本実施の形態に係る半導体装置の斜視図であ
る。FIG. 2 is a perspective view of the semiconductor device according to the present embodiment;
【図３】ハンダ端子とパッドとがハンダ付けされた様子
を示す図である。FIG. 3 is a view showing a state where solder terminals and pads are soldered.
【図４】貫通孔の深さを測定する方法を説明する説明図
である。FIG. 4 is an explanatory diagram illustrating a method of measuring the depth of a through hole.
【図５】変形例の構成を示す端面図である。FIG. 5 is an end view showing a configuration of a modified example.
１２ 載置板 １４ 半導体素子 ２２Ｇ、２２ＮＧ ハンダ端子 ２４ プリント配線板（配線板） ２６ パッド ２６Ｇ、２６ＮＧ 貫通孔（切り取り部） ２８Ｇ、２８ＮＧ 貫通孔 12 Mounting Board 14 Semiconductor Element 22G, 22NG Solder Terminal 24 Printed Wiring Board (Wiring Board) 26 Pad 26G, 26NG Through Hole (Cut Out) 28G, 28NG Through Hole
Claims (2)
が設けられると共に該第１の配線に接続されかつ前記載
置板側面に配置されたパッドを備えた配線板と、 前記載置板の前記配線板側の面に配置され、前記半導体
素子に第２の配線を介して接続されると共に前記パッド
に固着されるハンダ端子と、 を含んで構成された半導体装置であって、 前記配線板に、前記パッドと前記ハンダ端子との固着状
態を確認するための貫通孔を形成した、 ことを特徴とする半導体装置。1. A mounting plate on which a semiconductor element is mounted, disposed close to and opposite to the mounting plate, provided with a first wiring, connected to the first wiring and connected to the mounting plate. A wiring board provided with pads arranged on the side surface; and a solder arranged on the wiring board side of the mounting board, connected to the semiconductor element via a second wiring and fixed to the pad. A semiconductor device comprising: a terminal; and a through-hole formed in the wiring board for checking a fixed state between the pad and the solder terminal.
の深さを測定する測定装置を備えた半導体装置検査装
置。2. A semiconductor device inspection device comprising a measurement device for measuring the depth of the through hole of the semiconductor device according to claim 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3173598A JPH11233562A (en) | 1998-02-13 | 1998-02-13 | Semiconductor device and inspection device therefor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3173598A JPH11233562A (en) | 1998-02-13 | 1998-02-13 | Semiconductor device and inspection device therefor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH11233562A true JPH11233562A (en) | 1999-08-27 |
Family
ID=12339305
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3173598A Pending JPH11233562A (en) | 1998-02-13 | 1998-02-13 | Semiconductor device and inspection device therefor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH11233562A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6887738B2 (en) | 2000-06-28 | 2005-05-03 | Sharp Kabushiki Kaisha | Method of making semiconductor device with flip chip mounting |
-
1998
- 1998-02-13 JP JP3173598A patent/JPH11233562A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6887738B2 (en) | 2000-06-28 | 2005-05-03 | Sharp Kabushiki Kaisha | Method of making semiconductor device with flip chip mounting |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3310499B2 (en) | Semiconductor device | |
| KR100500452B1 (en) | Ball Grid Array Package Test Apparatus and Method | |
| JP3459765B2 (en) | Mounting inspection system | |
| US20080158839A1 (en) | Printed Wiring Board, Printed Circuit Board, and Method of Inspecting Joint of Printed Circuit Board | |
| KR101047537B1 (en) | Probe card | |
| JP2003007784A (en) | Semiconductor inspecting device | |
| JPH11233562A (en) | Semiconductor device and inspection device therefor | |
| US6433565B1 (en) | Test fixture for flip chip ball grid array circuits | |
| JPH11121648A (en) | Electronic part package body and substrate constituting it | |
| JP2006214943A (en) | Probe device | |
| JP2016186484A (en) | Contact unit and inspection jig | |
| JP2002289745A (en) | Semiconductor device and wiring board | |
| JP2008196990A (en) | Semiconductor device and composite panel | |
| JP2002299805A (en) | Method of checking circuit board and mounting position | |
| JP2006250901A (en) | Method of inspecting semiconductor device, and device for inspecting the semiconductor device | |
| JP3120784B2 (en) | Apparatus and method for inspecting electrical characteristics of semiconductor products | |
| US20100060308A1 (en) | Semiconductor module | |
| KR100876964B1 (en) | Test board for semiconductor package | |
| JPH1154881A (en) | Electronic component mounting board and its connection check method | |
| JPH10339740A (en) | Probe device | |
| JP3287184B2 (en) | Inspection circuit structure of semiconductor device | |
| JPH1117057A (en) | Bga type semiconductor device with inspection pads | |
| JP2002313998A (en) | Semiconductor device | |
| JP2005201691A (en) | Test board for semiconductor evaluation | |
| JP2001284107A (en) | Probe card for trimming |