JPH11214960A - Schmitt circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a Schmitt circuit which operates stably, even if power supply voltage fluctuates and also operates at low current consumption. SOLUTION: This circuit is provided with an input terminal IN, to which an input coupling capacitor CIN is connected, a transistor Q1 for operation point setting which sets an operation point to detect potential change of a signal to be inputted, a voltage dividing means (resistors R1 and R2) which divides the voltage into power supply voltage and a reference potential and sets, so that the operation point is a prescribed voltage from the reference potential point, a transistor Q2 for positive direction change detection which detects the change when the potential of a signal that is applied to the terminal IN is changed to positive, a transistor Q3 for negative direction change detection which detects the change of the input signal to a negative direction and a current feeding means CM, which supplies currents that are as large as each transistors Q1 to Q3 and satisfactorily detects the change point and change direction of a signal that undergoes ASK modulation with an NRZ.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a Schmitt circuit and, more particularly, to a data carrier system in which a high frequency signal supplied from a master unit is received by an antenna coil built in the slave unit to obtain operating power. It is suitable.

[0002]

2. Description of the Related Art Conventionally, in a data carrier system in which a high frequency signal supplied from a master unit is received by an antenna coil incorporated in the slave unit to obtain operating power, the slave unit is transmitted from the master unit. The modulated high-frequency signal is demodulated to obtain data superimposed on the high-frequency signal.

For example, in order to demodulate an ASK-modulated signal in NRZ, first, a change point in the envelope of the received signal is detected by a differentiating circuit, and then a comparator (Schmitt circuit) having hysteresis characteristics is detected. ), The data is demodulated by determining the change points in the positive and negative directions.

It is desirable that the system width of the comparator (Schmitt circuit) is proportional to the product of the amplitude of the received signal and the degree of modulation, that is, the amount of change in the envelope of the received signal.

In a data carrier system, the amplitude of a received signal varies greatly, but the degree of modulation is kept constant. Therefore, it is necessary to provide a hysteresis width proportional to the amplitude of the received signal. Further, the hysteresis width of the comparator (Schmitt circuit) is preferably set to have a symmetric hysteresis width in the positive direction and the negative direction in order to prevent malfunction due to noise.

Since the power supply voltage fluctuates due to ASK modulation, it is necessary to operate stably without being affected by fluctuations in the power supply voltage. Further, since the operating power is supplied from the outside, it is necessary to operate the device with low current consumption. In addition, in order to easily realize an integrated circuit (integrated circuit), it is desirable to reduce the total capacitance of the capacitors as much as possible and to reduce the area required for configuring the circuit.

FIG. 6 shows an example of a Schmitt circuit, and FIGS. 7 and 8 show operation waveforms of respective parts. In FIG.
Voltage at both ends of the antenna coil (voltage between point A and point A ')
At the output point B, i.e., the power supply voltage of the slave unit, there remains a high-frequency ripple after rectifying the carrier of the signal from the master unit.

This is because, as described above, it is necessary to reduce the total capacitance of the capacitors as much as possible in order to form an integrated circuit (LSI), so that a capacitor with a sufficient capacitance cannot be built in. This is because the capacitance of the ripple filter capacitor C is suppressed to about 200 pF at the maximum.

[0009] In the circuit of Figure 6, when demodulating the ASK modulation signal, in order to be misjudged by the ripple of the remaining high frequency does not occur, the resistor R _e, a low-pass filter LPF consisting capacitor C _L Is used to remove the ripple.

The cut-off frequency of the low-pass filter LPF is set sufficiently lower than the carrier frequency of the signal from the master unit and sufficiently higher than the data modulation rate. For example, if the frequency of the high-frequency signal from the master unit is 10
When the modulation rate is 100 Kbit / sec in MHz, the cutoff frequency is set to about 1 MHz which is intermediate between 100 KHz / 2 and 2 × 10 MHz.

Therefore, the low-pass filter LPF
Rises and falls 0.35 μs
Although it is limited to c, there is no problem because the time allocated to 1-bit data transmission is sufficiently shorter than 10 μsec.

At the output point C of the low-pass filter LPF, a high-frequency ripple component remains. This is because the reference point of the output of the low-pass filter LPF is set to the first voltage-dividing resistor R1.
This is because the fourth voltage-dividing resistor R4 serves as the center connection point of the voltage-dividing circuit, and the ripple of the difference voltage between the points D and E is attenuated.

[0013]

When the Schmitt circuit configured as described above is used for a data carrier system, the ASK signal sent from the master unit can be demodulated.
Since the potential at the point E fluctuates according to the ASK modulation, the first
The variation due to the ASK input to the differential comparator DIF1 and the second differential comparator DIF2 becomes about half, and there is a problem that it becomes weak to noise.

A hysteresis width is set by applying a DC potential difference proportional to the power supply voltage between both inputs of the first and second differential comparators DIF1 and DIF2, but the second and third voltage dividing resistors R2 , R3 because the ripple of the voltage applied to the third voltage-dividing resistor R3 becomes large, there is a problem that the hysteresis width is not symmetric.

This is because the power supply ripple voltage is applied to the connection point E by setting the reference point of the output of the low-pass filter LPF to the connection point E of the second and third voltage-dividing resistors R2 and R3. It is. Therefore, the second voltage dividing resistor R
This is because the ripple applied between both ends of the third voltage-dividing resistor R3 decreases, but the ripple voltage applied between both ends of the third voltage-dividing resistor R3 increases.

This latter problem is caused by the low-pass filter LP
The reference point of the output of F is changed to a reference potential point, and a filter capacitor is added between the connection point (point J) of the first and second voltage dividing resistors R1 and R2 and the reference potential. Although it can be improved, the addition of a capacitor can make integrated circuits (LS
Since the area is unfavorably increased for I), the problem that the former signal component is halved without adding a capacitor still remains.

In view of the above problems, an object of the present invention is to provide a Schmitt circuit capable of performing stable operation even when the power supply voltage fluctuates and operating with low current consumption. .

[0018]

A Schmitt circuit according to the present invention comprises an input terminal to which an input coupling capacitor is connected, and an operation point for setting an operation point for detecting a potential change of a signal applied to the input terminal. A setting transistor, and voltage dividing means for dividing a voltage between a power supply voltage and a reference potential applied to the operating point setting transistor so that the operating point becomes a predetermined voltage from the reference potential. A positive-direction change detection transistor that changes the potential of the output electrode when the potential of the signal applied to the input terminal changes in the positive direction; and the potential of the signal applied to the input terminal changes in the negative direction. A negative-direction change detection transistor that changes the potential of the output electrode when the operation is performed, the operating point setting transistor, the positive-direction change detection transistor, and the negative-direction change detection transistor. Is characterized by comprising a current supply means for supplying register equal the magnitude of the current, respectively.

Another feature of the present invention is that
An input terminal to which an input coupling capacitor is connected, an operating point setting transistor for setting an operating point for detecting a potential change of a signal applied to the input terminal, and a power supply applied to the operating point setting transistor Voltage dividing means for dividing a voltage between a voltage and a reference potential so that the operating point becomes a predetermined voltage from the reference potential; and a potential of a signal applied to the input terminal changes in a positive direction. A positive-direction change detection transistor that changes the potential of the output electrode when the potential of the output electrode changes, and a negative-direction change detection transistor that changes the potential of the output electrode when the potential of the signal applied to the input terminal changes in the negative direction. And transistors for supplying currents of the same magnitude to the operating point setting transistor, the positive direction change detecting transistor, and the negative direction change detecting transistor, respectively. First input terminal and the supply means, the output signal of the positive change detection transistor is provided,
A flip-flop circuit having a second input terminal to which an output signal of the negative-direction change detection transistor is supplied, and changing a logic level of the output terminal when the level of a signal applied to the input terminal changes Are provided.

Another feature of the present invention is that the operating point setting transistor, the positive direction change detecting transistor and the negative direction change detecting transistor are M transistors.
It is an OS transistor.

According to another feature of the present invention, the current supply means is a current mirror circuit.

According to another feature of the present invention, an input resistor is connected between the input coupling capacitor and a control electrode of the operating point setting transistor, and an output electrode and a control electrode thereof are connected. And a feedback resistor is connected between them.

Another feature of the present invention is that a voltage clamp means for holding down the power supply voltage to a predetermined voltage when the power supply voltage becomes a predetermined voltage or more; A partial pressure ratio changing means for changing a partial pressure ratio of the partial pressure means.

[0024]

Since the present invention comprises the above technical means, the operating point for detecting the change point of the envelope of the received signal is set higher by a predetermined potential than the reference potential, so that the ASK modulation As a result, it is possible to operate stably even when the power supply voltage fluctuates, and to operate with low current consumption.

[0025]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the Schmidt circuit according to the present invention will be described below with reference to the drawings. FIG. 1 shows the first
FIG. 3 is a circuit diagram illustrating a configuration of a Schmitt circuit according to the embodiment. The Schmitt circuit 1 of the present embodiment shown in FIG.
ICs are formed adjacently on the same chip, and the transistors and the resistors are matched.

The first MOS transistor Q1 is provided as an operating point setting transistor, and its drain is connected to a first voltage dividing resistor R1 and a feedback resistor R1.
B and the gate of the second MOS transistor Q2. The gate is connected to a connection point between the input resistor RA and the feedback resistor RB, and the source is connected to the reference potential via the second voltage-dividing resistor R2. In addition,
In the present embodiment, it is connected to the ground potential as the reference potential.

The first voltage dividing resistor R1 and the second voltage dividing resistor R2 divide a voltage between a power supply voltage applied to the operating point setting transistor and a reference potential to perform the operation. A voltage dividing means is provided so that the point becomes a predetermined voltage from the reference potential.

The other end of the first voltage dividing resistor R1 is a current input point of a current mirror circuit CM including fourth to sixth MOS transistors Q4 to Q6.
It is connected to the gates of the S transistors Q4 to Q6 and the drain of the fourth MOS transistor Q4.

The sources of the fourth to sixth MOS transistors Q4 to Q6 are commonly connected to a power supply, and the second M
The drain of the OS transistor Q2 is connected to the drain of the fifth MOS transistor Q5 serving as the first current output point I1 of the current mirror circuit CM and the set terminal of the flip-flop FF, and the source is connected to the reference potential. The second MOS transistor Q2 is provided as a positive-direction change detection transistor that changes the potential of its output electrode when the potential of the signal applied to the input terminal IN changes in the positive direction. .

The third MOS transistor Q3 has
When the potential of the signal applied to the input terminal IN changes in the negative direction, the transistor is provided as a negative-direction change detection transistor that changes the potential of the output electrode. The second output point is connected to the drain of the sixth MOS transistor Q6 and the reset terminal of the flip-flop FF.

The gate of the third MOS transistor Q3 is connected to a connection point between the input resistor RA and the input coupling capacitor CIN, and the source is connected to the reference potential. The input coupling capacitor CIN is connected to the input terminal IN, and the output terminal of the flip-flop FF is the output terminal OUT.
It is connected to the. Here, the input resistor RA and the feedback resistor RB are set equal.

As numerical examples of the respective constituent elements of the Schmitt circuit 1 shown in FIG. 1 configured as described above, for example, the input resistor RA and the feedback resistor RB are 200 KΩ, the first voltage-dividing resistor. R1 is 700 KΩ, the second voltage dividing resistor R
2 is 10 KΩ, the input coupling capacitor CIN is 5 pF, the power supply voltage range is 3 to 12 V, and the ASK modulation degree is 5%.

The operation of the Schmitt circuit 1 shown in FIG. 1 will be described below. First, the DC operating point will be described. The operating point of the drain voltage of the first MOS transistor Q1 is determined by setting the power supply voltage to the first and second voltage dividing resistors R1,
As a result of voltage division by R2, the voltage applied to the second voltage dividing resistor R2 and the threshold voltage V1 of the first MOS transistor Q1
th.

The gate of the first MOS transistor Q1;
No DC current flows through the input coupling capacitor CIN. Therefore, the operating points of the gate voltages of the second and third MOS transistors Q2 and Q3 are equal to the operating points of the drain voltage of the first MOS transistor Q1.

The current flowing through the first voltage dividing resistor R1, the first MOS transistor Q1, and the second voltage dividing resistor R2 flows to the current input point of the current mirror circuit CM. From the first and second current output points I1 and I2 of the mirror circuit CM, the second and third current output points I1 and I2, respectively.
Are supplied to the drains of the MOS transistors Q2 and Q3.

As described above, the gate voltages of the second and third MOS transistors Q2 and Q3 are higher than the gate-source voltage of the first MOS transistor Q1 by the first and second voltage dividing resistors R1 and R2. , R2.

Therefore, the second and third MOS transistors Q2 and Q3 are connected to the second and third MOS transistors from the first and second current output points I2 of the current mirror circuit CM.
An attempt is made to flow a current larger than the current supplied to the drains of the transistors Q2 and Q3.

As a result, the drain voltages of the second and third MOS transistors Q2 and Q3 are both at "L" level. Therefore, the content of the flip-flop FF does not change.

Next, the operation when the input signal changes will be described. The signal applied to the input terminal IN passes through a high-pass filter HPF having a cutoff frequency determined by a time constant of a product of “impedance of signal source + resistance of input resistor RA” and “input coupling capacitor CIN”. That is, it is differentiated.

When the signal applied to the input terminal IN changes in the positive direction, the signal is input to the gate of the third MOS transistor Q3 through the input coupling capacitor CIN, and the gate is driven in the positive direction.

Further, since a positive signal is applied to the gate of the first MOS transistor Q1 via the input resistor RA, the drain of the first MOS transistor Q1 changes in the negative direction. This change is fed back to the gate of the first MOS transistor Q1 via the feedback resistor RB.

In this embodiment, since the input resistor RA and the feedback resistor RB have the same resistance, the gain of the first MOS transistor Q1 is "1".
Operating as an amplifier. Therefore, the second MOS
The gate of the transistor Q2 is also driven in the negative direction. Third
Of the third MOS transistor Q3 is driven in a more positive direction than the operating point.
Remains at the “L” level.

On the other hand, since the gate of the second MOS transistor Q2 is driven in the negative direction from the operating point, if the amount of drive exceeds the divided voltage by the first and second voltage dividing resistors R1 and R2, The drain current of the second MOS transistor Q2 is equal to the first current output point I of the current mirror circuit CM.
It becomes smaller than the current to be supplied from 1. As a result, the potential of the drain of the second MOS transistor Q2 rises to "H" level, and the output of the flip-flop FF is set to "H" level.

On the other hand, when the signal applied to the input terminal IN changes in the negative direction, the gates of the second and third MOS transistors Q2 and Q3 are driven in opposite directions, and as a result, the third MOS transistor Q The potential of the drain changes to "H" level, and the second MOS transistor Q2
Changes to the "L" level, the output of the flip-flop FF is reset to the "L" level.

As described above, the Schmitt circuit 1 of the present embodiment can detect a change in an input signal ASK-modulated by NRZ and demodulate it satisfactorily.

The Schmitt circuit 1 of the present embodiment
Has a hysteresis width proportional to the power supply voltage,
The change in the input signal can be used as the input signal without being divided. The high-frequency ripple on the power supply is divided by the first and second voltage-dividing resistors R1 and R2, and has the same effect on the positive and negative changes of the input signal. Can be operated with a hysteresis width symmetric in the direction of.

As a capacitor that causes an increase in the area when forming a Schmitt circuit,
Since only the input coupling capacitor CIN needs to be provided, I
A very advantageous circuit configuration can be obtained for performing the C conversion.

FIG. 2 shows a second embodiment of the Schmidt circuit according to the present invention. The Schmitt circuit 2 shown in FIG.
In the first MOS transistor Q1, a DC operating point of "threshold value + divided value of power supply voltage" is generated, and
Operate as an amplifier with a gain of "1"
It operates based on the difference between the current flowing through the transistor Q1 and the current flowing through the second and third MOS transistors Q2 and Q3. Also, the current mirror circuit C
A bias circuit 20 generates a voltage to be applied to the gates of the MOS transistors Q4, Q5, Q6 constituting M.

The Schmitt circuit 2 according to the present embodiment uses the current of the voltage dividing circuit directly to reduce the operating current of the first MOS transistor Q1 in order to prevent the problem caused by the increase of the operating current with the increase of the power supply voltage. In this case, three current supply means are separately provided.

In the circuit shown in FIG. 1, when the power supply voltage increases, all of the operating currents increase in proportion to the power supply voltage.
There was a problem that the total current increased. On the other hand, in the case of the circuit of the present embodiment, the current increases only in one place due to an increase in the power supply voltage, and the remaining current can be reduced, so that the current consumption is reduced. can do.

FIG. 3 shows a third embodiment of the Schmitt circuit of the present invention. The Schmitt circuit 3 shown in FIG.
Similarly to the circuit of the second embodiment, the first MOS transistor Q1 generates a DC operating point of “threshold value + divided value of power supply voltage” and operates as an amplifier having a gain of “1”. Then, the value of the current flowing through the first MOS transistor Q1 and the value of the second and third MOS transistors Q2,
It operates according to the difference from the value of the current flowing through Q3.

The Schmitt circuit 3 of the present embodiment
Comprises only N-channel MOS transistors. Further, in the present embodiment, the first voltage-dividing resistor R1 and the load resistors R3 and R4 are set to be equal to each other to supply currents of the same magnitude to the three transistors Q1, Q2 and Q3, respectively. Means.

According to the Schmitt circuit 3 of the present embodiment configured as described above, the operation is performed such that the operating point increases only when the drive is performed excessively. Also, since the load of the second and third MOS transistors Q2 and Q3 is a resistor, the gain is reduced. Therefore, the gain is corrected by including the inverters INV1 to INV4.

Next, a fourth embodiment of the Schmidt circuit according to the present invention will be described with reference to FIG. The Schmitt circuit 4 of the present embodiment includes the second and third MOS transistors Q2,
This is an example in which the voltage applied to the source of Q3 is biased higher by the divided value of the power supply voltage. The Schmitt circuit 4 according to the present embodiment thus configured operates similarly to the Schmitt circuit 1 shown in FIG.
Both the drain potentials of the second and third MOS transistors Q2 and Q3 are at "H" level. Then, one becomes "L" level according to the change of the input signal. That is, the level changes from “H” level to “L” level according to the input signal.

Since such a potential change is a potential change opposite to that in the above-described example, the connection to the flip-flop FF is changed, and the drain of the second MOS transistor Q2 is connected to IN.
Flip-flop FF reset terminal Res via V1
et, and connects the third MOS transistor Q3 to IN
It is connected to the flip-flop FF set terminal Set via V2.

This example has the advantage that the current consumption can be reduced when the same data continues in the NRZ ASK modulation, that is, when the period during which the signal amplitude does not change is long.

Next, a fifth embodiment of the present invention will be described with reference to FIG. Generally, in a data carrier system, a voltage induced in an antenna coil of a slave unit changes depending on a distance from an interrogator (master unit). A voltage higher than the withstand voltage may be generated. In such a case, in order to protect the internal circuit, protection has been performed by controlling the voltage with a zener diode, a clamp circuit, or the like.

When the amplitude fluctuation is detected as in the present invention, when the clamp circuit operates, the amplitude change width due to the rectified ASK modulation decreases, and the apparent ASK modulation width becomes shallow. There is a possibility that the modulation signal cannot be demodulated.

Therefore, in the fifth embodiment described below, as shown in FIG. 9, a clamp circuit 90 including a diode 92 and a resistor 93 connected in series with a transistor 91 is provided. From the voltage dividing point 94 of the diode 92 and the resistor 93, and the signal controls the gate of the transistor 95 connected in parallel with the voltage dividing resistor R2.

When the power supply voltage V _DD rises and the voltage at the voltage dividing point 94 of the diode 92 and the resistor 93 becomes close to the operating voltage of the transistor 91, the transistor 91 starts to operate gradually according to the characteristics of the diode 92. , Finally turn on. Since the on-resistance of the transistor 91 is small, a current flows through the transistor 91 as a bypass to prevent a voltage rise.

At this time, at the same time when the transistor 91 is turned on, the transistor 95 is also turned on.
1: The resistor R2 of the voltage dividing circuit that has been divided by the ratio of (the resistor R2 + the threshold voltage of the transistor Q1) is replaced with the resistor R2
And the parallel circuit of the on-resistance of the transistor 91, and the voltage dividing ratio of the voltage dividing circuit is increased as in the case where the resistance value of the resistor R2 is reduced. As a result, the hysteresis width can be reduced, and demodulation can be performed correctly even when a clamp is applied.

FIG. 5 shows an application example of the Schmitt circuits 1 to 4 of the present embodiment. FIG. 5 shows a circuit in which the Schmitt circuit 1 according to the present embodiment is provided in place of the conventional circuit shown in FIG. 6, which can realize stable operation and operate with low current consumption. It is suitable for use in a slave of a data carrier system in which the voltage tends to fluctuate.

[0063]

As described above, the present invention detects a change point of the envelope of the received signal and determines whether the change direction at the change point changes in the positive direction or the negative direction. Thus, when demodulating data, the operating point for detecting a change in the potential of the signal applied to the input terminal is set to be higher than the reference potential by a predetermined potential, so that the power supply voltage fluctuates due to ASK modulation. Operation can be performed stably, and operation can be performed with low current consumption. Thereby, for example, NR
A change point and a direction of a signal ASK-modulated in Z can be detected well, and data demodulation with few errors can be performed.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a first embodiment of a Schmitt circuit of the present invention.

FIG. 2 is a circuit diagram illustrating a Schmitt circuit according to a second embodiment of the present invention.

FIG. 3 is a circuit diagram showing a third embodiment of the Schmitt circuit of the present invention.

FIG. 4 is a circuit diagram illustrating a Schmitt circuit according to a fourth embodiment of the present invention.

FIG. 5 is a circuit diagram showing a usage example of the Schmitt circuit of the present invention.

FIG. 6 is a circuit diagram showing an example of a conventional Schmitt circuit.

FIG. 7 is a waveform chart illustrating the operation of each part of the circuit of FIG. 7;

FIG. 8 is a waveform chart for explaining the operation of each part of the circuit of FIG. 7;

FIG. 9 is a circuit diagram showing a fifth embodiment of the present invention.

[Explanation of symbols]

Reference Signs List 1 Schmitt circuit of first embodiment 2 Schmitt circuit of second embodiment 3 Schmitt circuit of third embodiment 4 Schmitt circuit of fourth embodiment Q1 Operating point setting transistor Q2 Positive change detecting transistor Q3 negative direction change detecting transistor R1 minute pressure resistor R2 minutes pressure resistor FF flip-flop circuit V _DD supply voltage R _A input resistor R _B feedback resistor C _IN input coupling capacitor

Claims (6)

[Claims] 1. An input terminal to which an input coupling capacitor is connected, an operating point setting transistor for setting an operating point for detecting a potential change of a signal applied to the input terminal, and an operating point setting transistor Voltage dividing means for dividing a voltage between a power supply voltage applied to the input terminal and a reference potential so that the operating point becomes a predetermined voltage from the reference potential; and a potential of a signal applied to the input terminal. A positive-direction change detection transistor that changes the potential of the output electrode when the potential changes in the positive direction; and changes the potential of the output electrode when the potential of the signal applied to the input terminal changes in the negative direction. A negative direction change detection transistor, and a current having the same magnitude as the operating point setting transistor, the positive direction change detection transistor, and the negative direction change detection transistor. Schmitt circuit, characterized by comprising a current supply means for feeding. 2. An input terminal to which an input coupling capacitor is connected, an operating point setting transistor for setting an operating point for detecting a potential change of a signal applied to the input terminal, and the operating point setting transistor Voltage dividing means for dividing a voltage between a power supply voltage applied to the input terminal and a reference potential so that the operating point becomes a predetermined voltage from the reference potential; and a potential of a signal applied to the input terminal. A positive-direction change detection transistor that changes the potential of the output electrode when the potential changes in the positive direction; and changes the potential of the output electrode when the potential of the signal applied to the input terminal changes in the negative direction. A negative direction change detection transistor, and a current having the same magnitude as the operating point setting transistor, the positive direction change detection transistor, and the negative direction change detection transistor. And a second input terminal to which an output signal of the transistor for detecting a change in the positive direction is supplied, and a second input terminal to which an output signal of the transistor for detecting a negative direction change is supplied. A flip-flop circuit for changing the logic level of the output terminal when the level of the signal applied to the input terminal changes. 3. The Schmitt circuit according to claim 1, wherein the operating point setting transistor, the positive direction change detecting transistor, and the negative direction change detecting transistor are MOS transistors. 4. The Schmitt circuit according to claim 1, wherein said current supply means is a current mirror circuit. 5. An input resistor is connected between the input coupling capacitor and a control electrode of the operating point setting transistor, and a feedback resistor is connected between the output electrode and the control electrode. 2. The method according to claim 1, wherein
5. The Schmitt circuit according to any one of claims 1 to 4. 6. A voltage clamping means for holding the power supply voltage at a predetermined voltage when the power supply voltage becomes equal to or higher than a predetermined voltage, and a voltage dividing ratio for changing a voltage dividing ratio of the voltage dividing means when the voltage clamping means operates. The Schmitt circuit according to claim 1, further comprising a changing unit.