JP3517578B2 - Schmitt circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a Schmitt circuit, and more particularly to a data carrier system in which a high frequency signal supplied from a master unit is received by an antenna coil incorporated in a slave unit to obtain operating power. Is suitable.

[0002]

2. Description of the Related Art Conventionally, in a data carrier system in which a high frequency signal supplied from a master unit is received by an antenna coil built in the slave unit to obtain operating power, the slave unit is sent from the master unit. The modulated high frequency signal is demodulated to obtain the data superimposed on the high frequency signal.

For example, in order to demodulate a signal that has been ASK-modulated by NRZ, first, a changing point of the envelope of the received signal is detected by a differentiating circuit, and then a comparator having a hysteresis characteristic (Schmitt circuit). ), The data is demodulated by determining the change points in the positive and negative directions.

It is desirable that the systematic width of the comparator (Schmitt circuit) be proportional to the product of the amplitude of the received signal and the degree of modulation, that is, the amount of change in the envelope of the received signal.

Further, in the data carrier system, since the fluctuation of the received signal amplitude is large but the modulation degree is kept constant, it is necessary to have a hysteresis width proportional to the received signal amplitude. Furthermore, it is desirable that the hysteresis width of the comparator (Schmitt circuit) has a symmetrical hysteresis width in the positive and negative directions in order to prevent malfunction due to noise.

Since the power supply voltage fluctuates due to ASK modulation, it is necessary to operate stably without being affected by the fluctuation of the power supply voltage. Furthermore, since the operating power is supplied from the outside, it is necessary to operate with low current consumption. Further, in order to easily realize an integrated circuit (IC), it is desirable to reduce the total capacitance of the capacitors as much as possible to reduce the area required to configure the circuit.

FIG. 6 shows an example of the Schmitt circuit, and FIG. 7 and FIG. 8 show operation waveforms of respective parts. In FIG.
Voltage across antenna coil (voltage between point A and point A ')
In the voltage of the output point B rectified by, that is, the power supply voltage of the slave unit, a high-frequency ripple after the carrier of the signal from the master unit is rectified remains.

This is because it is necessary to reduce the total capacitance of the capacitors as much as possible in order to make them into an integrated circuit (LSI), and therefore it is not possible to incorporate a capacitor having a sufficient capacitance. This is because the capacitance of the ripple filter capacitor C is suppressed to about 200 pF at the maximum.

In the circuit of FIG. 6, when demodulating an ASK modulated signal, a low pass filter LPF including a resistor R _e and a capacitor C _L is provided in order to prevent an erroneous determination from being caused by the remaining high frequency ripple. Is used to remove the ripple component.

The cutoff frequency of the low-pass filter LPF is set sufficiently lower than the carrier frequency of the signal from the master unit and sufficiently higher than the data modulation rate. For example, if the frequency of the high frequency signal from the base unit is 10
When the modulation rate is 100 Kbit / sec in MHz, the cutoff frequency is set to 100 KHz / 2, which is an intermediate value of 2 × 10 MHz and about 1 MHz.

Therefore, the low-pass filter LPF
Signal rises and falls by 0.35 μse
Although it is limited to c, there is no problem because the time allotted for 1-bit data transmission is sufficiently shorter than 10 μsec.

A high-frequency ripple component remains at the output point C of the low-pass filter LPF. This is because the reference point of the output of the low-pass filter LPF is the first dividing resistor R1.
This is because the connection point is formed at the center of the voltage dividing circuit by the fourth voltage dividing resistor R4, and the ripple of the voltage difference between the points D and E is attenuated.

[0013]

When the Schmitt circuit configured as described above is used in the data carrier system, the ASK signal sent from the master unit can be demodulated.
Since the potential at the point E changes according to ASK modulation, the first
There is a problem that the fluctuation amount due to ASK input to the differential comparator DIF1 and the second differential comparator DIF2 becomes about half, which makes it weak against noise.

The hysteresis width is set by applying a DC potential difference proportional to the power supply voltage between both inputs of the first and second differential comparators DIF1 and DIF2, but the second and third voltage dividing resistors R2 are used. , R3 becomes larger on the side of the third voltage dividing resistor R3, the ripple amount of the voltage becomes larger, so that there is a problem that the hysteresis width is not symmetrical in positive and negative directions.

This is because the reference point of the output of the low-pass filter LPF is the connection point E of the second and third voltage dividing resistors R2 and R3, and the power supply ripple voltage is applied to the connection point E. Is. Therefore, the second voltage dividing resistor R
This is because the ripple amount applied between both ends of 2 is reduced, but the ripple voltage applied between both ends of the third voltage dividing resistor R3 is increased.

This latter problem is caused by the low pass filter LP.
If the reference point of the output of F is changed to the reference potential point and a filter capacitor is added between the connection point (point J) of the first and second voltage dividing resistors R1 and R2 and the reference potential. Although it can be improved, the addition of capacitors is
Since the area is increased for I), it is not preferable, so that the problem of the former signal component being halved without adding a capacitor still remains.

In view of the above problems, it is an object of the present invention to provide a Schmitt circuit which can perform stable operation even when the power supply voltage fluctuates and can be operated with low current consumption. .

[0018]

A Schmitt circuit of the present invention is provided with an input terminal to which one end of an input coupling capacitor is connected, and a first terminal provided for detecting a potential change of a signal applied to the input terminal. Voltage dividing means having first, second and third transistors, and a first voltage dividing resistor and a second voltage dividing resistor for dividing the voltage between the power supply voltage and the reference potential to a predetermined voltage. And a drain of the first transistor is connected to an input terminal of a current mirror circuit connected to a power supply via the first voltage dividing resistor, and a source of the first transistor is , The second potential dividing resistor is connected to a reference potential point, the other end of the input coupling capacitor is connected to the gate of the third transistor, and the first transistor is connected via the input resistor. At the gate of The drain of the first transistor is connected to the gate of the second transistor and is also connected to the gate of the first transistor via a feedback resistor. The sources of the second transistor and the third transistor are respectively connected to a reference potential point, and the drains of the second transistor and the third transistor are
The operating points of the second transistor and the third transistor, which are respectively connected to the first and second output terminals of the current mirror circuit and are determined with the operating point of the first transistor as a reference, The first transistor is also operated as an operating point setting transistor so as to have a predetermined value, and when the signal level applied to the input terminal changes, the logic level of the output terminal is changed. A flip-flop circuit is further provided, a drain of the second transistor is connected to a set input terminal of the flip-flop circuit, and a drain of the third transistor is connected to a reset input terminal of the flip-flop circuit. Therefore, when the signal level applied to the input terminal changes in the positive direction, the signal for positive direction change detection is detected. When the voltage of the drain of the second transistor that operates in the following manner is set to "H", the output of the flip-flop circuit is set to "H", and the signal level applied to the input terminal changes in the negative direction, the negative direction The voltage of the drain of the third transistor that operates for change detection is set to "H", and the output of the flip-flop circuit is set to "L".

Another aspect of the Schmitt circuit of the present invention is a first terminal provided to detect an input terminal to which one end of an input coupling capacitor is connected and a potential change of a signal applied to the input terminal. , Second and third transistors, and voltage dividing means for dividing the voltage between the power supply voltage and the reference potential to a predetermined voltage, and at the voltage dividing output point of the voltage dividing means. , The source of the first transistor is connected, and the other end of the input coupling capacitor is connected to the gate of the third transistor and also to the gate of the first transistor via an input resistor. The drain of the first transistor is connected to the gate of the second transistor, and
It is also connected to the gate of the first transistor via a feedback resistor, and is connected to the second transistor and the third transistor.
The sources of the transistors are connected to a reference potential point, and the drains of the first transistor, the second transistor, and the third transistor are connected to a current supply unit for supplying an equal current to each of them. The operating point of the second transistor and the third transistor determined based on the operating point of the first transistor has a predetermined value.
And a flip-flop circuit that changes the logic level of the output terminal when the level of the signal applied to the input terminal changes. The drain of the transistor is connected to the set input terminal of the flip-flop circuit, and the drain of the third transistor is connected to the reset input terminal of the flip-flop circuit and applied to the input terminal. When the signal level changes in the positive direction, the voltage of the drain of the second transistor operating for detecting the positive direction change is set to "H", the output of the flip-flop circuit is set to "H", and the input terminal is connected to the input terminal. When the applied signal level changes in the negative direction, the third transistor that operates to detect the change in the negative direction is detected. The voltage of the drain of the transistor is "H" and the output of the flip-flop circuit is "L".

In another aspect of the Schmitt circuit of the present invention, the current supply means is a current mirror circuit.

Another aspect of the Schmitt circuit of the present invention is a first terminal provided to detect an input terminal to which one end of an input coupling capacitor is connected and a potential change of a signal applied to the input terminal. Voltage dividing means having first, second and third transistors, and a first voltage dividing resistor and a second voltage dividing resistor for dividing the voltage between the power supply voltage and the reference potential to a predetermined voltage. And a drain of the first transistor is connected to a power source via the first voltage dividing resistor, and a source of the first transistor is connected to a reference potential point via the second voltage dividing resistor. And the other end of the input coupling capacitor is connected to the gate of the third transistor and also to the gate of the first transistor via an input resistor. The tiger The drain of the transistor is connected to the gate of the second transistor and also to the gate of the first transistor via a feedback resistor, and the sources of the second transistor and the third transistor are connected. Are respectively connected to a reference potential point, and the drains of the second transistor and the third transistor have a third resistance having the same resistance value as that of the first voltage dividing resistor.
And a fourth resistor connected to a power source so that the operating points of the second transistor and the third transistor, which are determined with the operating point of the first transistor as a reference, have predetermined values. In addition, the first transistor is also operated as an operating point setting transistor, and
A flip-flop that changes the logic level of the output terminal when the signal level applied to the input terminal changes.
A flop circuit is further provided, the signal of the drain of the second transistor is transmitted to the set input terminal of the flip-flop circuit, and the signal of the drain of the third transistor is reset input terminal of the flip-flop circuit. When the signal level transmitted to the input terminal changes in the positive direction, the drain voltage of the second transistor that operates for detecting the positive direction change is changed to
As "H", the output of the flip-flop circuit is "H"
When the signal level applied to the input terminal changes in the negative direction, the voltage of the drain of the third transistor operating for detecting the negative direction change is set to "H",
The output of the flip-flop circuit is "L".

In another aspect of the Schmitt circuit of the present invention, voltage clamp means for holding the power supply voltage to a predetermined voltage when the power supply voltage exceeds a predetermined voltage, and when the voltage clamp means operates. Further comprising a voltage division ratio changing means for changing the voltage division ratio of the voltage dividing means,
Make the divided voltage small.

[0023]

[0024]

Since the present invention comprises the above technical means, the operating point for detecting the change point of the envelope (envelope) of the received signal is set higher than the reference potential by a predetermined potential, so that the ASK modulation is performed. As a result, it is possible to operate stably even when the power supply voltage fluctuates, and to operate with low current consumption.

[0025]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the Schmitt circuit of the present invention will be described below with reference to the drawings. Figure 1
3 is a circuit diagram showing a configuration of a Schmitt circuit of the embodiment of FIG. The Schmitt circuit 1 of this embodiment shown in FIG.
The integrated circuits are formed adjacent to each other on the same chip, and the transistors and the resistors are matched with each other.

The first MOS transistor Q1 is provided as an operating point setting transistor, and its drain has a first voltage dividing resistor R1 and a feedback resistor R.
B and the gate of the second MOS transistor Q2. The gate is connected to the connection point between the input resistor RA and the feedback resistor RB, and the source is connected to the reference potential via the second voltage dividing resistor R2. In addition,
In this embodiment, the reference potential is connected to the ground potential.

The first voltage dividing resistor R1 and the second voltage dividing resistor R2 divide the voltage between the power supply voltage applied to the operating point setting transistor and a reference potential to perform the operation. The voltage dividing means is configured so that the point becomes a predetermined voltage from the reference potential.

The other end of the first voltage dividing resistor R1 is the current input point of the current mirror circuit CM including the fourth to sixth MOS transistors Q4 to Q6.
The gates of the S transistors Q4 to Q6 are connected to the drain of the fourth MOS transistor Q4.

The sources of the fourth to sixth MOS transistors Q4 to Q6 are commonly connected to a power supply, and the second M
The drain of the OS transistor Q2 is connected to the drain of the fifth MOS transistor Q5, which is the first current output point I1 of the current mirror circuit CM, and the set terminal of the flip-flop FF, and the source is connected to the reference potential. The second MOS transistor Q2 is provided as a positive-direction change detection transistor that changes the potential of its output electrode when the potential of the signal applied to the input terminal IN changes in the positive direction. .

Further, the third MOS transistor Q3 is
The transistor is provided as a negative-direction change detection transistor that changes the potential of its output electrode when the potential of the signal applied to the input terminal IN changes in the negative direction, and its drain is of the current mirror circuit CM. It is connected to the drain of the sixth MOS transistor Q6, which is the second output point, and the reset terminal of the flip-flop FF.

The gate of the third MOS transistor Q3 is connected to the connection point between the input resistor RA and the input coupling capacitor CIN, and the source is connected to the reference potential. The input coupling capacitor CIN is connected to the input terminal IN, and the output terminal of the flip-flop FF is the output terminal OUT.
It is connected to the. Here, the input resistor RA and the feedback resistor RB are set to be equal.

Numerical examples of the respective constituent elements of the Schmitt circuit 1 shown in FIG. 1 configured as described above are, for example, 200 KΩ for the input resistor RA and the feedback resistor RB, and the first voltage dividing resistor. R1 is 700 KΩ, the second voltage dividing resistor R
2 is 10 KΩ, the input coupling capacitor CIN is 5 pF, the power supply voltage range is 3 to 12 V, and the ASK modulation degree is 5%.

The operation of the Schmitt circuit 1 shown in FIG. 1 will be described below. First, the DC operating point will be described. The operating point of the drain voltage of the first MOS transistor Q1 is that the power supply voltage is set to the first and second voltage dividing resistors R1,
As a result of voltage division by R2, the voltage applied to the second voltage dividing resistor R2 and the threshold voltage V of the first MOS transistor Q1.
It is the sum of th.

The gate of the first MOS transistor Q1,
No DC current flows through the input coupling capacitor CIN. Therefore, the operating point of the gate voltage of the second and third MOS transistors Q2 and Q3 is equal to the operating point of the drain voltage of the first MOS transistor Q1.

Since the current flowing through the first voltage dividing resistor R1, the first MOS transistor Q1 and the second voltage dividing resistor R2 flows at the current input point of the current mirror circuit CM, a current equal to this current is the current. From the first and second current output points I1 and I2 of the mirror circuit CM, the second and third current output points, respectively.
Is supplied to the drains of the MOS transistors Q2 and Q3.

As described above, the gate voltages of the second and third MOS transistors Q2 and Q3 are higher than the gate-source voltage of the first MOS transistor Q1 by the first and second voltage dividing resistors R1. , R2 increases the voltage divided by R2.

Therefore, the second and third MOS transistors Q2 and Q3 are connected to the second and third MOS transistors from the first and second current output points I2 of the current mirror circuit CM.
An attempt is made to flow a current larger than the current supplied to the drains of the transistors Q2 and Q3.

As a result, the drain voltages of the second and third MOS transistors Q2 and Q3 are both at "L" level. Therefore, the content of the flip-flop FF does not change.

Next, the operation when the input signal changes will be described. The signal applied to the input terminal IN passes through the high-pass filter HPF having a cutoff frequency determined by the time constant of the product of “impedance of signal source + resistance of input resistor RA” and “input coupling capacitor CIN”. That is, they are differentiated.

When the signal applied to the input terminal IN changes in the positive direction, it is input to the gate of the third MOS transistor Q3 through the input coupling capacitor CIN, and the gate is driven in the positive direction.

Further, since a positive signal is applied to the gate of the first MOS transistor Q1 via the input resistor RA, the drain of the first MOS transistor Q1 changes in the negative direction. This change is fed back to the gate of the first MOS transistor Q1 via the feedback resistor RB.

In the present embodiment, since the input resistor RA and the feedback resistor RB are set to have the same resistance value, the gain of the first MOS transistor Q1 is "1".
Is operating as an amplifier. Therefore, the second MOS
The gate of the transistor Q2 is also driven in the negative direction. Third
Since the gate of the MOS transistor Q3 of the third MOS transistor Q3 is driven further in the positive direction than the operating point,
Drain remains at "L" level.

On the other hand, since the gate of the second MOS transistor Q2 is driven in the negative direction from the operating point, when the driving amount exceeds the divided voltage by the first and second voltage dividing resistors R1 and R2, The drain current of the second MOS transistor Q2 is the first current output point I of the current mirror circuit CM.
It becomes smaller than the current to be supplied from 1. As a result, the potential of the drain of the second MOS transistor Q2 rises to "H" level, and the output of the flip-flop FF is set to "H" level.

On the other hand, when the signal applied to the input terminal IN changes in the negative direction, the gates of the second and third MOS transistors Q2 and Q3 are driven in the opposite directions, and as a result, the third MOS transistor Q The drain potential changes to "H" level, and the second MOS transistor Q2
Since the potential of the drain of the flip-flop changes to "L" level, the output of the flip-flop FF is reset to "L" level.

As described above, the Schmitt circuit 1 of the present embodiment can detect the change in the input signal ASK-modulated by NRZ and demodulate it well.

Further, the Schmitt circuit 1 of the present embodiment
Has a hysteresis width proportional to the power supply voltage,
The change of the input signal can be used as the input signal without being divided. Further, the high frequency ripple on the power source is divided by the first and second voltage dividing resistors R1 and R2, and has the same effect on the change in the positive and negative directions of the input signal. It is possible to operate with a hysteresis width symmetrical in the direction of.

Further, as a capacitor which causes an increase in area when the Schmitt circuit is formed,
Since only the input coupling capacitor CIN needs to be provided, I
It is possible to make a circuit configuration that is extremely advantageous in performing C conversion.

FIG. 2 shows a second embodiment of the Schmitt circuit of the present invention. The Schmitt circuit 2 shown in FIG.
In the first MOS transistor Q1, a DC operating point of "threshold value + divided value of power supply voltage" is generated, and
Operates as an amplifier with a gain of "1",
It operates by the difference between the current value flowing through the transistor Q1 and the current values flowing through the second and third MOS transistors Q2 and Q3. In addition, the current mirror circuit C
The bias circuit 20 generates a voltage to be applied to the gates of the MOS transistors Q4, Q5, Q6 forming M.

In the Schmitt circuit 2 of the present embodiment, in order to prevent a problem caused by an increase in operating current as the power supply voltage rises, the current of the voltage dividing circuit is directly fed to the operating current of the first MOS transistor Q1. In this case, the three current supply means are separately provided.

In the circuit shown in FIG. 1, as the power supply voltage increases, the operating current increases in proportion to the increase in the power supply voltage.
There was a problem that the total current became large. On the other hand, in the case of the circuit of this embodiment, the current increases only in one place due to the increase in the power supply voltage, and the remaining current can be kept small, so that the current consumption is reduced. can do.

FIG. 3 shows a third embodiment of the Schmitt circuit of the present invention. The Schmitt circuit 3 shown in FIG.
Similar to the circuit of the second embodiment, the first MOS transistor Q1 generates a DC operating point of "threshold value + divided value of power supply voltage" and operates as an amplifier having a gain of "1". The current value flowing through the first MOS transistor Q1 and the second and third MOS transistors Q2,
It is designed to operate with a difference from the current value flowing through Q3.

Further, the Schmitt circuit 3 of the present embodiment
Is composed of only N-channel MOS transistors. Further, in the present embodiment, the first voltage dividing resistor R1 and the load resistors R3 and R4 are set to be equal to each other, and a current supply for supplying currents of equal magnitude to the three transistors Q1, Q2 and Q3, respectively. Constitutes a means.

According to the Schmitt circuit 3 of the present embodiment configured as described above, the Schmitt circuit 3 operates so that the operating point increases only when it is excessively driven. Further, since the load of the second and third MOS transistors Q2 and Q3 is a resistor, the gain is lowered, and therefore, the inverters INV1 to INV4 are inserted to correct the gain.

Next, a fourth embodiment of the Schmitt circuit of the present invention will be described with reference to FIG. The Schmitt circuit 4 of the present embodiment includes the second and third MOS transistors Q2,
In this example, the voltage applied to the source of Q3 is biased higher by the divided value of the power supply voltage. The Schmitt circuit 4 of the present embodiment configured as described above operates in the same manner as the Schmitt circuit 1 shown in FIG. 1, but when the input does not change,
The potentials of the drains of the second and third MOS transistors Q2 and Q3 are both at "H" level. Then, one becomes "L" level according to the change of the input signal. That is, the level is changed from "H" level to "L" level according to the input signal.

Since such a potential change is a potential change opposite to the above-mentioned example, the connection to the flip-flop FF is changed and the drain of the second MOS transistor Q2 is changed to IN.
Flip-flop FF reset terminal Res via V1
the third MOS transistor Q3 to IN
It is connected to the flip-flop FF set terminal Set via V2.

In this example, in the NRZ ASK modulation, there is an advantage that the current consumption can be reduced when the same data continues, that is, when the period during which the signal amplitude does not change is long.

Next, a fifth embodiment of the present invention will be described with reference to FIG. Generally, in a data carrier system, the voltage induced in the antenna coil of the slave unit changes depending on the distance from the interrogator (master unit), and when the distance becomes extremely short, the IC inside the slave unit A voltage higher than the withstand voltage may be generated. In such a case, in order to protect the internal circuit, a Zener diode, a clamp circuit or the like has been used to control the voltage for protection.

In the case of detecting the amplitude fluctuation as in the present invention, when the clamp circuit operates, the amplitude change width due to the ASK modulation after rectification is reduced, and the ASK modulation width appears to be shallow. The modulated signal may not be demodulated.

Therefore, in a fifth embodiment described below, as shown in FIG. 9, a clamp circuit 90 including a diode 92 and a resistor 93 connected in series with a transistor 91 and a resistor 93 is provided, and the clamp circuit 90 is provided. A signal is taken out from the voltage dividing point 94 of the diode 92 and the resistor 93, and the gate of the transistor 95 connected in parallel with the voltage dividing resistor R2 is controlled by this signal.

When the power supply voltage V _DD rises and the voltage at the voltage dividing point 94 of the diode 92 and the resistor 93 becomes close to the operating voltage of the transistor 91, the transistor 91 gradually starts to operate according to the characteristics of the diode 92. , Finally on. Since the on resistance of the transistor 91 is small, a current flows through the transistor 91 as a bypass to prevent a voltage rise.

At this time, the transistor 91 is turned on, and at the same time, the transistor 95 is also turned on.
The resistor R2 of the voltage dividing circuit, which has been divided by the ratio of 1: (resistor R2 + threshold voltage of the transistor Q1), is the resistor R2.
The parallel circuit of the on resistance of the transistor 91 is replaced, and the voltage dividing ratio of the voltage dividing circuit becomes large as in the case where the resistance value of the resistor R2 is lowered. As a result, the hysteresis width can be reduced and correct demodulation can be achieved even when clamped.

FIG. 5 shows an application example of the Schmitt circuits 1 to 4 of this embodiment. FIG. 5 shows a configuration in which the Schmitt circuit 1 of the present embodiment is provided in place of the conventional circuit shown in FIG. 6, and stable operation can be realized, and operation can be performed with low current consumption. It is suitable for use as a slave unit of a data carrier system in which the voltage easily fluctuates.

[0063]

As described above, the present invention detects the changing point of the envelope (envelope) of the received signal and determines whether the changing direction at the changing point is the positive direction or the negative direction. Therefore, when demodulating data, the operating point for detecting the potential change of the signal applied to the input terminal is set higher than the reference potential by a predetermined potential, so that the power supply voltage is changed by ASK modulation. However, it can be stably operated and can be operated with low current consumption. Thereby, for example, NR
The change point and the direction of the ASK-modulated signal in Z can be detected well, and data demodulation with few errors can be performed.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of a Schmitt circuit of the present invention.

FIG. 2 is a circuit diagram showing a second embodiment of the Schmitt circuit of the present invention.

FIG. 3 is a circuit diagram showing a third embodiment of the Schmitt circuit of the present invention.

FIG. 4 is a circuit diagram showing a fourth embodiment of the Schmitt circuit of the present invention.

FIG. 5 is a circuit diagram showing a usage example of the Schmitt circuit of the present invention.

FIG. 6 is a circuit diagram showing an example of a conventional Schmitt circuit.

7 is a waveform diagram illustrating the operation of each unit of the circuit in FIG.

8 is a waveform diagram illustrating the operation of each unit of the circuit in FIG.

FIG. 9 is a circuit diagram showing a fifth embodiment of the present invention.

[Explanation of symbols]

1 Schmitt circuit 2 of the first embodiment 2 Schmitt circuit 3 of the second embodiment 3 Schmitt circuit 4 of the third embodiment Schmitt circuit Q1 of the fourth embodiment Operating point setting transistor Q2 Forward change detecting transistor Q3 negative direction change detecting transistor R1 minute pressure resistor R2 minutes pressure resistor FF flip-flop circuit V _DD supply voltage R _A input resistor R _B feedback resistor C _IN input coupling capacitor

Claims (5)

(57) [Claims] 1. An input terminal to which one end of an input coupling capacitor is connected, and first, second, and third transistors provided to detect a potential change of a signal applied to the input terminal, A voltage dividing means having a first voltage dividing resistor and a second voltage dividing resistor for dividing a voltage between the power supply voltage and the reference potential to a predetermined voltage, and the drain of the first transistor Is connected to an input terminal of a current mirror circuit connected to a power supply via the first voltage dividing resistor, and a source of the first transistor is connected via the second voltage dividing resistor. The input coupling capacitor is connected to a reference potential point, the other end of the input coupling capacitor is connected to the gate of the third transistor, and is also connected to the gate of the first transistor via an input resistor. The first tiger The drain of the transistor is connected to the gate of the second transistor and also to the gate of the first transistor via a feedback resistor, and the sources of the second transistor and the third transistor are connected. Are respectively connected to a reference potential point, drains of the second transistor and the third transistor are respectively connected to first and second output terminals of the current mirror circuit, and the first transistor The first transistor is also operated as an operating point setting transistor so that the operating points of the second transistor and the third transistor determined based on the operating point of are the predetermined values, and , A flip that changes the logic level of the output terminal when the signal level applied to the input terminal changes. Further comprising a flop circuit, a drain of said second transistor, said flip
Connected to a set input terminal of a flop circuit, and the drain of the third transistor is connected to the flip-flop.
The second input circuit is connected to a reset input terminal of a flop circuit and operates for detecting a positive change when the signal level applied to the input terminal changes in the positive direction.
The drain voltage of the transistor is set to "H", the output of the flip-flop circuit is set to "H", and when the signal level applied to the input terminal changes in the negative direction, it operates for detecting the negative direction change. The third
The Schmitt circuit, wherein the drain voltage of the transistor is set to "H" and the output of the flip-flop circuit is set to "L". 2. An input terminal to which one end of an input coupling capacitor is connected, and first, second and third transistors provided for detecting a potential change of a signal applied to the input terminal, Voltage dividing means for dividing the voltage between the power supply voltage and the reference potential to a predetermined voltage, and connecting the source of the first transistor to the voltage dividing output point of the voltage dividing means. The other end of the input coupling capacitor is connected to the gate of the third transistor and also connected to the gate of the first transistor through an input resistor, and the drain of the first transistor is , The gate of the second transistor and the gate of the first transistor via a feedback resistor, and the second transistor and the third transistor. Source is connected to a reference potential point, and the drains of the first transistor, the second transistor, and the third transistor are connected to current supply means for supplying an equal current to each. The operating point of the first transistor is set so that the operating points of the second transistor and the third transistor determined based on the operating point of the first transistor have a predetermined value. And a flip-flop circuit that changes the logical level of the output terminal when the signal level applied to the input terminal changes, and the drain of the second transistor is The flip
Connected to a set input terminal of a flop circuit, and the drain of the third transistor is connected to the flip-flop.
The second input circuit is connected to a reset input terminal of a flop circuit and operates for detecting a positive change when the signal level applied to the input terminal changes in the positive direction.
The drain voltage of the transistor is set to "H", the output of the flip-flop circuit is set to "H", and when the signal level applied to the input terminal changes in the negative direction, it operates for detecting the negative direction change. The third
The Schmitt circuit, wherein the drain voltage of the transistor is set to "H" and the output of the flip-flop circuit is set to "L". 3. The Schmitt circuit according to claim 2, wherein the current supply unit is a current mirror circuit. 4. An input terminal to which one end of an input coupling capacitor is connected, and first, second and third transistors provided to detect a potential change of a signal applied to the input terminal, A voltage dividing means having a first voltage dividing resistor and a second voltage dividing resistor for dividing a voltage between the power supply voltage and the reference potential to a predetermined voltage, and the drain of the first transistor Is connected to a power source via the first voltage dividing resistor, the source of the first transistor is connected to a reference potential point via the second voltage dividing resistor, and the other end of the input coupling capacitor is connected. Is connected to the gate of the third transistor and is also connected to the gate of the first transistor via an input resistor, and the drain of the first transistor is connected to the second transistor. Ge of And a gate of the first transistor via a feedback resistor, sources of the second transistor and the third transistor are connected to a reference potential point, respectively, The drains of the second transistor and the third transistor are respectively connected to a power source via the third and fourth resistors having the same resistance value as the first voltage dividing resistor, and the operation of the first transistor The first transistor is also operated as an operating point setting transistor so that the operating points of the second transistor and the third transistor determined on the basis of a point become a predetermined value. Further comprising a flip-flop circuit that changes the logic level of the output terminal when the signal level applied to the input terminal changes, The signal of the drain of the transistor is transmitted to the set input terminal of the flip-flop circuit, and the signal of the drain of the third transistor is transmitted to the reset input terminal of the flip-flop circuit and applied to the input terminal. When the signal level of the second direction changes in the positive direction, the second
The drain voltage of the transistor is set to "H", the output of the flip-flop circuit is set to "H", and when the signal level applied to the input terminal changes in the negative direction, it operates for detecting the negative direction change. The third
The Schmitt circuit, wherein the drain voltage of the transistor is set to "H" and the output of the flip-flop circuit is set to "L". 5. A voltage clamp means for holding the power supply voltage to a predetermined voltage when the power supply voltage exceeds a predetermined voltage, and a component for changing a voltage division ratio of the voltage dividing means when the voltage clamp means operates. The Schmitt circuit according to any one of claims 1 to 4, further comprising: a pressure ratio changing unit for reducing the divided voltage.