JPH11214568A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a semiconductor device in which a fine crack of an insulating substrate constituted of a ceramic or the like can be detected without impressing high voltage, and dielectic breakdown can be prevented. SOLUTION: At least one coil of a fine independent open loop copper foil pattern 2d is formed in the neighborhood of the outer peripheral part of the front side of an insulating substrate 2A in which a thick copper foil pattern 2b on which a power semiconductor element is mounted is formed on the front side of a ceramic board 2a, and a thick copper foil 2c is joined to the back side of the ceramic board 2a, and pads 2e are provided at the both edge parts of the open loop copper foil pattern 2d. This insulating substrate 2A is incorporated in a case, the pads 2e are connected with the outside terminal for a monitor provided in the case, and conduction between the outside terminals for the monitor is monitored. Thus, the presence or absence of a fine crack on the insulating substrate 2A can be detected.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device capable of detecting insulation deterioration in a nondestructive manner, and more particularly to a semiconductor device having an insulating substrate on which a metal pattern is formed and capable of detecting fine cracks in the insulating substrate. It is about.

[0002]

2. Description of the Related Art FIG. 4A is a plan view showing a conventional semiconductor device, FIG. 4B is a sectional view of the semiconductor device, and FIG.
FIG. 5A is a plan view of an insulating substrate forming a part of the semiconductor device shown in FIG. 4, and FIG. 5B is a sectional view of the insulating substrate.

In FIGS. 4A and 4B, reference numeral 1 denotes a base plate made of a metal material such as a copper plate, and 2 denotes an insulating substrate soldered to the base plate 1 via a thick copper foil 2c described later. Reference numeral 4 denotes a power semiconductor element soldered to the insulating substrate 2 via a thick copper foil pattern 2b to be described later, 5 denotes a case made of insulating resin, 6 denotes an external electrode terminal for supplying a main current, and 6A denotes an external control terminal. The electrode terminals 7 are aluminum wires, the external electrode terminals 6 and 6A are inserted into the case 5, the base plate 1 is adhered to the bottom of the case 5, and the external electrode terminals 6 and 6A and the power semiconductor element 3 , 4 are connected by an aluminum wire 7.

In FIGS. 5A and 5B, reference numeral 2a denotes a ceramic plate as an insulator, and 2b denotes a thick copper foil pattern as a metal pattern formed on the front side of the ceramic plate 2a. Later, power semiconductor elements 3, 4 as semiconductor elements are soldered on the patterned thick copper foil pattern 2b. 2c is a thick copper foil as a metal plate,
It is bonded to the back side of the ceramic plate 2a in the same manner as the thick copper foil pattern 2b, and is made of a single plate bonded to almost the entire back side of the ceramic plate 2a. The insulating substrate 2 includes a ceramic plate 2a, a thick copper foil pattern 2b, and a thick copper foil 2c, and the thick copper foil 2c serves as a surface to be soldered to a base (not shown).

Accordingly, most of the heat generated in the power semiconductor elements 3 and 4 mounted and soldered on the patterned thick copper foil pattern 2b on the insulating substrate 2 is mainly generated by the thick copper foil pattern 2b and the ceramic plate 2a. The heat is radiated from the base plate 1 through the thick copper foil 2c, but the power semiconductor elements 3, 4
And the base plate 1 are electrically insulated by the ceramic plate 2a.

In a conventional semiconductor device, an insulating substrate 2
Is configured as described above, and the ceramic plate 2a has a structure in which a large crack hardly occurs even when a thermal or mechanical stress is applied, and has a relatively large dielectric strength. However, when a mechanical stress is applied in a processing step such as cutting from a wafer, a minute crack may be generated, and the minute crack has a predetermined dielectric strength. , May gradually progress and grow into large cracks, which lowers the dielectric strength and causes a failure.

Therefore, detection at the stage of a fine crack is required. For detection of the fine crack, the thick copper foil pattern 2b on the front side and the thick copper foil 2c on the back side of the insulating substrate 2 are required. It is necessary to apply a considerably high voltage.

That is, in the semiconductor device, all the external terminals 6, 6A electrically connected to the thick copper foil pattern 2b on the front side of the insulating substrate 2 and the thick copper foil 2c on the rear side are electrically connected. Detection is performed by applying a high voltage to the base plate 1. At this time, if any contact failure occurs, a voltage higher than the maximum rated voltage is applied to the power semiconductor devices 3 and 4 themselves, and the devices themselves are destroyed. Further, when a voltage exceeding the creeping dielectric strength transmitted on the surface of the ceramic plate 2a is applied, the creeping discharge lowers the dielectric strength.

As described above, with respect to the ceramic plate 2a,
It is necessary to apply a high voltage between the thick copper foil pattern 2b and the thick copper foil 2c up to an allowable limit level of the dielectric strength for inspection. However, due to contact variations at the time of inspection, the high voltage causes the power semiconductor element 3, In some cases, these are applied to the insulating substrate 2 and break down or cause a creeping discharge beyond the creeping strength of the insulating substrate 2 instead of a crack. In addition, there is no means for detecting insulation deterioration during actual use, and insulation breakdown due to crack growth cannot be prevented beforehand.

[0010]

Since the insulating substrate 2 which constitutes a part of the conventional semiconductor device is constructed as described above, the insulating substrate 2 must be insulated in order to detect the presence or absence of fine cracks in the insulating substrate 2. It is necessary to perform inspection by applying a high voltage up to an allowable limit level of proof stress. However, a high voltage is applied to the power semiconductor elements 3 and 4 due to a contact variation at the time of the inspection, and the power semiconductor elements 3 and 4 are broken or insulated, not cracked. There has been a problem that creeping discharge occurs beyond the creeping strength of the substrate 2 and it is difficult to inspect the insulation deterioration of the insulating substrate 2. There is also a problem that there is no means for detecting insulation deterioration due to crack growth during actual use, and it is impossible to prevent insulation breakdown beforehand.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a semiconductor device capable of detecting fine cracks in an insulating substrate made of a ceramic plate or the like by applying a relatively low voltage. With the goal.

[0012]

According to a first aspect of the present invention, there is provided a semiconductor device including an insulating substrate having a metal pattern formed thereon for mounting a semiconductor element, and being independent of the metal pattern near an outer peripheral portion of the insulating substrate. An open-loop metal pattern is formed, and the open-loop metal pattern has a current-carrying pad at both ends, and has one or more loops including the pad.

A semiconductor device according to a second aspect of the present invention includes an insulating substrate having a metal plate bonded thereto and an external terminal, wherein the metal plate on the insulating substrate is patterned to mount a semiconductor element. In the vicinity of the outer peripheral portion of the patterned insulating substrate surface, an open loop metal pattern having at least one turn of an open loop portion, and a pad for conducting electricity at both ends thereof is formed, and the pad is connected to the external terminal. What is connected.

Further, a semiconductor device according to a third aspect of the present invention is the semiconductor device according to the first aspect.
Alternatively, in the semiconductor device according to the second aspect, the loop portions near both ends of the open-loop metal pattern are double-formed on the same plane, and the double-sided loops have pads formed at both ends. These are arranged between the clubs.

The semiconductor device according to a fourth aspect of the present invention is a semiconductor device according to the first aspect.
In the semiconductor device according to any one of the third to third aspects, the thickness of the open loop metal pattern is formed to be 1/10 or less of the thickness of the metal pattern on which the semiconductor element is mounted.

Further, according to a fifth aspect of the invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of preparing an insulating substrate having a plurality of external terminals and a metal plate joined thereto, and mounting the metal plate on the insulating substrate with a semiconductor element. Forming an open-loop metal pattern of at least one turn having pads on both ends, independent of the pattern of the metal plate, in the vicinity of the outer periphery of the patterned insulating substrate surface, and When,
Connecting between the pad and the external terminal.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 First Embodiment A first embodiment of the present invention will be described with reference to FIGS. FIG. 1A is a plan view of an insulating substrate included in a part of a semiconductor device.
FIG. 2B is an enlarged view of an end portion of the open loop copper foil pattern formed on the insulating substrate, and FIG. 2 is a plan view showing the entire configuration of the semiconductor device. FIG. 3A is an explanatory view of a method for detecting a fine crack in the insulating substrate shown in FIG. 1, FIG.
FIG. 3C is an enlarged view of a main part of FIG. In the drawings, the same reference numerals as those of the conventional example indicate the same or equivalent parts as those of the conventional example.

1A and 1B, reference numeral 2d denotes an open loop copper foil pattern as an open loop metal pattern, and a thick copper foil pattern as a metal pattern on which a power semiconductor is mounted on the front side of the ceramic plate 2a. An extremely thin open pattern formed so as to extend at least once around the outer peripheral portion of the ceramic plate 2a independently of the ceramic plate 2b. 2e
Are energizing pads formed on both ends of the open-loop copper foil pattern 2d for wire bonding the aluminum wires 7, respectively.

That is, the open loop copper foil pattern 2d can detect a fine crack generated in the ceramic plate 2a by applying a relatively low voltage between the pads 2e formed at both ends. Then, the insulating substrate 2A
Is obtained by adding and forming an open-loop copper foil pattern 2d to the conventional insulating substrate 2 shown in FIG.

In FIG. 2, 5A is a case, 8 is a monitor external terminal provided by insert in the case 5A, and a pair of monitor external terminals 8 and a pair of pads 2e are connected by aluminum wires 7 respectively. Have been.

Next, a method of manufacturing the semiconductor device according to the first embodiment will be described. First, a base plate 1, a case 5A provided with a plurality of external electrode terminals 6, 6A and a pair of monitor external terminals 8, and a ceramic plate 2a having a structure in which thick copper foil (not shown) is bonded to both surfaces. And prepare. Next, by patterning the thick copper foil bonded to the surface of the ceramic plate 2a, the thick copper foil pattern 2b and the both ends independent of the thick copper foil pattern 2b are provided near the outer periphery of the ceramic plate 2a. And at least one or more open loop copper foil patterns 2d having pads 2e. next,
The semiconductor elements 4 and 5 are soldered to the thick copper foil pattern 2b.

Next, the insulating substrate 2A is placed on the base plate 1 by soldering a thick copper foil (not shown) bonded to the back surface of the ceramic plate 2a on the insulating substrate 2A to the base plate 1. Fix it. Next, the base plate 1 on which the insulating substrate 2A is mounted and fixed and the case 5A are bonded. Finally, the external electrode terminals 6, 6A are connected to the thick copper foil pattern 2b and the semiconductor elements 4, 5 soldered to the thick copper foil pattern 2b with aluminum wires 7, and a pair of monitor external terminals 8 are provided. And a step of connecting each of the pads 2e with the pair of pads 2e with an aluminum wire 7 are sequentially performed to complete the semiconductor device.

In FIG. 3A, reference numeral 9 denotes a tester for inspecting the continuity between the pads 2e, in which a battery, a resistor, an ammeter and the like are connected in series. Next, a method of detecting insulation deterioration of a semiconductor device, that is, a method of detecting fine cracks generated in the ceramic plate 2a by applying a low voltage will be described with reference to the drawings.

When the fine cracks CA and CB as shown in FIGS. 3B and 3C occur at the portion A or B in FIG. 3A, the insulating substrate 2A is placed on the outer peripheral portion of the ceramic plate 2a. Open loop copper foil pattern 2d formed in one or more turns
Break at the same time. At this time, if a continuity test between both ends of the pattern, that is, a continuity test between the pads 2e using the tester 9, is performed, the resistance value almost close to zero indicates infinity in a normal state.

In particular, the fine cracks CB generated only on the ceramic surface, such as the portion B in FIG. 3A, cannot be detected by the conventional method of applying a high voltage. May grow into fine cracks CA as shown in FIG. But,
In the first embodiment, by monitoring the continuity between the monitoring external terminals 8, this can be detected at the stage of an initial fine crack, and a measure for preventing the dielectric breakdown can be made.

As described above, in the first embodiment,
In the insulating substrate 2A on which the thick copper foil pattern 2b was formed, an extremely thin independent open loop copper foil pattern 2d of at least one turn was formed near the outer peripheral portion of the ceramic plate 2a, and pads 2e were provided at both ends thereof. So again
Since the monitor external terminal 8 is provided on the case 5A and the monitor external terminal 8 and the pad 2e are connected by the aluminum wire 7, when the semiconductor device is completed, it is insulated by a continuity test between the monitor external terminals 8. A fine crack in the substrate 2A can be detected, and by periodically monitoring even in the actual use stage, dielectric breakdown due to the growth of the fine crack can be prevented.

Further, it is possible to detect the presence or absence of minute cracks in the insulating substrate 2A alone before or after soldering the power semiconductor elements 3 and 4, and it is possible to early find defective products having minute cracks. .

As shown in detail in FIG. 1 (B), the loop portions at both ends of the open-loop copper foil pattern 2d on the insulating substrate 2A are doubled, and two pads 2e provided at both ends are formed. Since it is arranged opposite to the inside of the substantially parallel loop portion formed in the overlapped manner and the overlap portion t is provided to eliminate the straight portion in the opening portion and to always bypass the opening portion, detection of a fine crack generated substantially linearly is detected. Leakage can be reliably prevented.

The thickness of the thick copper foil pattern 2b is usually 15
Open loop copper foil pattern 2d
Is formed simultaneously with the thick copper foil pattern 2b, the thickness of the open loop copper foil pattern 2d is also formed to the same thickness as the thick copper foil pattern 2b. However, since the open-loop copper foil pattern 2d is formed to have a small width of about 100 μm, it is cut following the occurrence of ordinary fine cracks, and there is no practical problem. However, by making the thickness of the open-loop copper foil pattern 2d less than 1/10 of the thickness of the thick copper foil pattern 2b, that is, by forming it to about 10 to 30 μm, it is possible to follow the generation of finer cracks. Then, the open loop copper foil pattern 2d is cut, and the occurrence of fine cracks can be detected at an earlier stage.

In order to make the thickness of the loop portion of the open loop copper foil pattern 2d less than 1/10 of the thickness of the thick copper foil pattern 2b, the thickness of the thick copper foil pattern 2b is After the step of forming the open loop copper foil pattern 2d, a step of selectively etching the loop portion of the open loop copper foil pattern 2d is added.

[0031]

According to the first aspect of the present invention, at least one or more independent open loop metal patterns having pads at both ends are formed near the outer peripheral portion of the insulating substrate. By the continuity test, the presence or absence of a crack that grows from the periphery to the center of the insulating substrate can be surely inspected, and an effect that a dielectric breakdown can be prevented can be obtained.

According to the second invention, pads provided at both ends of the open-loop metal pattern on an insulating substrate having at least one independent open-loop metal pattern formed in the vicinity of the outer peripheral portion are connected to the external terminals. Therefore, after completion of the semiconductor device, the presence or absence of cracks in the insulating substrate can be inspected by inspecting the continuity between the external terminals, so that an effect of easy maintenance can be obtained.

According to the third aspect of the present invention, the vicinity of both ends of the open-loop metal pattern is double-formed on the same plane, and pads are formed at each of the both ends. Since it was arranged between the open loop metal patterns,
There is no linear portion from the outside of the loop to the inside of the opening, and an effect is obtained that cracks in any direction near the opening can be reliably detected in any direction.

According to the fourth invention, the thickness of the open-loop metal pattern on the insulating substrate is relatively thin, ie, 1/10 or less of the thickness of the metal plate patterned for mounting the semiconductor element. Since it is formed, the effect of more reliably inspecting the fine cracks in the insulating substrate can be obtained.

According to the fifth aspect of the present invention, there is provided a step of forming an open-loop metal pattern in the vicinity of the outer peripheral portion of the insulating substrate and connecting between pads and external terminals in the open-loop metal pattern. After completion of the semiconductor device, there is an effect that a method of manufacturing a semiconductor device which can easily inspect for cracks in the insulating substrate and is easy to maintain can be obtained.

[Brief description of the drawings]

FIG. 1 is a plan view of an insulating substrate forming a part of a semiconductor device according to a first embodiment of the present invention (FIG. 1A) and an enlarged view of an end of an open-loop copper foil pattern formed on the insulating substrate; It is a figure (FIG. 1 (B)).

FIG. 2 is a plan view of a semiconductor device on which the insulating substrate shown in FIG. 1 is mounted.

FIG. 3 is an explanatory diagram of a method for detecting a fine crack in the insulating substrate shown in FIG.

FIG. 4 is a plan view showing a conventional semiconductor device (FIG.
(A)) and its sectional view (FIG. 4 (B)).

FIG. 5 is a plan view (FIG. 5A) of an insulating substrate forming part of the semiconductor device shown in FIG. 4 and a cross-sectional view thereof (FIG. 5);
(B)).

[Explanation of symbols]

1 base plate, 2A insulating substrate, 2a ceramic plate,
2b thick copper foil pattern, 2d open loop copper foil pattern,
2e pad, 3, 4 power semiconductor device, 5A case,
6, 6A external electrode terminal, 7 aluminum wire, 8 external terminal for monitor

Claims (5)

[Claims] An insulating substrate on which a metal pattern is formed for mounting a semiconductor element, wherein the insulating substrate has an open-loop metal pattern formed near an outer peripheral portion thereof and independent of the metal pattern; A semiconductor device characterized in that the metal pattern has a current-carrying pad at both ends and one or more loops including the pad. 2. An insulating substrate having a metal plate joined thereto and an external terminal, wherein the insulating substrate is patterned so that a semiconductor element is mounted on the metal plate, and an outer periphery of the patterned insulating substrate surface. An open loop metal pattern having at least one turn or more open loop portions near the portion, and an open-loop metal pattern having pads for conducting electricity at both ends thereof, wherein the pads are connected to the external terminals. Semiconductor device. 3. The semiconductor device according to claim 1, wherein the open-loop metal pattern has a double loop portion near both ends on the same plane, and has pads at both ends. Are provided between the loop portions formed doubly. 4. The semiconductor device according to claim 1, wherein the thickness of the open-loop metal pattern is 1 / th of the thickness of the metal pattern on which the semiconductor element is mounted.
10. A semiconductor device, wherein the number of semiconductor devices is less than 10. 5. A step of preparing an insulating substrate having a plurality of external terminals and a metal plate joined thereto, patterning the metal plate on the insulating substrate so that a semiconductor element can be mounted thereon, and forming the patterned insulating substrate. Near the outer peripheral portion of the substrate surface, independent of the pattern of the metal plate, having pads at both ends,
A method of manufacturing a semiconductor device, comprising: a step of forming at least one turn of an open-loop metal pattern; and a step of connecting between the pad and the external terminal.