JPH11204945A - Multilayer wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To secure electric connection between a ground layer and a power supply layer by arranging a capacitor within an optimal range for ensuring a continuous flow of a feedback current for each through hole. SOLUTION: In a multilayer wiring board having a power supply layer 15 and a ground layer 14 with through holes formed through the power supply layer 15 and ground layer 14, an interlayer dielectric 24 is provided between the power supply layer 15 and ground layer 14 for each of non-connection through holes 20 and 21 which do not contact the power supply layer 15 and ground layer 14.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board, and more particularly to a multilayer wiring board for reducing radiation noise via a capacitor component.

[0002]

2. Description of the Related Art Hitherto, a multilayer wiring board having a plurality of layers including a power supply layer and a ground layer has been known.

FIG. 6 is a partially broken perspective view of a conventional multilayer wiring board. FIG. 7 is a distribution diagram of the return current generated in the multilayer wiring board of FIG.

As shown in FIG. 6, a multilayer wiring board 1 has an interlayer insulator 3 between upper and lower sides between a wiring layer 2a and a wiring layer 2b.
And a power supply layer 5 sandwiched between them. The wiring layer 2a is provided with wiring patterns 7a of the two mounted ICs 6a and 6b. Each wiring pattern 7a is connected to the wiring layer 2b through each through hole 8a penetrating the ground layer 4 and the power supply layer 5. Is connected to the wiring pattern 7b provided in the first wiring pattern.

The multilayer wiring board 1 includes, in addition to the through holes 8a not connected to the ground layer 4 and the power supply layer 5,
A through hole 8b connected only to the ground layer 4 and a through hole 8c connected only to the power supply layer 5 are provided.
On the wiring layer 2a, a capacitor 9 connected to both through holes 8b and 8c by a wiring pattern 7c is provided.

[0006] The above-mentioned wiring method is actually used in many cases in a multilayer wiring board.
When a current flows from C6a to IC 6b, the return current of wiring pattern 7a on wiring layer 2a passes through ground layer 4, and the return current of wiring pattern 7b on wiring layer 2b passes through power supply layer 5. The distribution of the return current flow is obtained from the following equation.

[0007]

(Equation 1)

According to this equation 1, if the thickness of the interlayer insulator 3 between the wiring layer 2a and the ground layer 4 is 0.3 mm, the flow of the return current is distributed as shown in FIG. It can be seen that Ix flows concentratedly in a range x of approximately ± 2 to 3 mm centering directly below each of the wiring patterns 7a and 7b.

The ground layer 4 and the power supply layer 5
Means that both wiring patterns 7 are formed at the portions where the through holes 8a are formed.
Since they are not connected to a and 7b, the flow of the return current is not continuous between the layers 4 and 5, and the radiation noise increases as compared with the case where wiring is performed on the same layer. As a countermeasure against this increase in radiation noise, a capacitor is interposed between the ground layer 4 and the power supply layer 5 near the through hole 8a and the layers 4 and 5 are connected in an alternating manner, so that the flow of the return current is continued. There is a method to suppress radiation noise. In this case, the above effect cannot be sufficiently obtained unless a capacitor is arranged within the range x in which the return current Ix flows.

When a capacitor is arranged near the through hole 8a in order to suppress radiation noise, a mounting area for arranging the capacitor is required as in the case where the capacitor 9 is installed. Wiring board 1
In this case, it is difficult to similarly arrange capacitors in all of the through holes 8a not connected to the ground layer 4 and the power supply layer 5 because a large mounting area and components are required. Further, in recent years, the high-density mounting of the multilayer wiring board 1 has been advanced, so that even if a capacitor can be arranged, it is not always possible to secure an arrangement place within a range in which a return current flows.

In view of the above, several wiring boards having a capacitor function in a layer constituting the board have been proposed.

For example, in a multilayer printed wiring board disclosed in Japanese Patent Application Laid-Open No. 58-158996, an insulating layer and a dielectric layer are provided side by side in the same layer, and a conductor layer is provided on the front and back surfaces. Japanese Patent Application Laid-Open No. 2-9899 discloses a thick-film multilayer circuit and a method for manufacturing the same disclosed in Japanese Patent Application Laid-Open No. 59-89003, in which a dielectric portion and an electrode sandwiching the dielectric are provided in a part of an insulator layer.
In the multilayer substrate disclosed in Japanese Patent Application Publication No. 6 (1994), a dielectric thin film and a conductive thin film sandwiching the dielectric thin film in a plurality of layers are provided on a part of the substrate layer (polyimide layer).

The multilayer printed circuit board disclosed in Japanese Patent Application Laid-Open No. 3-209975 has a conductor layer and a ceramic provided as a dielectric between the conductor layers provided on a part of an inner layer printed circuit board. Kaihei 7-14287
The printed circuit board disclosed in Japanese Patent No. 1 has a pattern connected to a power supply layer sandwiching glass epoxy as an interlayer insulating material and a pattern connected to a ground layer.

[0014]

However, in a multilayer wiring board, a dielectric is disposed away from the through-hole by interposing an insulator surrounding the periphery of the through-hole. Is
Dielectrics are not placed around the through-holes.In a multilayer board, a dielectric thin film and a conductive thin film are placed by taking both adjacent through-holes inside.In a multilayer printed board, a conductor layer and a ceramic are adjacent. The printed circuit board is disposed between the through-holes where the glass epoxy and the two patterns are adjacent to each other.

That is, in each of the above-mentioned conventional examples, the capacitor cannot be arranged within the optimum range for continuing the return current flow for each through hole, and the electrical connection between the ground layer and the power supply layer is not possible. Therefore, it is not possible to obtain an effective capacitor function for suppressing radiation noise.

An object of the present invention is to provide a capacitor within an optimum range for continuing the flow of return current for each through hole, thereby ensuring electrical connection between the ground layer and the power supply layer. It is to provide a multilayer wiring board.

[0017]

In order to achieve the above object, a multilayer wiring board according to the present invention comprises a power supply layer and a ground layer, and has a through-hole penetrating the power supply layer and the ground layer. In the wiring board, a dielectric layer is provided between the power supply layer and the ground layer for each non-connection through hole that does not contact the power supply layer and the ground layer.

With the above configuration, the dielectric layer sandwiched between the ground layer and the power supply layer functions as an individual capacitor for each unconnected through hole. This makes it possible to suppress radiation noise by providing a capacitor for each non-connected through-hole, without mounting a capacitor component on the surface of the multilayer wiring board.

[0019]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a partially broken perspective view of a multilayer wiring board according to an embodiment of the present invention. As shown in FIG. 1, a multilayer wiring board 10 has a four-layer structure having a ground layer 14 and a power supply layer 15 sandwiched between upper and lower sides by an interlayer insulator 13 between a front wiring layer 11 and a back wiring layer 12. Is formed. In the wiring layer 11, two mounted ICs 16, 1
7 are provided, and each wiring pattern 18, 19 is provided with a through hole (non-connection through hole) 20, which penetrates the ground layer 14 and the power supply layer 15.
21, the wiring pattern 2 provided on the wiring layer 12
2 are connected. A clearance 23 is provided between each of the through holes 20, 21 and the ground layer 14 and the power supply layer 15, and the through holes 20, 21 and the ground layer 14 and the power supply layer 15 are not connected.

In the interlayer insulator 13 between the ground layer 14 and the power supply layer 15,
An interlayer dielectric 24 occupying a predetermined range adjacent to each of the through holes 20 and 21 is provided. This interlayer dielectric 24
Are formed around the through holes 20 and 21 in a shape (in this case, an annular shape) larger than the clearance 23 so as to include the clearance 23. Therefore, around the through holes 20 and 21 penetrating all the layers, the interlayer dielectric 2 sandwiched between the ground layer 14 and the power supply layer 15 is provided.
4 forms a capacitor.

An example of a method for manufacturing the multilayer wiring board 10 in which the interlayer dielectric 24 is provided on the interlayer insulator 13 will be described below.

FIG. 2 is a sectional view showing an example of a manufacturing process of the multilayer wiring board of FIG. As shown in FIG. 2, first, a double-sided board 25 constituting an upper layer, a double-sided board 26 constituting a lower layer, and an insulator constituting an interlayer insulator 13 serving as an intermediate layer sandwiched between these double-sided boards 25 and 26. 27, a required number of insertion holes (one in the figure) are formed in a region of the insulator 27 where the interlayer dielectric 24 is to be provided, and a dielectric material 28 having a desired relative permittivity is inserted into the insertion hole. (See (a)). The double-sided substrate 25 is provided with through-hole pads 30 on the upper wiring layer 29 and the ground layer 14 on the lower surface. The double-sided substrate 26 has the power supply layer 15 on the upper surface and the through-hole on the lower wiring layer 31. Hole pads 30 are provided.

The subsequent steps are the same as those in the ordinary method of manufacturing a multilayer wiring board.
Insulator 2 in which dielectric material 28 is partially incorporated
7 and sandwich-pressed (see (b)), a round hole for a through-hole penetrating through these double-sided substrates 25 and 26 and the insulator 27 with the both pads 30 at both ends and substantially through the center of the dielectric material 28. Then, a plating process is performed on the round hole 32 (see (c)).

As a result, an interlayer dielectric 24 is provided between the ground layer 14 and the power supply layer 15 around each through hole 20, 21.
Can be manufactured (see FIG. 1). In the above-mentioned step (a), if a dielectric having a different relative dielectric constant is separately inserted into each of the plurality of inserted holes, a multilayer wiring having different capacitor values for each of the plurality of through holes is provided. A substrate can be manufactured.

The capacitance of the above capacitor is obtained from the following equation. C = Kεs / h Equation 2 where C: capacitance [pF], K: proportional constant (0.0
884), ε: relative permittivity, s: area of the ground layer and power supply layer with respect to the dielectric, and h: thickness of the dielectric.

Therefore, by adjusting the relative permittivity ε and the area s of the ground layer and the power supply layer with respect to the dielectric, the capacitance can be adjusted to an arbitrary value.

An example of the interlayer dielectric 24 provided on the multilayer wiring board 10 having the above configuration will be described below.

FIG. 3 is an explanatory diagram of the periphery of the through hole of FIG. 1 as viewed from above. As shown in FIG. 3, the interlayer dielectric 24 provided between the ground layer 14 and the power supply layer 15 around the through hole 20 has a diameter larger than the diameter of the clearance 23, and And a part of a range b of the wiring pattern 19 of the power supply layer 15 where the return current flows.

The thickness of each interlayer insulator 13 between wiring layer 11 and ground layer 14 and between power supply layer 15 and wiring layer 12 is 0.3 mm, and the thickness of interlayer insulator 13 between ground layer 14 and power supply layer 15 is 0.3 mm. Is 0.4 mm and the diameter of the clearance 23 is 1.1 mm, as seen from the return current distribution of the wiring pattern obtained from Equation 1 (see FIG. 7).
Since x flows intensively in a range x of approximately ± 2 to 3 mm centered directly below the wiring pattern, the diameter of the interlayer dielectric 24 is set to 4 mm in accordance with the return current range of ± 2 mm.

As the material of the dielectric, a material having an appropriate capacitance value according to the radiation noise band of the wiring pattern may be used. For example, a capacitor of 10,000 pF is used to remove the radiation noise in the 30 MHz to 300 MHz band. Therefore, a dielectric material having 10,000 pF is required.

The capacitance is expressed by the following equation (2).

[0033]

(Equation 2)

Therefore, a dielectric material having a relative dielectric constant of about 3900 may be used. Examples of the material having a relative dielectric constant of 1500 to 6000 include barium titanate. In addition,
The capacitance can be adjusted to an arbitrary value by changing the dielectric area s of the ground layer 14 and the power supply layer 15 for a dielectric material having a certain relative permittivity.

Next, the case where the present invention is applied to a multilayer wiring board having six layers will be described.

FIG. 4 is a partially broken perspective view of an example of a multilayer wiring board according to another embodiment of the present invention. As shown in FIG. 4, the multilayer wiring board 40 has two wiring layers 41 sandwiched between the interlayer insulators 13 between the ground layer 14 and the power supply layer 15, and has a six-layer structure as a whole. Other components have the same configuration as that of the multilayer wiring board 10.

Here, the thickness of each interlayer insulator 13 is set to 0.2
mm, the diameter of the clearance 23 is 1.1 mm, and the diameter of the interlayer dielectric is 4 mm.

[0038]

(Equation 3)

Therefore, barium titanate may be used.

Next, a case where the present invention is applied to a multilayer wiring board having different capacitor values for a plurality of through holes will be described.

FIG. 5 is a partially broken perspective view of an example of a multilayer wiring board according to still another embodiment of the present invention. FIG.
As shown in FIG.
Are formed in the wiring pattern 51 of the wiring layer 12 by the through holes 21.
Is connected to the wiring pattern 52 of the wiring layer 12 individually, and the same as the above-mentioned multilayer wiring board 10 except that separate interlayer dielectrics 53 and 54 are provided for the individual through holes 20 and 21 respectively. It has the configuration of

Here, the thickness of each interlayer insulator 13 between the wiring layer 11 and the ground layer 14 and between the wiring layer 12 and the power supply layer 15 is 0.3 mm, and the thickness of the interlayer insulator 13 between the ground layer 14 and the power supply layer 15 is set. Is 0.4 mm, the diameter of the clearance 23 is 1.1 mm, and the diameter of the interlayer dielectrics 53 and 54 is 4 mm.

The radiation noise band of the wiring pattern 51 is 30
When the radiation noise band of the wiring pattern 52 is set to 700 MHz or more,
It is known that radiation noise can be reduced by using a capacitor of 0000 pF and 100 pF for the wiring pattern 52.

Accordingly, an interlayer dielectric 53 provided around the through hole 20 of the wiring pattern 51 and an interlayer dielectric 54 provided around the through hole 21 of the wiring pattern 52
From Equation 2, each material of

[0045]

(Equation 4)

As a dielectric material having a relative dielectric constant of 30 to 80, for example, there is titanium oxide porcelain. Therefore, barium titanate may be used for the interlayer dielectric 53 and titanium oxide porcelain may be used for the interlayer dielectric 54.

As described above, according to the present invention, by forming a capacitor between the ground layer 14 and the power supply layer 15 for each through hole 20, 21, each through hole 2
A capacitor can be arranged within the optimum range for making the return current flow continuous for each of the 0 and 21 to ensure the electrical connection between the ground layer 14 and the power supply layer 15.

As a result, the radiation noise generated when the ground layer 14 and the power supply layer 15 are discontinuous due to the through holes penetrating all the layers can be effectively reduced,
In addition, there is no need for a mounting area for mounting the capacitor component on the surface of the multilayer wiring board. By eliminating the need for a mounting area, it is possible to increase the degree of integration of wiring patterns and further increase the mounting density. In addition, since individual through-holes have individual capacitances, it is possible to form capacitors suitable for the radiation noise band of each wiring pattern.

The number of layers of the multilayer wiring board is not limited to four or six, and the number of interlayer dielectrics is not limited to two but may be, for example, a plurality of different for each through hole. . Further, the shape of the interlayer dielectric is not limited to an annular shape, and may be any shape such as a rectangular shape as long as it is formed larger than the clearance 23.

[0050]

As described above, according to the present invention,
Since the dielectric layer sandwiched between the ground layer and the power layer functions as an individual capacitor for each unconnected through hole,
Even without mounting a capacitor component on the surface of the multilayer wiring board, it is possible to suppress radiation noise by providing a capacitor for each non-connected through hole.

[Brief description of the drawings]

FIG. 1 is a partially broken perspective view of a multilayer wiring board according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating an example of a manufacturing process of the multilayer wiring board of FIG.

FIG. 3 is an explanatory view of a portion around a through hole in FIG. 1 as viewed from above.

FIG. 4 is a partially broken perspective view of an example of a multilayer wiring board according to another embodiment of the present invention.

FIG. 5 is a partially broken perspective view of an example of a multilayer wiring board according to still another embodiment of the present invention.

FIG. 6 is a partially broken perspective view of a conventional multilayer wiring board.

FIG. 7 is a distribution diagram of return current generated in the multilayer wiring board of FIG. 6;

[Explanation of symbols]

 10, 40, 50 Multilayer wiring board 11, 12, 29, 31, 41 Wiring layer 13 Interlayer insulator 14 Ground layer 15 Power supply layer 16, 17 IC 18, 19, 22, 51, 52 Wiring pattern 20, 21 Through hole 23 Clearance 24, 53, 54 Interlayer dielectric 25, 26 Double-sided substrate 27 Insulator 28 Dielectric material 30 Pad 32 Round hole

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[Procedure amendment]

[Submission date] March 12, 1999

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Claims

[Correction method] Change

[Correction contents]

[Claims]

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0017

[Correction method] Change

[Correction contents]

[0017]

In order to achieve the above object, a multilayer wiring board according to the present invention comprises a power supply layer and a ground layer, and has a through-hole penetrating the power supply layer and the ground layer. In the wiring board, an interlayer dielectric is individually provided for each of the non-connection through holes around the non-connection through holes that straddle the layers without contacting the power supply layer and the ground layer and between the power supply layer and the ground layer. It is characterized by having provided.

[Procedure amendment 3]

[Document name to be amended] Statement

[Correction target item name] 0018

[Correction method] Change

[Correction contents]

With the above configuration, each dielectric layer sandwiched between the ground layer and the power supply layer functions as an individual capacitor for each unconnected through hole. Thus, even if no capacitor component is mounted on the surface of the multilayer wiring board, it is possible to provide a capacitor individually around each non-connected through hole, thereby suppressing radiation noise.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0050

[Correction method] Change

[Correction contents]

[0050]

As described above, according to the present invention,
Since each dielectric layer sandwiched between the ground layer and the power supply layer functions as an individual capacitor for each non-connected through hole, even if no capacitor parts are mounted on the surface of the multilayer wiring board, the The radiation noise can be suppressed by providing a capacitor individually around the power supply .

Claims (7)

[Claims] 1. A multi-layer wiring board comprising a power supply layer and a ground layer, wherein a through hole penetrating the power supply layer and the ground layer is provided, wherein each non-connected through hole not in contact with the power supply layer and the ground layer is provided. A multilayer wiring board, wherein an interlayer dielectric is provided between the power supply layer and the ground layer. 2. The multilayer wiring board according to claim 1, wherein said interlayer dielectrics have different relative dielectric constants. 3. The multilayer wiring board according to claim 1, wherein each of the interlayer dielectrics is formed in a predetermined range surrounding the non-connection through hole in a return current range in the wiring pattern. 4. The method according to claim 1, wherein the predetermined range is about ± 3 m centering substantially under a wiring pattern connected to the non-connection through hole.
4. The multilayer wiring board according to claim 3, wherein the range is m. 5. The multilayer wiring board according to claim 1, wherein at least one of the interlayer dielectrics is made of a barium titanate-based dielectric material. 6. The power supply layer and the ground layer sandwiching each of the interlayer dielectrics are changed in area to change each of the interlayer dielectrics,
The multilayer wiring board according to any one of claims 1 to 5, wherein a capacitance of a capacitor including the power supply layer and the ground layer is changed. 7. Each of the interlayer dielectrics is formed by forming an insertion hole in a desired portion of an interlayer insulator sandwiched between the power supply layer and the ground layer, and inserting a dielectric material into the insertion hole. The multilayer wiring board according to claim 1, wherein: