JPH11199386A - Production of silicon single crystal and silicon single crystal wafer - Google Patents
Production of silicon single crystal and silicon single crystal waferInfo
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- JPH11199386A JPH11199386A JP2140998A JP2140998A JPH11199386A JP H11199386 A JPH11199386 A JP H11199386A JP 2140998 A JP2140998 A JP 2140998A JP 2140998 A JP2140998 A JP 2140998A JP H11199386 A JPH11199386 A JP H11199386A
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- crystal
- single crystal
- silicon single
- wafer
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- Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、結晶欠陥が少ない
シリコン単結晶の製造方法およびシリコン単結晶ウエー
ハに関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing a silicon single crystal having few crystal defects and a silicon single crystal wafer.
【０００２】[0002]
【従来の技術】近年は、半導体回路の高集積化に伴う素
子の微細化に伴い、その基板となるチョクラルスキー法
（以下、ＣＺ法と略記する）で作製されたシリコン単結
晶に対する品質要求が高まってきている。特に、ＦＰ
Ｄ、ＬＳＴＤ、ＣＯＰ等のグローンイン（Ｇｒｏｗｎ−
ｉｎ）欠陥と呼ばれる酸化膜耐圧特性やデバイスの特性
を悪化させる、単結晶成長起因の欠陥が存在しその密度
とサイズの低減が重要視されている。2. Description of the Related Art In recent years, with the miniaturization of elements accompanying the high integration of semiconductor circuits, the quality requirements for silicon single crystals produced by the Czochralski method (hereinafter abbreviated as CZ method) serving as the substrate have been required. Is growing. In particular, FP
D-, LSTD, COP, etc.
in) Defects due to single crystal growth, which degrade oxide breakdown voltage characteristics and device characteristics called defects, exist, and reduction in their density and size is regarded as important.
【０００３】これらの欠陥を説明するに当たって、先
ず、シリコン単結晶に取り込まれるベイカンシイ（Ｖａ
ｃａｎｃｙ、以下Ｖと略記することがある）と呼ばれる
空孔型の点欠陥と、インタースティシアル−シリコン
（Ｉｎｔｅｒｓｔｉｔｉａｌ−Ｓｉ、以下Ｉと略記する
ことがある）と呼ばれる格子間型シリコン点欠陥のそれ
ぞれの取り込まれる濃度を決定する因子について、一般
的に知られていることを説明する。In explaining these defects, first, vacancy (Va) incorporated into a silicon single crystal is used.
vacancy (hereinafter sometimes abbreviated as V) and interstitial silicon point defect called interstitial-Si (hereinafter sometimes abbreviated as I), respectively. What is generally known about factors that determine the concentration in which is taken up will be explained.
【０００４】シリコン単結晶において、Ｖ領域とは、Ｖ
ａｃａｎｃｙ、つまりシリコン原子の不足から発生する
凹部、穴のようなものが多い領域であり、Ｉ領域とは、
シリコン原子が余分に存在することにより発生する転位
や余分なシリコン原子の塊が多い領域のことであり、そ
してＶ領域とＩ領域の間には、原子の不足や余分が無い
（少ない）ニュートラル（Ｎｅｕｔｒａｌ、以下Ｎと略
記することがある）領域が存在していることになる。そ
して、前記グローンイン欠陥（ＦＰＤ、ＬＳＴＤ、ＣＯ
Ｐ等）というのは、あくまでもＶやＩが過飽和な状態の
時に発生するものであり、多少の原子の偏りがあって
も、飽和以下であれば、欠陥としては存在しないことが
判ってきた。In a silicon single crystal, the V region is defined as V
area, which is a region where there are many recesses and holes generated due to lack of silicon atoms.
This is a region in which dislocations and extra silicon atoms are lumped due to the presence of extra silicon atoms, and between the V region and the I region, there is no (small) neutral (less or less) atoms. Neutral (hereinafter sometimes abbreviated as N)). And, the above-mentioned grown-in defect (FPD, LSTD, CO
P, etc.) are generated only when V and I are supersaturated, and it has been found that even if there is a slight bias of atoms, they do not exist as defects if they are not more than saturated.
【０００５】この両点欠陥の濃度は、ＣＺ法における結
晶の引上げ速度（成長速度）と結晶中の固液界面近傍の
温度勾配Ｇとの関係から決まり、Ｖ領域とＩ領域との境
界近辺にはＯＳＦ（酸化誘起積層欠陥、Ｏｘｉｄａｔｉ
ｏｎ Ｉｎｄｕｓｅｄ Ｓｔａｃｋｉｎｇ Ｆａｕｌ
ｔ）と呼ばれるリング状の欠陥の存在が確認されてい
る。[0005] The concentration of these two point defects is determined by the relationship between the crystal pulling rate (growth rate) in the CZ method and the temperature gradient G near the solid-liquid interface in the crystal, and is near the boundary between the V region and the I region. Is OSF (oxidation induced stacking fault, Oxidati
on Induced Stacking Foul
The presence of a ring-shaped defect called t) has been confirmed.
【０００６】これら結晶成長起因の欠陥を分類すると、
例えば結晶径が６インチの場合、成長速度が０．６ｍｍ
／ｍｉｎ前後以上と比較的高速の場合には、空孔タイプ
の点欠陥が集合したボイド起因とされているＦＰＤ、Ｌ
ＳＴＤ、ＣＯＰ等のグローンイン欠陥が結晶径方向全域
に高密度に存在し、これら欠陥が存在する領域はＶ−リ
ッチ領域と呼ばれている（図４（ａ）参照）。[0006] When these defects caused by crystal growth are classified,
For example, when the crystal diameter is 6 inches, the growth rate is 0.6 mm.
In the case of a relatively high speed of about / min or more, FPD, L which is considered to be caused by voids in which vacancy type point defects are gathered.
Grown-in defects such as STD and COP exist at high density throughout the crystal diameter direction, and the region where these defects exist is called a V-rich region (see FIG. 4A).
【０００７】また、成長速度が０．６ｍｍ／ｍｉｎ以下
の場合は、成長速度の低下に伴い、上記したＯＳＦリン
グが結晶の周辺から発生し、このリングの外側に転位ル
ープ起因と考えられているＬ／Ｄ（Ｌａｒｇｅ Ｄｉｓ
ｌｏｃａｔｉｏｎ：格子間転位ループの略号、ＬＳＥＰ
Ｄ、ＬＦＰＤ等）の欠陥が低密度に存在し、これら欠陥
が存在する領域はＩ−リッチ領域と呼ばれている（図４
（ｂ）参照）。さらに、成長速度を０．４ｍｍ／ｍｉｎ
前後以下と低速にすると、ＯＳＦリングがウエーハの中
心に凝集して消滅し、全面がＩ−リッチ領域となる（図
４（ｃ））。[0007] When the growth rate is 0.6 mm / min or less, the above-mentioned OSF ring is generated from the periphery of the crystal due to the decrease in the growth rate, and it is considered that a dislocation loop is caused outside the ring. L / D (Large Dis
location: abbreviation for interstitial dislocation loop, LSEP
D, LFPD, etc.) are present at low density, and the region where these defects are present is called an I-rich region (FIG. 4).
(B)). Further, the growth rate is set to 0.4 mm / min.
When the speed is reduced to the front and rear or lower, the OSF ring aggregates and disappears at the center of the wafer, and the entire surface becomes an I-rich region (FIG. 4C).
【０００８】また、最近Ｖ−リッチ領域とＩ−リッチ領
域の中間でＯＳＦリングの外側に、Ｎ領域と呼ばれる、
空孔起因のＦＰＤ、ＬＳＴＤ、ＣＯＰも、転位ループ起
因のＬＳＥＰＤ、ＬＦＰＤも存在しない領域の存在が発
見されている（特開平８−３３０３１６号参照）。この
領域はＯＳＦリングの外側にあり、そして、酸素析出熱
処理を施し、Ｘ−ｒａｙ観察等で析出のコントラストを
確認した場合に、酸素析出がほとんどなく、かつ、ＬＳ
ＥＰＤ、ＬＦＰＤが形成されるほどリッチではないＩ−
リッチ領域側であると報告している（図３（ａ）参
照）。Further, recently, an N-region is provided between the V-rich region and the I-rich region and outside the OSF ring.
It has been found that there is a region where neither FPD, LSTD, or COP caused by vacancies nor LSEPD or LFPD caused by a dislocation loop exists (see JP-A-8-330316). This region is outside the OSF ring, and when oxygen precipitation heat treatment is performed and the contrast of deposition is confirmed by X-ray observation or the like, there is almost no oxygen precipitation and LS
I- not rich enough to form EPD, LFPD
It is reported that the region is on the rich region side (see FIG. 3A).
【０００９】そして、従来のＣＺ引上げ機ではウエーハ
の極一部にしか存在しないＮ領域を、引上げ機の炉内温
度分布を改良し、引上げ速度を調節して、Ｆ／Ｇ値（単
結晶引上げ速度をＦ［ｍｍ／ｍｉｎ］とし、シリコンの
融点から１３００℃の間の引上げ軸方向の結晶内温度勾
配の平均値をＧ［℃／ｍｍ］とするとき、Ｆ／Ｇで表わ
される比）が０．２０〜０．２２ｍｍ2 ／℃・ｍｉｎと
なるように制御して結晶を引上げれば、Ｎ領域をウエー
ハ全面に広げることが可能であると提案している（図３
（ｂ）参照）。In the conventional CZ pulling machine, the N region which exists only in a very small part of the wafer is improved by improving the temperature distribution in the furnace of the pulling machine, adjusting the pulling speed, and adjusting the F / G value (single crystal pulling). When the speed is F [mm / min] and the average value of the temperature gradient in the crystal in the pulling axis direction between the melting point of silicon and 1300 ° C. is G [° C./mm], the ratio represented by F / G is It is proposed that the N region can be spread over the entire surface of the wafer by pulling the crystal while controlling it to be 0.20 to 0.22 mm 2 / ° C. · min (FIG. 3).
(B)).
【００１０】[0010]
【発明が解決しようとする課題】しかしながら、このよ
うな極低欠陥領域を結晶全体に広げて製造しようとする
と、この領域がＩ−リッチ領域側のＮ領域のみに限定さ
れるため、製造条件の上で制御範囲が極めて狭く、実験
機ならともかく生産機では精密制御が難しく、実際問題
単結晶棒の一部分において製造ができるのみで、結晶棒
全体で低欠陥結晶を得ることは、不可能であった。従っ
て、生産性、歩留が極めて低く、工業化に大きな障害と
なっている。さらに、この発明に開示されていた欠陥分
布図は、本発明者らが実験・調査して求めたデータや、
データを基にした作成した欠陥分布図（図１参照）とは
大幅に異なることが判明した。However, if such an extremely low defect region is to be extended over the entire crystal to produce such an extremely low defect region, this region is limited to only the N region on the I-rich region side. Above, the control range is extremely narrow, and it is difficult to precisely control a single crystal rod in a production machine anyway, and it is impossible to obtain a low-defect crystal from the entire crystal rod in practice. Was. Therefore, productivity and yield are extremely low, which is a major obstacle to industrialization. Further, the defect distribution diagram disclosed in the present invention, data obtained by experiments and investigations by the present inventors,
It turned out that it is significantly different from the defect distribution diagram created based on the data (see FIG. 1).
【００１１】本発明は、このような問題点に鑑みなされ
たもので、制御幅が広く、制御し易い製造条件の下で、
Ｖ−リッチ領域およびＩ−リッチ領域のいずれも存在し
ない、結晶全面に亙って極低欠陥密度であるＣＺ法によ
るシリコン単結晶ウエーハを、単結晶棒の全体で作製可
能とし、高生産性、高歩留を維持しながら製造すること
を目的とする。The present invention has been made in view of such a problem, and has a wide control range and is easy to control under manufacturing conditions.
A silicon single crystal wafer by the CZ method, which has an extremely low defect density over the entire surface of the crystal, in which neither a V-rich region nor an I-rich region is present, can be manufactured on the entire single crystal rod, and high productivity and The purpose is to manufacture while maintaining high yield.
【００１２】[0012]
【課題を解決するための手段】本発明は、前記目的を達
成するために為されたもので、本発明の請求項１に記載
した発明は、チョクラルスキー法によってシリコン単結
晶を育成する際に、引上げ速度をＦ［ｍｍ／ｍｉｎ］と
し、シリコンの融点から１４００℃の間の引上げ軸方向
の結晶内温度勾配の平均値をＧ［℃／ｍｍ］で表した
時、結晶中心から結晶周辺までの距離Ｄ［ｍｍ］を横軸
とし、Ｆ／Ｇ［ｍｍ2 ／℃・ｍｉｎ］の値を縦軸として
欠陥分布を示した欠陥分布図において、ＯＳＦ領域と、
その外側のＮ−領域の範囲内で結晶を引上げることを特
徴とするシリコン単結晶の製造方法である。Means for Solving the Problems The present invention has been made to achieve the above object, and the invention described in claim 1 of the present invention relates to a method for growing a silicon single crystal by the Czochralski method. When the pulling speed is F [mm / min] and the average value of the temperature gradient in the crystal in the pulling axis direction between the melting point of silicon and 1400 ° C. is represented by G [° C./mm], the crystal center is shifted from the crystal center to the periphery of the crystal. In the defect distribution diagram showing the defect distribution with the distance D [mm] to the abscissa and the value of F / G [mm 2 / ° C. · min] as the ordinate, the OSF region and
A method for producing a silicon single crystal, characterized in that the crystal is pulled within a range of an N- region outside thereof.
【００１３】このように、実験・調査の結果を解析して
求めた図１の欠陥分布図を基に、ＯＳＦ領域（通常リン
グ形状であるが、中央でＦＰＤ等が消滅すれば円状に形
成される）と、その外側のＮ−領域の範囲内で結晶を引
上げるようにすれば、制御範囲が広がり、ＦＰＤ及びＬ
／Ｄがウエーハ全面内に存在しないシリコン単結晶ウエ
ーハを容易に作製することができる。そして、中央部に
存在するＯＳＦ領域は、ウエーハ全面積に対し極めて小
さい面積となり、デバイス歩留への影響はわずかで済
む。As described above, based on the defect distribution diagram of FIG. 1 obtained by analyzing the results of experiments and investigations, the OSF region (usually a ring shape, but a circular shape if the FPD or the like disappears at the center) ), And pulling the crystal within the N-region outside thereof expands the control range, and allows FPD and L
It is possible to easily produce a silicon single crystal wafer where / D does not exist on the entire surface of the wafer. The OSF region existing in the central portion has an extremely small area with respect to the entire area of the wafer, and the influence on the device yield is small.
【００１４】すなわち、本発明によって引き上げられる
シリコン単結晶は、熱酸化処理時にＯＳＦを発生し得る
領域を含んだままではあるが、ＯＳＦリング外のＮ領域
を最大限拡大するようにして引上げるので、引上げ速度
と結晶内温度勾配との制御範囲が広くなり、一般の生産
機においても製造条件設定が容易になり、Ｎ領域の多い
ウエーハを簡単に作製することができる。That is, although the silicon single crystal pulled by the present invention still contains a region where OSF can be generated during the thermal oxidation treatment, it is pulled so as to maximize the N region outside the OSF ring. In addition, the control range of the pulling speed and the temperature gradient in the crystal is widened, the manufacturing conditions can be easily set even in a general production machine, and a wafer having a large N region can be easily manufactured.
【００１５】この場合、より具体的条件としては、請求
項２に記載したように、引上げ軸方向の結晶内温度勾配
の平均値Ｇ［℃／ｍｍ］を、３．０［℃／ｍｍ］以下と
して結晶を引上げ、また請求項３に記載したように、引
上げ軸方向の結晶内温度勾配の平均値Ｇ［℃／ｍｍ］の
値を、結晶中心部分の温度勾配Ｇｃ［℃／ｍｍ］と結晶
周辺部分の温度勾配Ｇｅ［℃／ｍｍ］との差△Ｇ＝（Ｇ
ｅ−Ｇｃ）で表した時、△Ｇが１℃／ｍｍ以内として結
晶を引き上げるようにする。In this case, as more specific conditions, as described in claim 2, the average value G [° C./mm] of the temperature gradient in the crystal in the pulling axis direction is 3.0 [° C./mm] or less. The average value G [° C./mm] of the temperature gradient in the crystal in the direction of the pulling axis is defined as the temperature gradient Gc [° C./mm] at the center of the crystal. Difference from the temperature gradient Ge [° C./mm] of the peripheral portion ΔG = (G
When expressed by e-Gc), the crystal is pulled up with ΔG being within 1 ° C./mm.
【００１６】このような引上げ条件とすることによっ
て、中央部にＯＳＦ領域があるものの、ウエーハ全面内
にＦＰＤもＬ／Ｄも存在しないシリコン単結晶を育成す
ることができる。Under such pulling conditions, it is possible to grow a silicon single crystal having an OSF region in the center but having neither FPD nor L / D in the entire surface of the wafer.
【００１７】次に、本発明の請求項４に記載した発明
は、チョクラルスキー法によってシリコン単結晶を育成
する際に、引上げ速度Ｆ［ｍｍ／ｍｉｎ］を、ＯＳＦが
結晶バルク中心で消滅する臨界速度に対し、±０．０２
［ｍｍ／ｍｉｎ］以内に制御しつつ結晶を引上げること
を特徴とするシリコン単結晶の製造方法である。Next, according to the invention described in claim 4 of the present invention, when growing a silicon single crystal by the Czochralski method, the pulling speed F [mm / min] and the OSF disappear at the center of the crystal bulk. ± 0.02 for critical speed
A method for producing a silicon single crystal, characterized in that the crystal is pulled while being controlled within [mm / min].
【００１８】このように、引上げ速度Ｆ［ｍｍ／ｍｉ
ｎ］を、ＯＳＦが結晶バルク中心で消滅する臨界速度に
対し、±０．０２［ｍｍ／ｍｉｎ］以内に制御しつつ結
晶を引上げるようにすれば、熱酸化処理時にＯＳＦを発
生し得る領域を含んだままではあるが、ＯＳＦ外側のＮ
領域を最大限拡大した、ウエーハ全面内にＦＰＤもＬ／
Ｄも存在しないシリコン単結晶を育成することができ
る。しかも、引上げ速度を精度良く制御するだけである
ので、一般の生産機においても十分に対応することがで
きる。As described above, the pulling speed F [mm / mi]
n] is controlled within ± 0.02 [mm / min] with respect to the critical speed at which the OSF disappears at the center of the crystal bulk, so that the crystal can be pulled up. , But N outside the OSF
The FPD is also L / L on the whole surface of the wafer with the maximum area expanded.
A silicon single crystal free of D can be grown. In addition, since only the pulling speed is controlled with high precision, it can be sufficiently used in a general production machine.
【００１９】そして、請求項５に記載したように、チョ
クラルスキー法によってシリコン単結晶を育成する際
に、引上げ速度Ｆ［ｍｍ／ｍｉｎ］の平均値を、ＯＳＦ
が結晶バルク中心で消滅する臨界速度の平均値に対し、
±０．０１［ｍｍ／ｍｉｎ］以内に制御しつつ結晶を引
上げるようにすれば、１本の結晶棒全体において、ＯＳ
Ｆ外側のＮ領域を最大限拡大した、ウエーハ全面内にＦ
ＰＤもＬ／Ｄも存在しないシリコン単結晶を育成するこ
とができる。As described in claim 5, when growing a silicon single crystal by the Czochralski method, the average value of the pulling speed F [mm / min] is determined by the OSF
Is the critical velocity at which the vanishes at the center of the crystal bulk,
If the crystal is pulled up while being controlled within ± 0.01 [mm / min], the OS in one crystal rod as a whole can be improved.
The N area outside the F is maximized, and the F
It is possible to grow a silicon single crystal having neither PD nor L / D.
【００２０】また、本発明においては請求項６に記載し
たように、引上げ中シリコン融液に磁場を印加しつつ結
晶を引上げるのが望ましい。磁場を印加することによっ
て、シリコン融液中の対流が抑制され、前記請求項１〜
請求項５の引上げ条件に制御するのが容易になるからで
ある。In the present invention, it is desirable that the crystal be pulled while applying a magnetic field to the silicon melt during the pulling. Convection in the silicon melt is suppressed by applying a magnetic field,
This is because it becomes easy to control the pulling condition of claim 5.
【００２１】特に、請求項７に記載したように、印加す
る磁場を水平磁場とし、また、請求項８に記載したよう
に、印加する磁場の強度を２０００Ｇ以上とするのが好
ましい。結晶内温度勾配Ｇおよび面内での温度勾配の差
△Ｇを小さくし、結晶中のＮ領域を広げるためには水平
磁場の方が好ましいし、２０００Ｇ未満では、磁場印加
効果が少ないからである。In particular, it is preferable that the applied magnetic field be a horizontal magnetic field as described in claim 7, and that the intensity of the applied magnetic field be 2,000 G or more, as described in claim 8. This is because a horizontal magnetic field is more preferable in order to reduce the temperature gradient G in the crystal and the difference ΔG in the temperature gradient in the plane and expand the N region in the crystal. .
【００２２】そして、上記請求項１ないし請求項８に記
載のシリコン単結晶の製造方法によって製造されたシリ
コン単結晶は、結晶バルクの中央部に熱酸化処理をした
際にＯＳＦが発生するか、あるいはＯＳＦの核が存在す
るものであり、かつ、ＦＰＤ及びＬ／Ｄが結晶内に存在
しないものを得ることができる（請求項９）。したがっ
て、このようなシリコン単結晶をスライスして得られる
シリコン単結晶ウエーハは、請求項１０のように、ウエ
ーハの中央部に熱酸化処理をした際にＯＳＦが発生する
か、あるいはＯＳＦの核が存在するものであり、かつ、
ＦＰＤ及びＬ／Ｄがウエーハ全面内に存在しないシリコ
ン単結晶ウエーハとなる。In the silicon single crystal manufactured by the method for manufacturing a silicon single crystal according to any one of claims 1 to 8, OSF is generated when a central portion of the crystal bulk is subjected to thermal oxidation treatment. Alternatively, it is possible to obtain one in which the nucleus of OSF is present and in which FPD and L / D are not present in the crystal (claim 9). Therefore, in a silicon single crystal wafer obtained by slicing such a silicon single crystal, as described in claim 10, when a central portion of the wafer is subjected to a thermal oxidation treatment, OSF is generated, or a nucleus of the OSF is generated. Exists, and
A silicon single crystal wafer is obtained in which FPD and L / D do not exist on the entire surface of the wafer.
【００２３】すなわち、本発明のシリコン単結晶ウエー
ハは、該ウエーハを熱酸化処理をした際に、ウエーハ中
央部にＯＳＦは発生し、あるいはＯＳＦの核は潜在して
いるが、ＦＰＤ及びＬ／Ｄ（ＬＳＥＰＤ、ＬＦＰＤ）
は、ウエーハ全面内に存在しないというウエーハで、図
２（ｂ）に示したように、いわゆるウエーハ全面にＶ−
リッチ領域もＩ−リッチ領域も存在せず、中性なＮ領域
の面積が非常に大きなものである。このようなＮ領域の
大きい本発明のシリコン単結晶ウエーハには、ＯＳＦの
核は潜在しており、該ウエーハを熱酸化処理した際には
中央部にＯＳＦが発生し得るＯＳＦ領域が存在するが、
ウエーハ中央部でその面積を最大限抑制し、一方ＯＳＦ
外側のＮ領域を最大限に拡大した新規な欠陥構造を持っ
たウエーハである。That is, in the silicon single crystal wafer of the present invention, when the wafer is subjected to a thermal oxidation treatment, OSF is generated in the central portion of the wafer or OSF nuclei are latent, but FPD and L / D (LSEPD, LFPD)
Is a wafer which does not exist on the entire surface of the wafer. As shown in FIG.
Neither the rich region nor the I-rich region exists, and the area of the neutral N region is very large. OSF nuclei are latent in such a silicon single crystal wafer of the present invention having a large N region, and when the wafer is subjected to thermal oxidation treatment, there is an OSF region in which OSF can be generated at the center. ,
The area is minimized in the center of the wafer, while the OSF
This is a wafer having a new defect structure in which the outer N region is maximized.
【００２４】こうして得られるシリコン単結晶ウエーハ
は、例えばウエーハ中央部のＯＳＦ領域が、ウエーハ面
積の５％以下であり（請求項１１）、あるいはウエーハ
中央部のＯＳＦ領域が、直径２０ｍｍ以下とすることが
できる（請求項１２）。したがって、ウエーハの全面積
に対するＯＳＦ領域の比率が小さく、Ｎ領域の面積が大
きいので、デバイス歩留を向上することができるシリコ
ン単結晶ウエーハとなる。In the silicon single crystal wafer thus obtained, for example, the OSF region at the central portion of the wafer is 5% or less of the wafer area (claim 11), or the OSF region at the central portion of the wafer is 20 mm or less in diameter. (Claim 12). Therefore, since the ratio of the OSF region to the entire area of the wafer is small and the area of the N region is large, the silicon single crystal wafer can improve the device yield.
【００２５】そして、請求項１３に記載したように、本
発明のシリコン単結晶ウエーハでは、ウエーハ中央部に
存在するＯＳＦ密度を、１００個／ｃｍ2 以下とするこ
とができ、特に請求項１４に記載したように、ウエーハ
全面の酸素濃度を２４ｐｐｍａ（ＡＳＴＭ’７９値）以
下とすれば、酸素析出熱処理によりＯＳＦの潜在核は存
在するが、ＯＳＦ熱酸化処理をした際にはＯＳＦは発生
せず、かつ、ＦＰＤ及びＬ／Ｄがウエーハ全面内に存在
しないシリコン単結晶ウエーハとすることができる。As described in claim 13, in the silicon single crystal wafer of the present invention, the OSF density existing in the central portion of the wafer can be set to 100 / cm 2 or less. As described above, if the oxygen concentration on the entire surface of the wafer is set to 24 ppma (ASTM '79 value) or less, there are latent nuclei of OSF due to the oxygen precipitation heat treatment, but no OSF is generated during the OSF thermal oxidation treatment. In addition, a silicon single crystal wafer in which FPD and L / D do not exist on the entire surface of the wafer can be obtained.
【００２６】このように、成長結晶内の酸素濃度を２４
ｐｐｍａ以下に抑えれば、ＯＳＦ核の成長を阻害するこ
とができ、実質上、ＯＳＦあるいはＯＳＦの潜在核がウ
エーハ内に存在してもデバイスに影響を与えることはな
いので、結局該ウエーハをＯＳＦ熱酸化処理をした際
に、ＯＳＦの核は潜在しているが、ＯＳＦを発生するこ
とはなく、ＦＰＤ及びＬ／Ｄ（ＬＳＥＰＤ、ＬＦＰＤ）
もウエーハ全面内に存在しないという、いわゆるウエー
ハ全面がＶ−リッチ領域、Ｉ−リッチ領域も、害を及ぼ
すようなＯＳＦも存在しない全面使用可能な極低欠陥密
度のウエーハを得ることができる。しかもこの場合、前
述のようにＦ／Ｇの制御も広い制御範囲とすることが可
能であり、ウエーハを工業上容易に作製することができ
る。As described above, the oxygen concentration in the grown crystal is set to 24
If the concentration is suppressed to less than ppma, the growth of the OSF nucleus can be inhibited, and even if the OSF or the latent nucleus of the OSF is present in the wafer, it does not affect the device. When thermal oxidation treatment is performed, OSF nuclei are latent, but OSF is not generated, and FPD and L / D (LSEPD, LFPD)
In other words, a wafer having an extremely low defect density that can be used without a so-called V-rich region, an I-rich region, or an harmful OSF that does not exist on the entire surface of the wafer. Moreover, in this case, the F / G control can be performed in a wide control range as described above, and the wafer can be industrially easily manufactured.
【００２７】以下、本発明につき詳細に説明するが、本
発明はこれらに限定されるものではない。説明に先立ち
各用語につき予め解説しておく。 １）ＦＰＤ（Ｆｌｏｗ Ｐａｔｔｅｒｎ Ｄｅｆｅｃ
ｔ）とは、成長後のシリコン単結晶棒からウェーハを切
り出し、表面の歪み層を弗酸と硝酸の混合液でエッチン
グして取り除いた後、Ｋ2 Ｃｒ2 Ｏ7 と弗酸と水の混合
液で表面をエッチング（Ｓｅｃｃｏエッチング）するこ
とによりピットおよびさざ波模様が生じる。このさざ波
模様をＦＰＤと称し、ウェーハ面内のＦＰＤ密度が高い
ほど酸化膜耐圧の不良が増える（特開平４−１９２３４
５号公報参照）。Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto. Prior to the explanation, each term will be explained in advance. 1) FPD (Flow Pattern Defec)
t) means that a wafer is cut out from a silicon single crystal rod after growth, the strained layer on the surface is removed by etching with a mixed solution of hydrofluoric acid and nitric acid, and then K 2 Cr 2 O 7 , hydrofluoric acid and water are mixed. Pits and ripples are produced by etching the surface with the liquid (Secco etching). This ripple pattern is called FPD, and the higher the FPD density in the wafer surface, the more the failure of the oxide film breakdown voltage increases (JP-A-4-19234).
No. 5).
【００２８】２）ＳＥＰＤ（Ｓｅｃｃｏ Ｅｔｃｈ Ｐ
ｉｔ Ｄｅｆｅｃｔ）とは、ＦＰＤと同一のＳｅｃｃｏ
エッチングを施した時に、流れ模様（ｆｌｏｗ ｐａｔ
ｔｅｒｎ）を伴うものをＦＰＤと呼び、流れ模様を伴わ
ないものをＳＥＰＤと呼ぶ。この中で１０μｍ以上の大
きいＳＥＰＤ（ＬＳＥＰＤ）は転位クラスターに起因す
ると考えられ、デバイスに転位クラスターが存在する場
合、この転位を通じて電流がリークし、Ｐ−Ｎジャンク
ションとしての機能を果たさなくなる。2) SEPD (Secco Etch P)
it Defect) is the same as Secco as FPD
When etching is performed, a flow pattern (flow pat)
The one with tern) is called FPD, and the one without flow pattern is called SEPD. Among them, a large SEPD (LSEPD) of 10 μm or more is considered to be caused by a dislocation cluster. When a dislocation cluster exists in a device, a current leaks through the dislocation and the device does not function as a PN junction.
【００２９】３）ＬＳＴＤ（Ｌａｓｅｒ Ｓｃａｔｔｅ
ｒｉｎｇ ＴｏｍｏｇｒａｐｈｙＤｅｆｅｃｔ）とは、
成長後のシリコン単結晶棒からウエーハを切り出し、表
面の歪み層を弗酸と硝酸の混合液でエッチングして取り
除いた後、ウエーハを劈開する。この劈開面より赤外光
を入射し、ウエーハ表面から出た光を検出することでウ
エーハ内に存在する欠陥による散乱光を検出することが
できる。ここで観察される散乱体については学会等です
でに報告があり、酸素析出物とみなされている（Ｊ．
Ｊ．Ａ．Ｐ． Ｖｏｌ．３２，Ｐ３６７９，１９９３参
照）。また、最近の研究では、八面体のボイド（穴）で
あるという結果も報告されている。3) LSTD (Laser Scatte)
(Ring Tomography Defect)
A wafer is cut out from the silicon single crystal rod after growth, and the strained layer on the surface is removed by etching with a mixed solution of hydrofluoric acid and nitric acid, and then the wafer is cleaved. By irradiating infrared light from the cleavage plane and detecting light emitted from the wafer surface, scattered light due to defects existing in the wafer can be detected. Scatterers observed here have already been reported by academic societies and the like, and are regarded as oxygen precipitates (J.
J. A. P. Vol. 32, p. 3679, 1993). Recent studies have also reported that it is an octahedral void.
【００３０】４）ＣＯＰ（Ｃｒｙｓｔａｌ Ｏｒｉｇｉ
ｎａｔｅｄ Ｐａｒｔｉｃｌｅ）とは、ウエーハの中心
部の酸化膜耐圧を劣化させる原因となる欠陥で、Ｓｅｃ
ｃｏエッチではＦＰＤになる欠陥が、アンモニア過酸化
水素水洗浄（ＮＨ4 ＯＨ：Ｈ2 Ｏ2 ：Ｈ2 Ｏ＝１：１〜
２：５〜７の混合液による洗浄）では選択エッチング液
として働き、ＣＯＰになる。このピットの直径は１μｍ
以下で光散乱法で調べる。4) COP (Crystal Origin)
A “nated particle” is a defect that causes deterioration of the oxide film breakdown voltage at the center of the wafer, and
The defect that becomes FPD in the co-etching is caused by ammonia hydrogen peroxide cleaning (NH 4 OH: H 2 O 2 : H 2 O = 1: 1 to 1).
In the case of (2: 5 to 7 cleaning with a mixed solution), COP works as a selective etching solution. The diameter of this pit is 1 μm
The following is examined by the light scattering method.
【００３１】５）Ｌ／Ｄ（Ｌａｒｇｅ Ｄｉｓｌｏｃａ
ｔｉｏｎ：格子間転位ループの略号）には、ＬＳＥＰ
Ｄ、ＬＦＰＤ等があり、転位ループ起因と考えられてい
る欠陥である。ＬＳＥＰＤは、上記したようにＳＥＰＤ
の中でも１０μｍ以上の大きいものをいう。また、ＬＦ
ＰＤは、上記したＦＰＤの中でも先端ピットの大きさが
１０μｍ以上の大きいものをいい、こちらも転位ループ
起因と考えられている。5) L / D (Large Disloca)
tion: abbreviation for interstitial dislocation loop)
D, LFPD, etc., which are considered to be caused by dislocation loops. LSEPD is the SEPD
Among them, those having a size of 10 μm or more are referred to. Also, LF
The PD refers to the above-mentioned FPD having a large tip pit size of 10 μm or more, which is also considered to be caused by a dislocation loop.
【００３２】本発明者らは、先に特願平９−１９９４１
５号で提案したように、ＣＺ法によるシリコン単結晶成
長に関し、Ｖ領域とＩ領域の境界近辺について、詳細に
調査したところ、この境界近辺の極く狭い領域にＦＰ
Ｄ、ＬＳＴＤ、ＣＯＰの数が著しく少なく、ＬＳＥＰＤ
も存在しないニュートラルな領域があることを発見し
た。The present inventors have previously described Japanese Patent Application No. 9-19941.
As proposed in No. 5, a detailed investigation was made on the vicinity of the boundary between the V region and the I region with respect to silicon single crystal growth by the CZ method.
The number of D, LSTD, COP is extremely small, and LSEPD
Also found that there are neutral areas that do not exist.
【００３３】そこで、このニュートラルな領域をウエー
ハ全面に広げることができれば、点欠陥を大幅に減らせ
ると発想した。そして、成長速度（引上げ速度）と温度
勾配の関係の中で、結晶のウエーハ面内では、引上げ速
度はほぼ一定であるから、面内の点欠陥の濃度分布を決
定する主な因子は温度勾配である。つまり、ウエーハ面
内で、軸方向の温度勾配に差があることが問題で、この
差を減らすことが出来れば、ウエーハ面内の点欠陥の濃
度差も減らせることを見出し、結晶中心部の温度勾配Ｇ
ｃと結晶周辺部分の温度勾配Ｇｅとの差を△Ｇ＝（Ｇｅ
−Ｇｃ）≦０．５℃／ｍｍとなるように炉内温度を制御
して引上げ速度を調節すれば、ウエーハ全面がＮ領域か
らなる欠陥のないウエーハが得られるようになった。Therefore, it was conceived that if this neutral region could be spread over the entire surface of the wafer, point defects could be greatly reduced. In the relation between the growth rate (pulling rate) and the temperature gradient, the pulling rate is almost constant in the wafer surface of the crystal. Therefore, the main factor determining the concentration distribution of point defects in the plane is the temperature gradient. It is. In other words, it is a problem that there is a difference in the temperature gradient in the axial direction in the wafer plane, and if this difference can be reduced, it is found that the difference in the concentration of point defects in the wafer plane can be reduced. Temperature gradient G
The difference between c and the temperature gradient Ge around the crystal is represented by ΔG = (Ge
By controlling the furnace temperature so as to satisfy -Gc) ≦ 0.5 ° C./mm and adjusting the pulling speed, a defect-free wafer having an N region on the entire surface of the wafer can be obtained.
【００３４】本発明では、上記のような温度勾配の差△
Ｇが小さいＣＺ法による結晶引上げ装置を使用し、引上
げ速度を変えて結晶面内を調査した結果、新たに図１に
示すような欠陥分布図を得ることができた。Ｖ−リッチ
領域とＩ−リッチ領域の間に存在するＮ領域は、従来は
ＯＳＦリング（核）の外側のみと考えられていたが、Ｏ
ＳＦリングの内側にも、Ｎ領域が存在することを確認し
た（図２（ａ）参照）。すなわち、上記特願平９−１９
９４１５号の場合、ＯＳＦリングは、Ｖ−リッチ領域と
Ｎ領域の境界領域となっていた（図３（ａ）参照）が、
この二つは必ずしも一致しないことがわかった。このこ
とは従来の△Ｇの大きい結晶引上げ装置で実験した場合
には発見されず、今回上記の△Ｇの小さい結晶引上げ装
置を使用した結晶を調査した結果、発見したものであ
る。In the present invention, the difference in the temperature gradient as described above △
As a result of using a crystal pulling apparatus based on the CZ method with a small G and changing the pulling speed to investigate the crystal plane, a defect distribution diagram as shown in FIG. 1 was newly obtained. The N region existing between the V-rich region and the I-rich region was conventionally thought to be only outside the OSF ring (nucleus).
It was confirmed that an N region also existed inside the SF ring (see FIG. 2A). That is, Japanese Patent Application No. 9-19 / 1997
In the case of No. 9415, the OSF ring was a boundary region between the V-rich region and the N region (see FIG. 3A).
It turns out that the two do not always match. This was not found in an experiment with a conventional crystal pulling apparatus having a large ΔG, but was discovered as a result of a study of a crystal using the crystal pulling apparatus having a small ΔG.
【００３５】ところが、このＯＳＦリング外側のＮ領域
のみ、あるいはＯＳＦリング内側のＮ領域のみで結晶を
引き上げようとすると、制御範囲が狭く、単結晶棒全体
でＮ領域とするのが困難であり、歩留、生産性が低く、
工業生産上好ましくないという、前記従来技術と同様の
問題が生じる。However, if the crystal is to be pulled only in the N region outside the OSF ring or only in the N region inside the OSF ring, the control range is narrow, and it is difficult to make the entire single crystal rod into the N region. Low yield, low productivity,
The same problem as the above-mentioned prior art, which is not preferable for industrial production, occurs.
【００３６】そこで、本発明者らは、図１をもとに検討
した結果、ＣＺ法により量産性を考慮し、結晶棒全体で
作製可能な品質として、ＯＳＦを結晶棒のバルク中央部
に分布させ、最大限その領域の大きさを抑制し、残りを
ＯＳＦリング外側のＮ領域として結晶を引き上げること
を発想して、本発明を完成させたものである。すなわ
ち、図１の欠陥分布図でいうならば、ＯＳＦ領域と、そ
の外側のＮ−領域の範囲内で結晶を引上げるということ
である。Then, the present inventors studied based on FIG. 1 and found that OSF was distributed in the center of the bulk of the crystal rod as a quality that could be manufactured on the whole crystal rod in consideration of mass productivity by the CZ method. The present invention has been completed with the idea that the size of the region is suppressed to the utmost and the remaining crystal is pulled up as the N region outside the OSF ring. That is, in the defect distribution diagram of FIG. 1, the crystal is pulled within the range of the OSF region and the N-region outside the OSF region.
【００３７】このように、実験・調査の結果を解析して
求めた図１の欠陥分布図を基に、ＯＳＦ領域と、その外
側のＮ−領域の範囲内で結晶を引上げるようにすれば、
制御範囲が広がり、ＦＰＤ及びＬ／Ｄがウエーハ全面内
に存在しないシリコン単結晶およびウエーハを容易に作
製することができる。そして、中央部に存在するＯＳＦ
領域は、ウエーハ全面積に対して極めて小さい面積とな
り、デバイス歩留への影響はわずかで済む。As described above, based on the defect distribution diagram of FIG. 1 obtained by analyzing the results of the experiment and investigation, it is possible to pull up the crystal within the OSF region and the N-region outside the OSF region. ,
The control range is widened, and a silicon single crystal and a wafer in which FPD and L / D do not exist on the entire surface of the wafer can be easily manufactured. And the OSF that exists in the center
The region has an extremely small area with respect to the entire area of the wafer, and has little effect on the device yield.
【００３８】この場合、ＯＳＦリングとその内側のＮ領
域とで結晶を引き上げることも考えられるが、できるウ
エーハは内側がＮ領域、外側がＯＳＦ領域となり、相対
的にＯＳＦ領域が広くなってしまうため好ましくない。In this case, it is conceivable that the crystal is pulled up by the OSF ring and the N region inside the ring. However, the resulting wafer becomes an N region on the inside and an OSF region on the outside, and the OSF region becomes relatively large. Not preferred.
【００３９】そして、上記本発明にかかる結晶中央部に
ＯＳＦ領域があり、その外側がＮ領域となる引上げ装置
の炉内温度を、総合伝熱解析ソフトＦＥＭＡＧ（Ｆ．Ｄ
ｕｐｒｅｔ，Ｐ．Ｎｉｃｏｄｅｍｅ，Ｙ．Ｒｙｃｋｍａ
ｎｓ，Ｐ．Ｗｏｕｔｅｒｓ，ａｎｄ Ｍ．Ｊ．Ｃｒｏｃ
ｈｅｔ，Ｉｎｔ．Ｊ．Ｈｅａｔ Ｍａｓｓ Ｔｒａｎｓ
ｆｅｒ，３３，１８４９（１９９０））を使用して鋭意
解析を行った。The OSF region is located at the center of the crystal according to the present invention, and the outside of the OSF region is the N region. The temperature in the furnace of the pulling apparatus is measured by the integrated heat transfer analysis software FEMAG (FD.
upret, P .; Nicodeme, Y .; Ryckma
ns, P.S. Wouters, and M.W. J. Croc
het, Int. J. Heat Mass Trans
fer, 33, 1849 (1990)).
【００４０】その結果、引上げ軸方向の結晶内温度勾配
の平均値Ｇ［℃／ｍｍ］を、３．０［℃／ｍｍ］以下と
して結晶を引上げればよいことがわかった。また、引上
げ軸方向の結晶内温度勾配の平均値Ｇ［℃／ｍｍ］の値
を、結晶中心部分の温度勾配Ｇｃ［℃／ｍｍ］と結晶周
辺部分の温度勾配Ｇｅ［℃／ｍｍ］との差△Ｇ＝（Ｇｅ
−Ｇｃ）については、△Ｇが１℃／ｍｍ以内として結晶
を引き上げるようにすればよいことがわかった。この値
は、先に提案した、結晶全面をＮ領域とするための条件
である△Ｇ＝（Ｇｅ−Ｇｃ）≦０．５℃／ｍｍに比べて
格段に制御しやすく、量産性があるものである。As a result, it was found that the crystal should be pulled by setting the average value G [° C./mm] of the temperature gradient in the crystal in the pulling axis direction to 3.0 [° C./mm] or less. Further, the value of the average value G [° C./mm] of the temperature gradient in the crystal in the direction of the pulling axis is calculated by dividing the temperature gradient Gc [° C./mm] of the central portion of the crystal and the temperature gradient Ge [° C./mm] of the peripheral portion of the crystal. Difference ΔG = (Ge
Regarding -Gc), it was found that the crystal should be pulled up when ΔG is within 1 ° C./mm. This value is much easier to control compared to the previously proposed condition for setting the entire crystal surface to be an N region, ΔG = (Ge−Gc) ≦ 0.5 ° C./mm, and has high productivity. It is.
【００４１】このような引上げ条件で単結晶を育成する
ことによって、結晶中央部に熱酸化処理をした際にＯＳ
Ｆが発生するか、あるいはＯＳＦの核が存在するもの
の、ＦＰＤ及びＬ／Ｄが結晶内に存在しないシリコン単
結晶を得ることができる。したがって、このようなシリ
コン単結晶をスライスして得られるシリコン単結晶ウエ
ーハは、ウエーハの中央部に熱酸化処理をした際にＯＳ
Ｆが発生するか、あるいはＯＳＦの核が存在するもので
あるとともに、ＦＰＤ及びＬ／Ｄがウエーハ全面内に存
在しないシリコン単結晶ウエーハとなる。By growing a single crystal under such pulling conditions, when a central portion of the crystal is subjected to thermal oxidation,
It is possible to obtain a silicon single crystal in which F is generated or an OSF nucleus exists, but FPD and L / D do not exist in the crystal. Therefore, when a silicon single crystal wafer obtained by slicing such a silicon single crystal is subjected to a thermal oxidation treatment at the center of the wafer, an OS
F is generated or a nucleus of OSF is present, and a silicon single crystal wafer is obtained in which FPD and L / D do not exist in the entire surface of the wafer.
【００４２】すなわち、本発明のシリコン単結晶ウエー
ハは、該ウエーハを熱酸化処理をした際に、ウエーハ中
央部にＯＳＦは発生し、あるいはＯＳＦの核は潜在して
いるが、ＦＰＤ及びＬ／Ｄ（ＬＳＥＰＤ、ＬＦＰＤ）
は、ウエーハ全面内に存在しないというウエーハで、図
２（ｂ）に示したように、いわゆるウエーハ全面にＶ−
リッチ領域とＩ−リッチ領域は存在せず、中性なＮ領域
の面積が非常に大きなものである。このようなＮ領域の
大きい本発明のシリコン単結晶ウエーハには、ＯＳＦの
核は潜在しており、該ウエーハを熱酸化処理した際には
中央部にＯＳＦが発生し得るＯＳＦ領域が存在するが、
ウエーハ中央部でその面積を最大限抑制し、一方ＯＳＦ
外側のＮ領域を最大限に拡大したという新規な欠陥構造
を持ったウエーハである。That is, in the silicon single crystal wafer of the present invention, when the wafer is subjected to a thermal oxidation treatment, OSF is generated in the central portion of the wafer or OSF nuclei are latent, but FPD and L / D (LSEPD, LFPD)
Is a wafer which does not exist on the entire surface of the wafer. As shown in FIG.
There is no rich region and no I-rich region, and the area of the neutral N region is very large. OSF nuclei are latent in such a silicon single crystal wafer of the present invention having a large N region, and when the wafer is subjected to thermal oxidation treatment, there is an OSF region where OSF can be generated at the center. ,
The area is minimized in the center of the wafer, while the OSF
This wafer has a new defect structure in which the outer N region is maximized.
【００４３】この場合、ＯＳＦの外側領域には、本来な
らばＩ−リッチ領域が形成され、その領域には、Ｌ／Ｄ
が発生するはずであるが、本発明の単結晶製造方法で
は、前述のように、引上げ軸方向の結晶内温度勾配の平
均値Ｇ［℃／ｍｍ］を、３．０［℃／ｍｍ］以下とし、
また、引上げ軸方向の結晶内温度勾配の平均値Ｇ［℃／
ｍｍ］の値を、結晶中心部分の温度勾配Ｇｃ［℃／ｍ
ｍ］と結晶周辺部分の温度勾配Ｇｅ［℃／ｍｍ］との差
△Ｇ＝（Ｇｅ−Ｇｃ）については、△Ｇが１℃／ｍｍ以
内として結晶を引き上げているので、ＯＳＦリング外側
のＮ領域が広がり、Ｉ−リッチ領域は形成されない。In this case, an I-rich region is originally formed in a region outside the OSF, and an L / D
However, in the method for producing a single crystal of the present invention, as described above, the average value G [° C./mm] of the temperature gradient in the crystal in the pulling axis direction is 3.0 [° C./mm] or less. age,
Also, the average value G of the temperature gradient in the crystal in the direction of the pulling axis G [° C. /
mm] with the temperature gradient Gc [° C./m
m] and the temperature gradient Ge [° C./mm] at the periphery of the crystal, ΔG = (Ge−Gc). The region widens and no I-rich region is formed.
【００４４】そして、シリコン単結晶育成時に、ＯＳＦ
が結晶中央部で消滅する臨界速度近傍で成長させ、中央
部のＯＳＦ領域の大きさをできるだけ小さくするように
すれば、シリコン単結晶ウエーハとした時のＯＳＦ領域
を、例えばウエーハ面積の５％以下とし、あるいはウエ
ーハ中央部のＯＳＦ領域が、直径２０ｍｍ以下とするこ
とができる。したがって、ウエーハの全面積に対するＯ
ＳＦ領域の比率が小さく、ＦＰＤもＬ／Ｄもない、Ｎ領
域の面積が大きいことから、デバイス歩留を向上するこ
とができるシリコン単結晶ウエーハとなる。When growing the silicon single crystal, the OSF
Is grown near the critical speed at which it disappears at the center of the crystal, and the size of the OSF region at the center is made as small as possible. Alternatively, the OSF region at the center of the wafer may have a diameter of 20 mm or less. Therefore, O for the entire area of the wafer
Since the ratio of the SF region is small, there is no FPD and no L / D, and the area of the N region is large, the silicon single crystal wafer can improve the device yield.
【００４５】そして、中央部のＯＳＦ領域についても、
上述のようにシリコン単結晶育成時に、ＯＳＦが結晶中
央部で消滅する臨界速度近傍で成長させ、中央部のＯＳ
Ｆ領域の大きさをできるだけ小さくなるようにすれば、
ウエーハ中央部に存在するＯＳＦ密度は、１００個／ｃ
ｍ2 以下とすることが可能であり、実質上０になること
もあった。したがって、デバイス工程での歩留への影響
もそれほど大きくないものとすることができる。The OSF area at the center is also
As described above, when growing a silicon single crystal, the OSF is grown near the critical speed at which the OSF disappears at the center of the crystal.
By making the size of the F region as small as possible,
The OSF density existing in the center of the wafer is 100 / c
m 2 or less, and was practically zero in some cases. Therefore, the effect on the yield in the device process can be made not so large.
【００４６】一方、ＯＳＦリングについては、最近の研
究からウエーハ全面内で低酸素濃度の場合には、ＯＳＦ
リングの核が存在しても熱酸化処理によりＯＳＦリング
を発生することはなく、デバイスに影響を与えないとい
うことが判ってきている。この酸素濃度の限界値は、同
一の結晶引上げ装置を使用して、数種類の酸素濃度レベ
ルの結晶を引上げた結果、ウエーハ全面内の酸素濃度が
２４ｐｐｍａ以下であれば、ウエーハの熱酸化処理を行
った時にＯＳＦリングが発生しないことが確認されてい
る。On the other hand, with respect to the OSF ring, a recent study showed that when the oxygen concentration was low in the entire surface of the wafer,
It has been found that the presence of a ring nucleus does not cause an OSF ring due to the thermal oxidation treatment and does not affect the device. The limit value of the oxygen concentration is as follows. As a result of pulling up crystals of several kinds of oxygen concentration levels using the same crystal pulling apparatus, if the oxygen concentration in the entire surface of the wafer is 24 ppma or less, the wafer is subjected to thermal oxidation treatment. It is confirmed that the OSF ring does not occur when this occurs.
【００４７】すなわち、図５は、一本の結晶を引上げ中
に徐々に酸素濃度を下げていった時に、結晶全長にわた
ってＯＳＦとなる核は存在するが、ウエーハの熱酸化処
理を行った時にＯＳＦリングが観察されるのは２４ｐｐ
ｍａまでで、２４ｐｐｍａ以下ではＯＳＦリング核は存
在するが、熱酸化処理によるＯＳＦリングは発生してい
ないことを表している。In other words, FIG. 5 shows that when the oxygen concentration is gradually lowered while pulling up one crystal, there are nuclei that become OSFs over the entire length of the crystal, but when the wafer is subjected to the thermal oxidation treatment, the OSF The ring is observed at 24pp
In the case of up to ma, at 24 ppma or less, an OSF ring nucleus is present, but no OSF ring is generated by the thermal oxidation treatment.
【００４８】ちなみに、成長結晶中の酸素濃度を２４ｐ
ｐｍａ以下にするには、従来から一般に用いられている
方法で行えばよく、例えば、ルツボの回転数あるいは融
液内温度分布、雰囲気圧力、ガス流量等を調整する手段
により簡単に行うことができる。Incidentally, the oxygen concentration in the grown crystal was set to 24 p.
In order to reduce the pressure to pma or less, a method generally used conventionally may be used. For example, it can be easily performed by means for adjusting the number of rotations of the crucible, the temperature distribution in the melt, the atmospheric pressure, the gas flow rate, and the like. .
【００４９】したがって、本発明でも、ウエーハ全面の
酸素濃度を２４ｐｐｍａ（ＡＳＴＭ’７９値）以下とす
れば、中央部に存在するＯＳＦ核の成長を阻害すること
ができ、実質上、ＯＳＦあるいはＯＳＦの潜在核がウエ
ーハ内に存在してもデバイスに影響を与えることはない
ので、結局該ウエーハをＯＳＦ熱酸化処理をした際に、
ＯＳＦの核は潜在しているが、ＯＳＦを発生することは
なく、ＦＰＤ及びＬ／Ｄ（ＬＳＥＰＤ、ＬＦＰＤ）もウ
エーハ全面内に存在しないという、いわゆるウエーハ全
面がＶ−リッチ領域、Ｉ−リッチ領域も、害を及ぼすよ
うなＯＳＦも存在しない全面使用可能な極低欠陥密度の
ウエーハを得ることができる。Therefore, also in the present invention, when the oxygen concentration on the entire surface of the wafer is set to 24 ppma (ASTM '79 value) or less, the growth of the OSF nucleus existing at the center can be inhibited, and the OSF or OSF Even if latent nuclei exist in the wafer, they do not affect the device, so when the wafer is subjected to OSF thermal oxidation treatment,
Although the OSF nucleus is latent, it does not generate OSF, and the FPD and L / D (LSEPD, LFPD) do not exist in the entire surface of the wafer. In addition, it is possible to obtain a wafer with an extremely low defect density that can be used on the entire surface without causing any harmful OSF.
【００５０】[0050]
【発明の実施の形態】以下、本発明の実施の形態につい
て、図面を参照しながら詳細に説明する。まず、本発明
で使用するＣＺ法による単結晶引上げ装置の構成例を図
６により説明する。図６に示すように、この単結晶引上
げ装置３０は、引上げ室３１と、引上げ室３１中に設け
られたルツボ３２と、ルツボ３２の周囲に配置されたヒ
ータ３４と、ルツボ３２を回転させるルツボ保持軸３３
及びその回転機構（図示せず）と、単結晶シリコンの種
結晶５を保持するシードチャック６と、シードチャック
６を引上げるワイヤ７と、ワイヤ７を回転又は巻き取る
巻取機構（図示せず）を備えて構成されている。ルツボ
３２は、その内側のシリコン融液（湯）２を収容する側
には石英ルツボが設けられ、その外側には黒鉛ルツボが
設けられている。また、ヒータ３４の外側周囲には断熱
材３５が配置されている。Embodiments of the present invention will be described below in detail with reference to the drawings. First, a configuration example of a single crystal pulling apparatus using the CZ method used in the present invention will be described with reference to FIG. As shown in FIG. 6, the single crystal pulling apparatus 30 includes a pulling chamber 31, a crucible 32 provided in the pulling chamber 31, a heater 34 disposed around the crucible 32, and a crucible 32 for rotating the crucible 32. Holding shaft 33
And a rotating mechanism (not shown), a seed chuck 6 for holding a single crystal silicon seed crystal 5, a wire 7 for pulling up the seed chuck 6, and a winding mechanism for rotating or winding the wire 7 (not shown). ). The crucible 32 is provided with a quartz crucible on the inner side for containing the silicon melt (hot water) 2 and a graphite crucible on the outer side. A heat insulating material 35 is arranged around the outside of the heater 34.
【００５１】また、本発明の製造方法に関わる結晶内温
度勾配等の製造条件を充足するために、結晶の固液界面
の外周に環状の固液界面断熱材８を設け、その上に上部
囲繞断熱材９が配置されている。この固液界面断熱材８
は、その下端とシリコン融液２の湯面との間に３〜５ｃ
ｍの隙間１０を設けて設置されている。上部囲繞断熱材
９は条件によっては使用しないこともある。さらに、冷
却ガスを吹き付けたり、輻射熱を遮って単結晶を冷却す
る筒状の冷却装置３６を設けている。また、本実施形態
では、引上げ室３１の水平方向の外側に、例えば超伝導
コイル等からなる磁石３７を設置し、シリコン融液２に
水平方向の磁場を印加することによって、融液の対流を
抑制し、単結晶の安定成長をはかる、いわゆるＭＣＺ法
が用いられている。Further, in order to satisfy the manufacturing conditions such as the temperature gradient in the crystal relating to the manufacturing method of the present invention, an annular solid-liquid interface heat insulating material 8 is provided on the outer periphery of the solid-liquid interface of the crystal, and an upper surrounding material is provided thereon. A heat insulating material 9 is provided. This solid-liquid interface insulation material 8
Is between 3 and 5c between the lower end and the molten metal surface of the silicon melt 2.
The gap 10 of m is provided. The upper surrounding insulating material 9 may not be used depending on conditions. Further, a cylindrical cooling device 36 for blowing a cooling gas or cooling the single crystal by blocking radiant heat is provided. Further, in the present embodiment, a magnet 37 made of, for example, a superconducting coil or the like is installed outside the pulling chamber 31 in the horizontal direction, and a horizontal magnetic field is applied to the silicon melt 2 to reduce the convection of the melt. The so-called MCZ method for suppressing the growth of a single crystal is used.
【００５２】この場合、本発明の条件を満足するのに特
に重要であるのは、図６に示したように、引上げ室３１
の湯面上の単結晶棒１中の結晶成長界面（固液界面４）
の外周空間において、湯面近傍の結晶の温度が１４２０
℃から１４００℃までの温度域に環状の固液界面断熱材
８を設けたことと、その上に上部囲繞断熱材９を配置し
たこと、および引上げ室３１の外側に磁石３７を配置し
たことである。これによって、結晶内温度勾配の平均値
Ｇを、３．０［℃／ｍｍ］以下とすることができるし、
結晶中心部分の温度勾配Ｇｃ［℃／ｍｍ］と結晶周辺部
分の温度勾配Ｇｅ［℃／ｍｍ］との差△Ｇ＝（Ｇｅ−Ｇ
ｃ）を１℃／ｍｍ以内として結晶を引き上げることを可
能とするとともに、引上げ速度を安定化させて、高精度
制御を可能とすることが出来る。さらに、必要に応じて
この断熱材の上部に結晶を冷却する装置、例えば冷却装
置３６を設けて、これに上部より冷却ガスを吹きつけて
結晶を冷却できるものとし、筒下部に輻射熱反射板を取
り付けた構造としてもよい。In this case, it is particularly important to satisfy the conditions of the present invention, as shown in FIG.
Crystal growth interface (solid-liquid interface 4) in single crystal rod 1 on the molten metal surface
Temperature of the crystal near the molten metal surface
The provision of the annular solid-liquid interface heat insulator 8 in the temperature range from 1 ° C. to 1400 ° C., the disposition of the upper surrounding heat insulator 9 thereon, and the disposition of the magnet 37 outside the pulling chamber 31 is there. Thereby, the average value G of the temperature gradient in the crystal can be set to 3.0 [° C./mm] or less,
Difference ΔG = (Ge−G) between the temperature gradient Gc [° C./mm] at the center of the crystal and the temperature gradient Ge [° C./mm] at the periphery of the crystal.
By setting c) to within 1 ° C./mm, the crystal can be pulled up, and the pulling speed can be stabilized to enable high-precision control. Further, if necessary, a device for cooling the crystal, for example, a cooling device 36 is provided on the upper portion of the heat insulating material, and the cooling gas can be blown from the upper portion to cool the crystal, and a radiant heat reflecting plate is provided on the lower portion of the cylinder. It may be a mounted structure.
【００５３】このように液面の直上の位置に所定の隙間
を設けて断熱材を配置し、さらにこの断熱材の上部に結
晶を冷却する装置を設けた構造とすることによって、結
晶成長界面近傍では輻射熱により保温効果が得られ、結
晶の上部ではヒータ等からの輻射熱をカットできるの
で、本発明の製造条件を満足させることができる。この
結晶の冷却装置としては、前記筒状の冷却装置３６とは
別に、結晶の周囲を囲繞する空冷ダクトや水冷蛇管等を
設けて所望の温度勾配を確保するようにしても良い。As described above, a structure is provided in which a predetermined gap is provided immediately above the liquid surface, a heat insulating material is provided, and a device for cooling the crystal is provided above the heat insulating material. In this case, a heat retention effect is obtained by radiant heat, and radiant heat from a heater or the like can be cut off above the crystal, so that the production conditions of the present invention can be satisfied. As a cooling device for the crystal, an air-cooled duct or a water-cooled snake tube surrounding the periphery of the crystal may be provided separately from the cylindrical cooling device 36 to secure a desired temperature gradient.
【００５４】次に、上記の単結晶引上げ装置３０による
単結晶育成方法について説明する。まず、ルツボ３２内
でシリコンの高純度多結晶原料を融点（約１４２０℃）
以上に加熱して融解する。次に、ワイヤ７を巻き出すこ
とにより融液２の表面略中心部に種結晶５の先端を接触
又は浸漬させる。その後、ルツボ保持軸３３を適宜の方
向に回転させるとともに、ワイヤ７を回転させながら巻
き取り種結晶５を引上げることにより、単結晶育成が開
始される。以後、引上げ速度と温度を適切に調節するこ
とにより略円柱形状の単結晶棒１を得ることができる。Next, a method for growing a single crystal using the above-described single crystal pulling apparatus 30 will be described. First, a high-purity polycrystalline silicon material is melted in a crucible 32 (about 1420 ° C.).
Heat and melt as above. Next, by unwinding the wire 7, the tip of the seed crystal 5 is brought into contact with or immersed substantially in the center of the surface of the melt 2. Thereafter, the crucible holding shaft 33 is rotated in an appropriate direction, and at the same time, the wound seed crystal 5 is pulled up while rotating the wire 7, thereby starting single crystal growth. Thereafter, by appropriately adjusting the pulling speed and the temperature, a substantially columnar single crystal rod 1 can be obtained.
【００５５】そして、単結晶棒育成中は、その直径を所
望値に制御する必要がある。そこで結晶引上げ中は、例
えば引上げ室３１に設けられた窓から、ＣＣＤカメラ等
を用いて結晶棒の直径が測定される。直径の測定は、前
記ＣＣＤカメラ等で結晶成長界面近傍を観測し、シリコ
ン融液と結晶との境界部に存在するフユージョンリング
とよばれる明部を光量信号から検出して、その位置を特
定することによって行なわれる。During the growth of the single crystal rod, it is necessary to control the diameter to a desired value. Therefore, during the crystal pulling, the diameter of the crystal rod is measured using, for example, a CCD camera or the like from a window provided in the pulling chamber 31. The diameter is measured by observing the vicinity of the crystal growth interface with the CCD camera or the like, detecting a bright portion called a fusion ring existing at the boundary between the silicon melt and the crystal from the light quantity signal, and specifying its position. It is done by doing.
【００５６】得られた直径データは、引上げ装置に付設
されているコンピュータのＣＰＵに入力され、目標直径
との誤差を計算し、ヒータ３４を制御する温度調節器お
よびワイヤ７の引上げ速度調節機構に、その補正量に相
当する電圧信号を送る等のフィードバック制御が自動的
に行なわれる。すなわち、ヒータ３４の出力およびワイ
ヤ７を巻きあげるモータの回転数を制御することによ
り、シリコン融液の温度と結晶引上げ速度を制御してい
る。そして、この直径制御は、その誤差を縮小するため
に、温度および引上げ速度の補正量は、ＰＩＤ演算方式
等により算出される。 こうして、直径制御がなされつ
つ１本の単結晶棒が育成される。The obtained diameter data is input to a CPU of a computer attached to the pulling device, calculates an error from the target diameter, and sends the data to a temperature controller for controlling the heater 34 and a pulling speed adjusting mechanism for the wire 7. Feedback control such as sending a voltage signal corresponding to the correction amount is automatically performed. That is, the temperature of the silicon melt and the crystal pulling speed are controlled by controlling the output of the heater 34 and the rotation speed of the motor that winds the wire 7. In this diameter control, the correction amounts of the temperature and the pulling speed are calculated by a PID calculation method or the like in order to reduce the error. Thus, one single crystal rod is grown while controlling the diameter.
【００５７】そして、本発明では、結晶引上げ速度Ｆ
［ｍｍ／ｍｉｎ］は、ＯＳＦが結晶バルク中心で消滅す
る臨界速度近傍で引き上げるように制御される。これに
よって、結晶中央部でＦＰＤ等が発生するようなＶ領域
が形成されることが無いとともに、ＯＳＦ領域を極力小
さくすることができる。ここで大切なことは、結晶引上
げ速度を、臨界速度に対して一定の範囲内に精度良く制
御することである。In the present invention, the crystal pulling speed F
[Mm / min] is controlled so as to be raised near a critical speed at which the OSF disappears at the center of the crystal bulk. Thus, a V region in which FPD or the like occurs at the center of the crystal is not formed, and the OSF region can be made as small as possible. What is important here is to precisely control the crystal pulling speed within a certain range with respect to the critical speed.
【００５８】すなわち、本発明のように、前記欠陥分布
図において、ＯＳＦ領域と、その外側のＮ−領域の範囲
内として結晶を引上げ、ウエーハの中央部に熱酸化処理
をした際にＯＳＦ領域を有するものの、ＦＰＤ及びＬ／
Ｄがウエーハ全面内に存在しないものを得るためには、
結晶の引上げ速度を、臨界速度に対して±０．０２［ｍ
ｍ／ｍｉｎ］以内に制御しつつ結晶を引上げることが必
要である。That is, as in the present invention, in the defect distribution diagram, the crystal is pulled within the range of the OSF region and the N− region outside the OSF region, and when the thermal oxidation treatment is performed on the central portion of the wafer, the OSF region is raised. Have FPD and L /
In order to obtain D that does not exist in the whole wafer,
The crystal pulling speed is set to ± 0.02 [m
It is necessary to pull the crystal while controlling it within [m / min].
【００５９】そこで、本発明では引上げ速度制御の高精
度化を図ることとした。引上げ速度の高精度化は、どの
ような方式で行なっても良いが、ここでは、前記直径制
御における、フィードバック制御の応答性を高めること
によって対応した。Accordingly, in the present invention, the precision of the pulling speed control is improved. Although any method may be used to increase the precision of the pulling speed, here, the response was improved by increasing the responsiveness of the feedback control in the diameter control.
【００６０】すなわち、フィードバック制御は、ある一
定時間内に検出された直径データを平均し、これをＣＰ
Ｕに送信し、設定直径との偏差を算出し、その補正量を
出力するという制御を繰り返す仕組みになっているが、
この直径データを検出し平均する時間を短縮し（例え
ば、６０秒を３０秒とする）、フィードバックのサイク
ルを早め、応答性を高めた。特に、温調系への応答性を
速くし、結晶成長速度（引上げ速度）の変動を最大限に
抑制するようにした。しかも、このような方法によれ
ば、フィードバック制御の一設定値を変更するだけであ
るので、一般の生産機においても十分に対応することが
でき、簡単である。That is, the feedback control averages the diameter data detected within a certain period of time,
U, calculate the deviation from the set diameter, and output the correction amount.
The time for detecting and averaging the diameter data was shortened (for example, 60 seconds was changed to 30 seconds), the feedback cycle was accelerated, and the responsiveness was improved. In particular, the response to the temperature control system was increased, and the fluctuation of the crystal growth rate (pulling rate) was suppressed to the maximum. In addition, according to such a method, since only one set value of the feedback control is changed, it is possible to sufficiently cope with a general production machine, and the method is simple.
【００６１】そして、上記のような制御を、チョクラル
スキー法によってシリコン単結晶を育成する際に行なえ
ば、結晶棒のうち上記制御が行なわれた部位について、
所望品質のものとなるが、結晶棒全体を本発明の品質を
有するものとして、歩留を向上させるためには、引上げ
速度Ｆ［ｍｍ／ｍｉｎ］の平均値を、ＯＳＦが結晶バル
ク中心で消滅する臨界速度の平均値に対し、±０．０１
［ｍｍ／ｍｉｎ］以内に制御しつつ結晶を引上げるよう
にする必要がある。If the above control is performed when growing a silicon single crystal by the Czochralski method, a portion of the crystal bar where the above control is performed is
Although the desired quality can be obtained, the average value of the pulling speed F [mm / min] is reduced at the center of the crystal bulk in order to improve the yield with the entire crystal rod having the quality of the present invention. ± 0.01 with respect to the average value of critical speed
It is necessary to pull the crystal while controlling it within [mm / min].
【００６２】この場合、精度良く前記欠陥分布図におい
て、ＯＳＦ領域と、その外側のＮ−領域の範囲内とし、
また、結晶の引上げ速度を、臨界速度に対して±０．０
２［ｍｍ／ｍｉｎ］以内に制御し、あるいは、引上げ速
度の平均値を、ＯＳＦが結晶バルク中心で消滅する臨界
速度の平均値に対し、±０．０１［ｍｍ／ｍｉｎ］以内
とするためには、上記フィードバック制御の応答性の改
善の他、引上げ中シリコン融液に磁場を印加しつつ結晶
を引上げるのが望ましい。磁場を印加することによっ
て、シリコン融液中の対流が抑制され、より上記引上げ
条件に制御するのが容易になるため、結晶棒全体を所望
品質とし易くなるからである。In this case, in the defect distribution diagram, the OSF region and the N-region outside the OSF region are accurately set.
Further, the pulling speed of the crystal is ± 0.0 with respect to the critical speed.
In order to control within 2 [mm / min] or to set the average value of the pulling speed within ± 0.01 [mm / min] with respect to the average value of the critical speed at which OSF disappears at the center of the crystal bulk. It is desirable that the crystal be pulled while applying a magnetic field to the silicon melt during the pulling, in addition to improving the responsiveness of the feedback control. This is because, by applying a magnetic field, convection in the silicon melt is suppressed, and it is easier to control the above pulling conditions, so that the entire crystal rod can be easily made to a desired quality.
【００６３】特に、印加する磁場を水平磁場とし、ま
た、印加する磁場の強度を２０００Ｇ以上、より好まし
くは３０００Ｇ以上とするのが良い。シリコン融液の対
流を抑制し、引上げ速度を安定化するためには、いわゆ
る縦磁場、あるいはカスプ磁場等を印加してもよいが、
結晶内温度勾配Ｇおよび面内の温度勾配の差△Ｇを小さ
くし、結晶中のＮ領域を広げるためには、結晶成長界面
に磁場が水平に作用する水平磁場の方が好ましい。ま
た、印加する磁場強度は、強ければ強いほど対流抑制効
果が強いので良いが、８０００Ｇもあれば充分である。
逆に、２０００Ｇ未満では、磁場印加効果が少なくな
り、引上げ速度の安定化効果が小さくなる。In particular, the applied magnetic field is preferably a horizontal magnetic field, and the intensity of the applied magnetic field is preferably 2,000 G or more, more preferably 3,000 G or more. In order to suppress the convection of the silicon melt and stabilize the pulling speed, a so-called vertical magnetic field, or a cusp magnetic field may be applied.
In order to reduce the difference ΔG between the in-crystal temperature gradient G and the in-plane temperature gradient and expand the N region in the crystal, a horizontal magnetic field in which a magnetic field acts horizontally on the crystal growth interface is preferable. The strength of the applied magnetic field is preferably as high as possible because the effect of suppressing convection is strong, but 8000 G is sufficient.
On the other hand, if it is less than 2000 G, the effect of applying the magnetic field decreases, and the effect of stabilizing the pulling speed decreases.
【００６４】このように、例えば磁場を４０００Ｇ以上
印加し、結晶の引上げ速度を高精度化して、臨界速度に
対して±０．０２［ｍｍ／ｍｉｎ］以内に制御し、引上
げ速度の平均値を、ＯＳＦが結晶バルク中心で消滅する
臨界速度の平均値に対し、±０．０１［ｍｍ／ｍｉｎ］
以内として、引上げ速度をきわめて安定させて結晶を引
き上げれば、単結晶中央部のＯＳＦはきわめて低密度と
なり、殆ど発生しないこともある。As described above, for example, a magnetic field of 4000 G or more is applied, the pulling speed of the crystal is made highly accurate, the critical speed is controlled within ± 0.02 [mm / min], and the average value of the pulling speed is adjusted. ± 0.01 [mm / min] with respect to the average value of the critical velocity at which OSF disappears at the center of the crystal bulk.
Within this range, if the crystal is pulled up with the pulling speed extremely stabilized, the OSF at the central portion of the single crystal will have a very low density and may hardly be generated.
【００６５】[0065]
【実施例】以下、本発明の具体的な実施の形態を実施例
を挙げて説明するが、本発明はこれらに限定されるもの
ではない。図６に示した水平磁場印加可能な引上げ装置
で、２５インチ石英ルツボに原料多結晶シリコンを１０
０Ｋｇチャージし、直径８インチ、方位＜１００＞、直
胴部の長さ約１ｍのシリコン単結晶棒を引き上げた。シ
リコン融液の湯温は約１４２０℃、湯面から環状の固液
界面断熱材の下端までは、４ｃｍの空間とし、その上に
１０ｃｍ高さの環状固液界面断熱材、および３０ｃｍ高
さの上部囲繞断熱材を配備した。EXAMPLES Hereinafter, specific embodiments of the present invention will be described with reference to examples, but the present invention is not limited to these. Using a pulling device capable of applying a horizontal magnetic field as shown in FIG.
After charging 0 kg, a silicon single crystal rod having a diameter of 8 inches, an orientation of <100>, and a length of a straight body portion of about 1 m was pulled up. The temperature of the silicon melt is about 1420 ° C. The space from the surface of the silicon melt to the lower end of the annular solid-liquid interfacial insulation is 4 cm, and a 10 cm-high annular solid-liquid interfacial insulation and a 30 cm high Top surrounding insulation was deployed.
【００６６】この条件で、平均引上げ速度を０．８〜
０．３ｍｍ／ｍｉｎまで変化させて結晶を引上げ、ＯＳ
Ｆが結晶バルク中心で消滅する臨界速度を調査したとこ
ろ、単結晶棒の肩部で０．５０ｍｍ／ｍｉｎであり、直
胴の終端部で０．４５ｍｍ／ｍｉｎであった。したがっ
て、この臨界引上げ速度を目標引上げ速度として結晶を
引き上げることにした。Under these conditions, the average pulling speed is 0.8 to
The crystal is pulled up by changing it to 0.3 mm / min.
When the critical speed at which F disappears at the center of the crystal bulk was investigated, it was 0.50 mm / min at the shoulder of the single crystal rod and 0.45 mm / min at the end of the straight body. Therefore, the crystal is pulled up using the critical pulling rate as a target pulling rate.
【００６７】得られた単結晶棒は、結晶成長方向に縦割
にし、厚さ２ｍｍのサンプルを２枚切り出し、その表面
に鏡面加工を施した。そのうちの１枚は、３０分Ｓｅｃ
ｃｏエッチングを施した後、顕微鏡観察することによっ
て、ＦＰＤ、Ｌ／Ｄ等のグローンイン欠陥の測定を行っ
た。残りの１枚については、（水蒸気＋酸素）雰囲気
下、１２００℃／１００分の熱酸化処理を施して、Ｘ線
トポグラフで観察し、ＯＳＦリング等の発生状況を確認
した。The obtained single crystal rod was vertically divided in the crystal growth direction, two samples each having a thickness of 2 mm were cut out, and the surface thereof was mirror-finished. One of them is 30 minutes Sec
After performing the co-etching, the observation of the microscope was performed to measure the growth-in defect such as FPD and L / D. The remaining one was subjected to a thermal oxidation treatment at 1200 ° C./100 minutes in a (steam + oxygen) atmosphere, and observed with an X-ray topograph to confirm the occurrence of OSF rings and the like.
【００６８】（実施例１）印加磁場強度を０とし、直径
制御のフィードバックのサイクルを、従来の６０秒から
３０秒として応答性を高め、結晶成長速度（引上げ速
度）の変動を最大限に抑制するようにし、結晶の引上げ
速度を、ＯＳＦが結晶バルク中心で消滅する臨界速度に
対して±０．０２［ｍｍ／ｍｉｎ］以内となるように制
御をしつつ結晶を引上げた。(Example 1) The applied magnetic field intensity is set to 0, and the feedback cycle of diameter control is increased from the conventional 60 seconds to 30 seconds to improve the responsiveness and minimize the fluctuation of the crystal growth rate (pulling rate). The crystal was pulled while controlling the pulling speed of the crystal so as to be within ± 0.02 [mm / min] with respect to the critical speed at which OSF disappears at the center of the crystal bulk.
【００６９】出来た結晶棒の結晶成長速度（引上げ速
度）の制御結果と結晶棒中の欠陥発生状況の結果を図７
に示した。図７（ａ）は、成長速度の結果図、図７
（ｂ）は、結晶欠陥の結果図である。FIG. 7 shows the results of controlling the crystal growth rate (pulling rate) of the formed crystal rod and the results of the occurrence of defects in the crystal rod.
It was shown to. FIG. 7A is a graph showing the result of the growth rate, and FIG.
(B) is a diagram showing the result of crystal defects.
【００７０】この結果を見ると、結晶の引上げ速度を、
臨界速度に対して±０．０２［ｍｍ／ｍｉｎ］以内とな
るように制御が行なわれている部分（図中のＡ領域）
は、本発明の所望品質の結晶、すなわち結晶中央部にＯ
ＳＦ領域があるとともに、ＦＰＤ及びＬ／Ｄが結晶内に
存在しないものとなることがわかる。一方、上記本発明
の引上げ速度条件を上にはずれた部分では、結晶中央部
にＦＰＤ領域が形成され（図中のＢ領域）、逆に本発明
の引上げ速度条件を下にはずれた部分では、Ｌ／Ｄ領域
が形成されている（図中のＣ領域）。そして、ＯＳＦ領
域とＬ／Ｄ領域との間では、無欠陥領域であるＮ領域
が、単結晶棒の一部で形成されている。このように、実
施例１では、本発明の品質もしくはＮ領域のみの結晶
が、単結晶棒の約４０〜５０％の部位で得ることが出来
た。Looking at the results, the pulling speed of the crystal was
Part where control is performed so as to be within ± 0.02 [mm / min] of the critical speed (A region in the figure)
Is a crystal of the desired quality of the present invention, ie, O
It can be seen that there is an SF region and FPD and L / D do not exist in the crystal. On the other hand, in a portion where the pulling speed condition of the present invention is deviated upward, an FPD region is formed at the center of the crystal (region B in the figure). Conversely, in a portion where the pulling speed condition of the present invention is deviated below, An L / D region is formed (C region in the figure). Then, between the OSF region and the L / D region, the N region which is a defect-free region is formed by a part of the single crystal rod. As described above, in Example 1, the crystal of the present invention or the crystal of only the N region was obtained in about 40 to 50% of the single crystal rod.
【００７１】（実施例２）印加磁場強度を４０００Ｇと
し、直径制御のフィードバックのサイクルを、従来の６
０秒から３０秒として応答性を高め、結晶成長速度（引
上げ速度）の変動を最大限に抑制するようにし、結晶の
引上げ速度の平均値を、ＯＳＦが結晶バルク中心で消滅
する臨界速度に対して±０．０２［ｍｍ／ｍｉｎ］以内
となるように制御をしつつ結晶を引上げた。(Embodiment 2) The applied magnetic field strength is set to 4000 G, and the diameter control feedback cycle is set to the conventional 6
The response is increased from 0 seconds to 30 seconds, and the fluctuation of the crystal growth rate (pulling rate) is minimized. The average value of the crystal pulling rate is set to the critical speed at which OSF disappears at the center of the crystal bulk. The crystal was pulled while controlling so as to be within ± 0.02 [mm / min].
【００７２】出来た結晶棒の結晶成長速度（引上げ速
度）の制御結果と結晶棒中の欠陥発生状況の結果を図８
に示した。図８（ａ）は、成長速度の結果図、図８
（ｂ）は、結晶欠陥の結果図である。FIG. 8 shows the result of controlling the crystal growth rate (pulling rate) of the formed crystal rod and the result of the state of occurrence of defects in the crystal rod.
It was shown to. FIG. 8A is a graph showing the result of the growth rate, and FIG.
(B) is a diagram showing the result of crystal defects.
【００７３】この結果を見ると、磁場を印加することに
より引上げ速度が安定し、結晶の引上げ速度を、殆どの
部位で臨界速度に対して±０．０２［ｍｍ／ｍｉｎ］以
内となるように制御が行なわれていることがわかる。本
発明の所望品質の結晶、すなわち結晶中央部にＯＳＦ領
域があるとともに、ＦＰＤ及びＬ／Ｄが結晶内に存在し
ないものとなる部位（図中のＡ領域）が、単結晶棒の約
８０％の部位で得ることが出来た。The results show that the application of a magnetic field stabilizes the pulling speed and that the pulling speed of the crystal is within ± 0.02 [mm / min] of the critical speed in most parts. It can be seen that control is being performed. The crystal of the desired quality of the present invention, that is, the OSF region in the center of the crystal, and the portion where the FPD and L / D do not exist in the crystal (region A in the figure) are about 80% of the single crystal rod. At the site.
【００７４】一方、まだ一部の部位において、本発明の
品質を具備しない部分があり、結晶中央部にＦＰＤが形
成されている（図中のＢ領域）。この部分を調べてみる
と引上げ速度は、ほぼ±０．０２［ｍｍ／ｍｉｎ］以内
に制御することは出来ているが、引上げ速度の平均値が
臨界速度に対して、全体的に高めになっていることがわ
かる。On the other hand, there is still a part that does not have the quality of the present invention in some parts, and an FPD is formed in the central part of the crystal (region B in the figure). Examining this part, the pulling speed can be controlled within approximately ± 0.02 [mm / min], but the average value of the pulling speed is higher than the critical speed as a whole. You can see that it is.
【００７５】（実施例３）そこで、引上げ速度の平均値
も制御することとし、ＯＳＦが結晶バルク中心で消滅す
る臨界速度の平均値に対し、±０．０１［ｍｍ／ｍｉ
ｎ］以内となるようにした。すなわち、印加磁場強度を
４０００Ｇとし、直径制御のフィードバックのサイクル
を、従来の６０秒から３０秒として応答性を高め、結晶
成長速度（引上げ速度）の変動を最大限に抑制するよう
にし、結晶の引上げ速度を、ＯＳＦが結晶バルク中心で
消滅する臨界速度に対して±０．０２［ｍｍ／ｍｉｎ］
以内、結晶引上げ速度の平均値を、ＯＳＦが結晶バルク
中心で消滅する臨界速度の平均値に対し、±０．０１
［ｍｍ／ｍｉｎ］以内となるように制御をしつつ結晶を
引上げた。(Embodiment 3) Therefore, the average value of the pulling speed is also controlled, and the average value of the critical speed at which the OSF disappears at the center of the crystal bulk is ± 0.01 [mm / mi].
n]. That is, the applied magnetic field strength is set to 4000 G, and the feedback cycle of the diameter control is increased from the conventional 60 seconds to 30 seconds to improve the responsiveness and to suppress the fluctuation of the crystal growth rate (pulling rate) to the maximum. The pulling speed is ± 0.02 [mm / min] with respect to the critical speed at which OSF disappears at the center of the crystal bulk.
Within, the average value of the crystal pulling speed is ± 0.01 with respect to the average value of the critical speed at which OSF disappears at the center of the crystal bulk.
The crystal was pulled while controlling so as to be within [mm / min].
【００７６】出来た結晶棒の結晶成長速度（引上げ速
度）の制御結果と結晶棒中の欠陥発生状況の結果を図９
に示した。図９（ａ）は、成長速度の結果図、図９
（ｂ）は、結晶欠陥の結果図である。FIG. 9 shows the results of controlling the crystal growth rate (pulling rate) of the formed crystal rod and the results of the occurrence of defects in the crystal rod.
It was shown to. FIG. 9A is a diagram showing the results of the growth rate, and FIG.
(B) is a diagram showing the result of crystal defects.
【００７７】この結果を見ると、磁場を印加することに
より引上げ速度が安定し、結晶の引上げ速度の平均値
を、結晶棒全体でほぼ臨界速度に対して±０．０１［ｍ
ｍ／ｍｉｎ］以内となるように制御が行なわれているこ
とがわかる。したがって、本発明の所望品質の結晶、す
なわち結晶中央部にＯＳＦ領域があるとともに、ＦＰＤ
及びＬ／Ｄが結晶内に存在しないものとなる部位（図中
のＡ領域）が、１本の単結晶棒全体で得ることが出来
た。The results show that the application of the magnetic field stabilizes the pulling speed, and the average value of the pulling speed of the crystal is ± 0.01 [m
m / min]. Therefore, the crystal of the desired quality of the present invention, that is, the OSF region in the center of the crystal and the FPD
In addition, a portion where the L / D does not exist in the crystal (A region in the figure) could be obtained in one single crystal rod as a whole.
【００７８】（実施例４）次に、上記実施例で縦割りに
され残ったかまぼこ型の単結晶棒のうち、本発明の品質
を有する部位から、半月型のウエーハを切り出し、これ
に鏡面加工を施して半月型のシリコン単結晶の鏡面ウエ
ーハを作製し、グローンイン欠陥の測定を行った。ま
た、熱酸化処理を施してＯＳＦ発生の有無を確認した。
さらに、酸化膜耐圧特性についても調べた。(Example 4) Next, a half-moon-shaped wafer was cut out from a portion having the quality of the present invention among the remaining Kamaboko-shaped single crystal rods vertically divided in the above-mentioned embodiment, and this was mirror-finished. Was performed to produce a half-moon-shaped mirror wafer of silicon single crystal, and measurement of a grown-in defect was performed. In addition, thermal oxidation treatment was performed to check for the occurrence of OSF.
Further, the breakdown voltage characteristics of the oxide film were also examined.
【００７９】その結果、ウエーハの中央部において、直
径約２０ｍｍ以下のＯＳＦ領域は存在するが、該ＯＳＦ
領域の外側の部分はグローンイン欠陥の存在しない無欠
陥領域であり、Ｎ領域を最大限拡大した極低欠陥ウエー
ハを得た。このＯＳＦ領域の面積は、直径８インチウエ
ーハの面積の約１％以下であり、実質上デバイス歩留の
低下要因としての影響をわずかなものとすることが出来
る。なお、直径８インチ以外の単結晶においても同様に
引上げテストをしてみたところ、ＯＳＦ領域の面積は、
ウエーハ面積の５％以下に抑制出来ることが確認出来
た。As a result, an OSF region having a diameter of about 20 mm or less exists in the center of the wafer.
The portion outside the region is a defect-free region having no grown-in defect, and an extremely low defect wafer in which the N region was maximized was obtained. The area of the OSF region is about 1% or less of the area of the wafer having a diameter of 8 inches, and the influence as a factor for lowering the device yield can be substantially reduced. When a pull-up test was similarly performed on a single crystal having a diameter other than 8 inches, the area of the OSF region was found to be:
It was confirmed that the area could be suppressed to 5% or less of the wafer area.
【００８０】特に、ウエーハ面内酸素濃度が２４ｐｐｍ
ａ以下のウエーハでは、中央部のＯＳＦ領域で、ＯＳＦ
核は存在するが熱酸化処理によってもＯＳＦは発生せ
ず、ウエーハ全面がデバイス歩留の良好なものであっ
た。Particularly, when the oxygen concentration in the wafer surface is 24 ppm
In the wafers below a, the OSF
Although nuclei existed, OSF was not generated even by the thermal oxidation treatment, and the entire surface of the wafer had good device yield.
【００８１】このウエーハの酸化膜耐圧特性は、Ｃ−モ
ード良品率９７〜１００％となった。なお、Ｃ−モード
測定条件は、次の通りである。 １）酸化膜厚：２５ｎｍ、 ２）測定電極：リンドープ・ポリシリコン、 ３）電極面積：８ｍｍ2 、 ４）判定電流：１ｍＡ／ｃｍ2 、 ５）良品判定：絶縁破壊電界が８ＭＶ／ｃｍ以上のものを良品と判定した。The oxide film breakdown voltage characteristics of this wafer were 97 to 100% for the C-mode non-defective product. The C-mode measurement conditions are as follows. 1) Oxide film thickness: 25 nm, 2) Measurement electrode: phosphorus-doped polysilicon, 3) Electrode area: 8 mm 2 , 4) Judgment current: 1 mA / cm 2 , 5) Good product judgment: Dielectric breakdown electric field of 8 MV / cm or more The product was determined to be good.
【００８２】なお、本発明は、上記実施形態に限定され
るものではない。上記実施形態は、例示であり、本発明
の特許請求の範囲に記載された技術的思想と実質的に同
一な構成を有し、同様な作用効果を奏するものは、いか
なるものであっても本発明の技術的範囲に包含される。The present invention is not limited to the above embodiment. The above embodiment is an exemplification, and has substantially the same configuration as the technical idea described in the scope of the claims of the present invention. It is included in the technical scope of the invention.
【００８３】例えば、上記実施形態においては、直径８
インチのシリコン単結晶を育成する場合につき例を挙げ
て説明したが、本発明はこれには限定されず、直径６イ
ンチ以下、１０〜１６インチあるいはそれ以上のシリコ
ン単結晶にも適用できることは言うまでもない。For example, in the above embodiment, the diameter 8
Although the case of growing an inch silicon single crystal has been described by way of example, the present invention is not limited to this, and it goes without saying that the present invention can be applied to a silicon single crystal having a diameter of 6 inches or less, 10 to 16 inches or more. No.
【００８４】[0084]
【発明の効果】以上説明したように、本発明によれば、
単結晶育成条件の制御範囲が広くなり、中央部にＯＳＦ
領域を有するものの、ＯＳＦ領域外側のＮ領域を最大限
拡大したウエーハを、容易に作製することができる。し
かも、単結晶棒の全体で作製可能であるので、高生産
性、高歩留を維持しながら製造することができる。ま
た、ＯＳＦ領域の面積を小さく抑制出来る上に、低酸素
化も併用すればＯＳＦも発生せず、実質上ウエーハ全面
が無欠陥のシリコン単結晶ウエーハを製造することがで
きる。As described above, according to the present invention,
The control range of the conditions for growing single crystals is widened, and the OSF
Although having a region, a wafer in which the N region outside the OSF region is maximized can be easily manufactured. In addition, since the entire single crystal rod can be manufactured, it can be manufactured while maintaining high productivity and high yield. In addition, the area of the OSF region can be suppressed to a small value, and if low oxygen is also used, no OSF is generated, and a silicon single crystal wafer having substantially no defect on the entire surface of the wafer can be manufactured.
【図１】シリコン単結晶の径方向位置を横軸とし、Ｆ／
Ｇ値を縦軸とした場合の諸欠陥分布図である。FIG. 1 is a graph showing F /
It is a distribution map of various defects when G value is made into a vertical axis | shaft.
【図２】本発明品質のウエーハの結晶面内諸欠陥分布を
表した説明図である。 （ａ）通常の引上げ条件で引上げた場合、（ｂ）本発明
の引上げ条件で引上げた場合。FIG. 2 is an explanatory diagram showing a distribution of various defects in a crystal plane of a wafer of the present invention. (A) When pulled under normal pulling conditions, and (b) When pulled under the pulling conditions of the present invention.
【図３】従来の引上げ方法における結晶面内諸欠陥分布
を表した説明図である。 （ａ）通常の引上げ条件で引上げた場合、（ｂ）引上げ
速度と結晶内温度勾配を精密制御して引上げた場合。FIG. 3 is an explanatory diagram showing a distribution of various defects in a crystal plane in a conventional pulling method. (A) When pulling under normal pulling conditions, (b) When pulling by precisely controlling the pulling speed and the temperature gradient in the crystal.
【図４】従来の引上げ方法における引上げ速度と結晶面
内欠陥分布との関係を表した説明図である。 （ａ）高速引上げの場合、（ｂ）中速引上げの場合、
（ｃ）低速引上げの場合。FIG. 4 is an explanatory diagram showing a relationship between a pulling speed and a defect distribution in a crystal plane in a conventional pulling method. (A) For high-speed pulling, (b) For medium-speed pulling,
(C) In the case of low-speed pulling.
【図５】ウエーハに熱酸化処理を施した際のＯＳＦリン
グの発生領域とＯＳＦ核の存在領域との境界位置が結晶
中酸素濃度に影響されていることを表した説明図であ
る。 （ａ）結晶棒の長さ方向位置と酸素濃度の関係を表した
グラフ、（ｂ）結晶縦断面において、ＯＳＦリングの発
生領域とＯＳＦ核の潜在領域との境界位置を示す説明図
である。FIG. 5 is an explanatory view showing that a boundary position between a region where an OSF ring is generated and a region where an OSF nucleus exists when a wafer is subjected to a thermal oxidation process is affected by the oxygen concentration in the crystal. (A) is a graph showing the relationship between the position in the length direction of the crystal rod and the oxygen concentration, and (b) is an explanatory diagram showing the boundary position between the OSF ring generation region and the OSF nucleus latent region in the crystal longitudinal section.
【図６】本発明で使用したＣＺ法による単結晶引上げ装
置の概略説明図である。FIG. 6 is a schematic explanatory view of a single crystal pulling apparatus by a CZ method used in the present invention.
【図７】実施例１の結果図である。 （ａ） 成長速度の結果図、 （ｂ） 結晶欠陥の結果図。FIG. 7 is a result diagram of Example 1. (A) Results of growth rate, (b) Results of crystal defects.
【図８】実施例２の結果図である。 （ａ） 成長速度の結果図、 （ｂ） 結晶欠陥の結果図。FIG. 8 is a result diagram of Example 2. (A) Results of growth rate, (b) Results of crystal defects.
【図９】実施例３の結果図である。 （ａ） 成長速度の結果図、 （ｂ） 結晶欠陥の結果図。FIG. 9 is a result diagram of Example 3. (A) Results of growth rate, (b) Results of crystal defects.
１…成長単結晶棒、 ２…シリコン融液、 ３…湯面、 ４…固液界面、 ５…種結晶、 ６…シードチャック、 ７…ワイヤ、 ８…固液界面断熱材、 ９…上部囲繞断熱材、 １０…湯面と固液界面断熱材下端との隙間、 ３０…単結晶引上げ装置、 ３１…引上げ室、 ３２…ルツボ、 ３３…ルツボ保持軸、 ３４…ヒータ、 ３５…断熱材、 ３６…冷却装置、 ３７…磁石。 Ｖ …Ｖ−リッチ領域、 Ｎ …Ｎ−領域、 Ｉ …Ｉ−リッチ領域、 ＯＲ…ＯＳＦ領域。 DESCRIPTION OF SYMBOLS 1 ... Growing single crystal rod, 2 ... Silicon melt, 3 ... Hot surface, 4 ... Solid-liquid interface, 5 ... Seed crystal, 6 ... Seed chuck, 7 ... Wire, 8 ... Solid-liquid interface heat insulating material, 9 ... Top surrounding Insulation material, 10: gap between the surface of the hot water and the lower end of the solid-liquid interface insulation material, 30: single crystal pulling device, 31: pulling chamber, 32: crucible, 33: crucible holding shaft, 34: heater, 35: heat insulating material, 36 ... cooling device, 37 ... magnet. V: V-rich region, N: N-region, I: I-rich region, OR: OSF region.
Claims (14)
結晶を育成する際に、引上げ速度をＦ［ｍｍ／ｍｉｎ］
とし、シリコンの融点から１４００℃の間の引上げ軸方
向の結晶内温度勾配の平均値をＧ［℃／ｍｍ］で表した
時、結晶中心から結晶周辺までの距離Ｄ［ｍｍ］を横軸
とし、Ｆ／Ｇ［ｍｍ2 ／℃・ｍｉｎ］の値を縦軸として
欠陥分布を示した欠陥分布図において、ＯＳＦ領域と、
その外側のＮ−領域の範囲内で結晶を引上げることを特
徴とするシリコン単結晶の製造方法。1. When growing a silicon single crystal by the Czochralski method, the pulling speed is set to F [mm / min].
When the average value of the temperature gradient in the crystal in the pulling axis direction from the melting point of silicon to 1400 ° C. is represented by G [° C./mm], the distance D [mm] from the crystal center to the periphery of the crystal is represented by the horizontal axis. , F / G [mm 2 / ° C. · min] in the defect distribution diagram showing the defect distribution on the vertical axis, the OSF region,
A method for producing a silicon single crystal, wherein the crystal is pulled within a range of an N-region outside the silicon single crystal.
均値Ｇ［℃／ｍｍ］を、３．０［℃／ｍｍ］以下として
結晶を引上げることを特徴とする請求項１に記載のシリ
コン単結晶の製造方法。2. The crystal according to claim 1, wherein the crystal is pulled with the average value G [° C./mm] of the temperature gradient in the crystal in the pulling axis direction being 3.0 [° C./mm] or less. A method for producing a silicon single crystal.
均値Ｇ［℃／ｍｍ］の値を、結晶中心部分の温度勾配Ｇ
ｃ［℃／ｍｍ］と結晶周辺部分の温度勾配Ｇｅ［℃／ｍ
ｍ］との差△Ｇ＝（Ｇｅ−Ｇｃ）で表した時、△Ｇが１
℃／ｍｍ以内として結晶を引き上げることを特徴とする
請求項１または請求項２に記載のシリコン単結晶の製造
方法。3. The value of the average value G [° C./mm] of the temperature gradient in the crystal in the direction of the pulling axis is calculated as the temperature gradient G
c [° C./mm] and the temperature gradient Ge [° C./m
m] and ΔG = (Ge−Gc), ΔG is 1
The method for producing a silicon single crystal according to claim 1 or 2, wherein the crystal is pulled up to within ° C / mm.
結晶を育成する際に、引上げ速度Ｆ［ｍｍ／ｍｉｎ］
を、ＯＳＦが結晶バルク中心で消滅する臨界速度に対
し、±０．０２［ｍｍ／ｍｉｎ］以内に制御しつつ結晶
を引上げることを特徴とするシリコン単結晶の製造方
法。4. When growing a silicon single crystal by the Czochralski method, a pulling speed F [mm / min] is used.
Is controlled within ± 0.02 [mm / min] with respect to the critical speed at which the OSF disappears at the center of the crystal bulk, and the crystal is pulled up.
結晶を育成する際に、引上げ速度Ｆ［ｍｍ／ｍｉｎ］の
平均値を、ＯＳＦが結晶バルク中心で消滅する臨界速度
の平均値に対し、±０．０１［ｍｍ／ｍｉｎ］以内に制
御しつつ結晶を引上げることを特徴とする請求項４に記
載のシリコン単結晶の製造方法。5. When growing a silicon single crystal by the Czochralski method, the average value of the pulling speed F [mm / min] is set to ± 0 with respect to the average value of the critical speed at which OSF disappears at the center of the crystal bulk. The method for producing a silicon single crystal according to claim 4, wherein the crystal is pulled while being controlled within 0.01 mm / min.
に記載のシリコン単結晶の製造方法において、引上げ中
シリコン融液に磁場を印加しつつ結晶を引上げることを
特徴とするシリコン単結晶の製造方法。6. The method for producing a silicon single crystal according to claim 1, wherein the crystal is pulled while applying a magnetic field to the silicon melt during the pulling. Method for producing crystals.
方法において、印加する磁場を水平磁場とすることを特
徴とするシリコン単結晶の製造方法。7. The method for producing a silicon single crystal according to claim 6, wherein the applied magnetic field is a horizontal magnetic field.
ン単結晶の製造方法において、印加する磁場の強度を２
０００Ｇ以上とすることを特徴とするシリコン単結晶の
製造方法。8. The method for producing a silicon single crystal according to claim 6, wherein the intensity of the applied magnetic field is 2
A method for producing a silicon single crystal, wherein the silicon single crystal is at least 000G.
ン単結晶の製造方法によって製造されたシリコン単結
晶。9. A silicon single crystal manufactured by the method for manufacturing a silicon single crystal according to claim 1.
シリコン単結晶ウエーハにおいて、ウエーハの中央部に
熱酸化処理をした際にＯＳＦが発生するか、あるいはＯ
ＳＦの核が存在するものであり、かつ、ＦＰＤ及びＬ／
Ｄがウエーハ全面内に存在しないことを特徴とするシリ
コン単結晶ウエーハ。10. In a silicon single crystal wafer grown by the Czochralski method, OSF is generated when a central portion of the wafer is subjected to thermal oxidation treatment,
SF core exists, and FPD and L /
A silicon single crystal wafer, wherein D does not exist in the entire surface of the wafer.
エーハであって、前記ウエーハ中央部のＯＳＦ領域が、
ウエーハ面積の５％以下であることを特徴とするシリコ
ン単結晶ウエーハ。11. The silicon single crystal wafer according to claim 10, wherein an OSF region at a central portion of the wafer is:
A silicon single crystal wafer having a size of 5% or less of a wafer area.
シリコン単結晶ウエーハであって、前記ウエーハ中央部
のＯＳＦ領域が、直径２０ｍｍ以下であることを特徴と
するシリコン単結晶ウエーハ。12. The silicon single crystal wafer according to claim 10, wherein an OSF region at a central portion of the wafer has a diameter of 20 mm or less.
か１項に記載のシリコン単結晶ウエーハであって、前記
ウエーハ中央部に存在するＯＳＦ密度が、１００個／ｃ
ｍ2 以下であることを特徴とするシリコン単結晶ウエー
ハ。13. The silicon single crystal wafer according to claim 10, wherein an OSF density existing in a central portion of the wafer is 100 / c.
a silicon single crystal wafer having a diameter of not more than m 2 .
か１項に記載のシリコン単結晶ウエーハであって、ウエ
ーハ全面の酸素濃度が２４ｐｐｍａ以下であることを特
徴とするシリコン単結晶ウエーハ。14. The silicon single crystal wafer according to claim 10, wherein an oxygen concentration on the entire surface of the silicon single crystal wafer is 24 ppma or less.
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|---|---|---|---|
| JP02140998A JP3627498B2 (en) | 1998-01-19 | 1998-01-19 | Method for producing silicon single crystal |
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| US6236104B1 (en) | 1998-09-02 | 2001-05-22 | Memc Electronic Materials, Inc. | Silicon on insulator structure from low defect density single crystal silicon |
| US6254672B1 (en) | 1997-04-09 | 2001-07-03 | Memc Electronic Materials, Inc. | Low defect density self-interstitial dominated silicon |
| US6284039B1 (en) | 1998-10-14 | 2001-09-04 | Memc Electronic Materials, Inc. | Epitaxial silicon wafers substantially free of grown-in defects |
| US6312516B2 (en) | 1998-10-14 | 2001-11-06 | Memc Electronic Materials, Inc. | Process for preparing defect free silicon crystals which allows for variability in process conditions |
| US6328795B2 (en) | 1998-06-26 | 2001-12-11 | Memc Electronic Materials, Inc. | Process for growth of defect free silicon crystals of arbitrarily large diameters |
| US6379642B1 (en) | 1997-04-09 | 2002-04-30 | Memc Electronic Materials, Inc. | Vacancy dominated, defect-free silicon |
| US6416836B1 (en) | 1998-10-14 | 2002-07-09 | Memc Electronic Materials, Inc. | Thermally annealed, low defect density single crystal silicon |
| US6555194B1 (en) | 1997-04-09 | 2003-04-29 | Memc Electronic Materials, Inc. | Process for producing low defect density, ideal oxygen precipitating silicon |
| US6846539B2 (en) | 2001-01-26 | 2005-01-25 | Memc Electronic Materials, Inc. | Low defect density silicon having a vacancy-dominated core substantially free of oxidation induced stacking faults |
| US6858307B2 (en) | 2000-11-03 | 2005-02-22 | Memc Electronic Materials, Inc. | Method for the production of low defect density silicon |
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