JPH11196339A - Image pickup device for motion detection - Google Patents

Abstract

PROBLEM TO BE SOLVED: To unnecessitate an external comparator circuit and to display the position and size of a moving body plainly by simultaneously outputting an image signal that is acquired by picking up an image and a moving body signal that is acquired based on comparison in the time base direction of the image signal, fetching a moving body signal and an image signal which are successively outputted from an image pick-up part and performing image composition of both signals. SOLUTION: A control pulse ϕSB is started up on a low level, MOS switch in a different value detecting circuit 6 is cut off and a multiple terminal side of a condenser is set to a floating state. Next, a control pulse ϕPXi is held on a low level, also, a control pulse ϕ SA is started up on a high level and a MOS switch QX on the i-th row is made conductive. When a moving body signal Vo is on a high level, a MOS switch 12b is cut off and an image signal Ao is outputted and when it is on a low level, a MOS switch 12a is cut off and ground potential is outputted to an image output terminal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a motion detecting image pickup device for picking up an object field and detecting a moving object. In particular, the present invention relates to a motion detection imaging apparatus suitable for use in displaying the position and size of a moving object in an easily understandable manner.

[0002]

2. Description of the Related Art Conventionally, there has been known a motion detection image processing apparatus which sequentially captures image data via a solid-state imaging device and performs motion detection based on a difference between frames of the image data. FIG. 10 is a diagram showing the configuration of this type of motion detection image processing apparatus 100.

[0003] In FIG. 10, a motion detection image processing apparatus 100 includes a solid-state imaging device 10 for imaging an object scene.
1 is provided. An image signal (analog signal) output from the solid-state imaging device 101 is supplied to the AD conversion circuit 102 and the clamp circuit 109, respectively. This A
Digital image signals output from the D conversion circuit 102 are alternately supplied to image memories 103 and 104 for two frames. An image processing circuit 105 is connected to a data bus common to these image memories 103 and 104.
The output of the image processing circuit 105 is
And the monitor device 10 via the synchronizing signal synthesizing circuit 107.
8 is supplied.

On the other hand, the output of the clamp circuit 109 is supplied to a monitor 111 via a synchronizing signal synthesizing circuit 110. Image processing apparatus 100 for motion detection having such a configuration
First, the image signal of the first frame output from the solid-state imaging device 101 is stored in the first image memory 103 via the AD conversion circuit 102.

After the above operation, the image signal (analog signal) of the second frame output from the solid-state imaging device 101 is converted into a digital signal by the AD conversion circuit 102, and then the second image memory 104. The image processing circuit 105 alternates the image signal of the first frame stored in the first image memory 103 and the image signal of the second frame stored in the second image memory 104 in pixel units. Read and compare. At this time,
Pixels that differ by a predetermined threshold or more are detected, and a signal indicating detection of a moving object (hereinafter, referred to as a “moving object signal”) is generated.

The clamp circuit 106 fixes (clamps) the low-level potential of the moving object signal to a constant DC level. The moving object signal thus clamped is supplied to the monitor device 108 after the horizontal and vertical synchronizing signals are synthesized in the synchronizing signal synthesizing circuit 107. On the display surface of the monitor device 108, a stationary portion where no difference occurs between frames is displayed, for example, in black. on the other hand,
The moving part where a difference occurs between frames is displayed, for example, in white.

On the other hand, an image signal (analog signal) output from the solid-state imaging device 101 is also supplied to a clamp circuit 109. The clamp circuit 109 periodically performs a clamp operation at the timing of a synchronization signal. As a result, the pedestal level of the image signal output from the clamp circuit 109 is fixed at a constant DC level, and the DC level in the image signal is reproduced.

[0008] The image signal thus DC-reproduced is supplied to the monitor 111 after the horizontal and vertical synchronizing signals are synthesized in the synchronizing signal synthesizing circuit 110.
An image of the object scene is displayed on the display surface of the monitor device 111 with a luminance gradation corresponding to the image signal. By comparing the display surfaces of the two monitor devices 108 and 111, for example, next to each other, it is possible to simultaneously grasp the position and size of the moving object and the state of the object scene.

[0009]

However, in the conventional image processing apparatus 100 for motion detection, it is necessary to compare the two monitor devices 108 and 111 to determine the position and size of the moving object. However, there is a problem that the accuracy is low and the accuracy is low.

Further, a conventional motion detection image processing apparatus 1
In the case of 00, an external circuit such as the AD conversion circuit 102 and the image memories 103 and 104 is required to detect the motion. Therefore, there has been a problem that the entire image processing apparatus 100 for motion detection becomes large and expensive. Also,
In the conventional motion detection image processing apparatus 100, since the signal processing from the AD conversion circuit 102 to the image processing circuit 105 is involved, the moving object signal is greatly delayed as compared with the image signal. Therefore, in order to match the display timings of the two monitor devices 108 and 111, there is a problem that a delay compensation circuit for delaying an image signal is further required.

In addition, the conventional motion detection image processing apparatus 1
In the case of 00, there is a problem that the synthesizing process of the synchronizing signal must be individually performed for both the moving object signal and the image signal, and the circuit configuration becomes complicated. Further, in the above-described conventional motion detection image processing apparatus 100, the dynamic range of the image signal (analog signal) is limited by the AD conversion circuit 10
Limited by 2. Normally, the input dynamic range of the AD conversion circuit 102 is narrower than the dynamic range of the solid-state imaging device 101. Therefore, there is also a problem that the wide dynamic range of the solid-state imaging device 101 cannot be effectively used in the process of detecting a moving object.

Also, the sampling timing in the AD conversion circuit 102 may be slightly shifted between the previous frame and the current frame. As described above, when the sampling timing is shifted between the frames, a slight shift occurs in the pixel positions to be compared in the external image processing circuit 105. If such a shift occurs, a difference between frames occurs at an edge portion or the like even in a stationary body. Therefore, there has been a problem that accuracy and reliability of moving object detection are reduced.

Accordingly, the present invention provides a motion detection image pickup apparatus that does not require an external image comparison process for motion detection and generates an image signal for displaying the position and size of a moving object in an easily understandable manner. The purpose is to:

[0014]

According to the first aspect of the present invention, there is provided an image signal obtained by capturing an image of a scene,
An image pickup unit for simultaneously outputting a moving object signal obtained based on a comparison of the image signals in the time axis direction, and an image processing for taking in a moving object signal and an image signal sequentially output from the image pickup unit and synthesizing the two signals into an image And a circuit.

In such a configuration, the imaging unit generates a moving object signal by comparing the image signals in the time axis direction in parallel with the generation or scanning of the image signals.
This eliminates the need for an external image comparison process as in the conventional example (FIG. 10). In addition, the above-described image processing circuit performs image synthesis of the moving object signal and the image signal to generate a synthesized image signal suitable for displaying the position and size of the moving object in an easily understandable manner.

According to a second aspect of the present invention, in the imaging apparatus for motion detection according to the first aspect, the imaging units are arranged in a matrix and generate pixel outputs according to incident light. A plurality of light receiving units, a plurality of vertical read lines provided for each column of the plurality of light receiving units, and a previous frame previously held from the light receiving units of the specific rows while sequentially selecting a specific row of the plurality of light receiving units. A vertical transfer circuit for sequentially outputting the pixel output of the current frame and the pixel output of the current frame newly held from the light receiving unit of the specific row to the vertical read line, provided for each vertical read line, and provided via the vertical read line A horizontal transfer that horizontally transfers the comparison result of the comparison circuit that compares the pixel output of the previous frame and the pixel output of the current frame transferred in a time-division manner and the comparison circuit that is output for each vertical read line, and outputs the result as a moving object signal Circuit and An image signal output circuit for selectively taking in either one of the pixel output of the previous frame or the pixel output of the current frame transferred in a time-division manner via the direct readout line, horizontally transferring the image output, and outputting as an image signal; It is characterized by.

With this configuration, in the motion detection imaging apparatus according to the second aspect, the "pixel output of the previous frame" and the "pixel output of the current frame" are output on a vertical readout line in a time-division manner on a row basis. You. The comparison circuit generates a row-by-row comparison result by comparing the “pixel output of the previous frame” with the “pixel output of the current frame”. The horizontal transfer circuit sequentially and horizontally transfers the row-by-row comparison results to generate a moving object signal.

On the other hand, the image signal output circuit selectively takes in one of the "pixel output of the previous frame" and the "pixel output of the current frame" which are time-divisionally output to the vertical readout line and horizontally transfers the image signal. Generate In such a series of operations, the image signal reading operation and the moving object signal reading operation are performed simultaneously in parallel while sharing the vertical read line. Therefore, both the image signal and the moving object signal are output simultaneously and in parallel from the imaging unit.

In the second aspect, the expression "frame" is used, which means an image for one frame in the present application. Therefore, the imaging device for motion detection according to claim 2 is not limited to a device that performs progressive scanning, and may be one that performs, for example, interlaced scanning. In such interlaced scanning, a moving object signal is generated based on a difference between a current field and a previous field before the current field.

(Claim 3) According to a third aspect of the present invention, in the image pickup apparatus for motion detection according to the first or second aspect, the image processing circuit includes: It is a circuit for switching an image signal to a predetermined luminance level and outputting it. With such a configuration, the image signal is replaced with a predetermined luminance level in a portion where the moving object signal indicates one logical value. By displaying the processed composite image signal on the monitor, the moving object signal and the image signal can be displayed together on one monitor screen.

At this time, by observing the position and size of a portion showing a predetermined luminance level on the monitor screen together with image information based on an image signal, information on a moving part or a non-moving part can be easily obtained. It is possible to make a judgment. According to a fourth aspect of the present invention, in the motion detection imaging apparatus according to the third aspect, the imaging section includes a horizontal readout line for horizontally transferring an image signal, and an image signal provided to the horizontal readout line. A reset circuit that performs a reset by connecting the horizontal read line to a predetermined voltage source while reading
The image processing circuit is characterized in that when the moving object signal indicates one logical value, the image processing circuit controls the reset circuit to connect the horizontal readout line to a predetermined voltage source.

In such a configuration, the image signal is switched to the "luminance level indicated by the voltage value of the predetermined voltage source" while also using the reset circuit for the horizontal read line. Therefore, in the image processing circuit, there is no need to newly provide a switch circuit for switching the luminance level of the image signal, and the entire circuit configuration is simplified. According to a fifth aspect of the present invention, in the imaging device for motion detection according to the first or second aspect, the image processing circuit is a circuit for modulating the luminance of the image signal according to the moving object signal. There is a feature.

As described above, by displaying the composite image signal, the luminance of which is modulated according to the moving object signal, on the monitor, the moving object signal and the image signal can be displayed together on one monitor screen. . At this time, on the monitor screen, by observing the position and size of the luminance-modulated portion together with the image information based on the image signal, it is possible to easily determine information relating to the moving object portion or the non-moving object portion. It becomes possible.

Particularly, in the present invention, since the image signal is subjected to luminance modulation, the image information of the luminance-modulated portion is not lost unless the image signal after the modulation exceeds the D range. Therefore, it is possible to more accurately determine the position of the moving object portion or the non-moving object portion based on the image information of the location where the luminance is modulated. According to a sixth aspect of the present invention, in the imaging device for motion detection according to the first or second aspect, the image processing circuit converts the image signal into a luminance signal and the moving object signal into a color signal. It is a circuit for performing pseudo color synthesis.

As described above, by combining the moving object signal with the image signal as a color signal, it is possible to display the moving object signal and the image signal together on one monitor screen. At this time, by observing the position and size of a portion colored by the moving object signal on the monitor screen together with the image information by the image signal, the information on the moving object portion or the non-moving object portion can be easily determined. It becomes possible.

Since a pseudo color is synthesized with the image signal,
The image information (luminance gradation information) of the image signal is not lost.
Therefore, it is possible to more accurately determine the position of the moving body portion or the non-moving body portion based on the image information of the image signal. (Seventh aspect) According to the seventh aspect, in the motion detection imaging apparatus according to any one of the first to sixth aspects, the imaging unit and the image processing circuit are provided on the same semiconductor substrate. It is characterized by being formed in.

In the circuit configuration shown in the conventional example (FIG. 10), there are many large circuits that require a semiconductor space, such as the image memories 103 and 104. Therefore, these large circuits are formed on the same semiconductor substrate. It becomes difficult. However, according to the present invention, since the moving object signal is generated by comparing the image signal in the time axis direction in parallel with the generation of the image signal, a large circuit as in the related art is not particularly required. Therefore, it is easy to realize the imaging unit and the image processing circuit on the same semiconductor substrate.

By taking advantage of such an advantage of the present invention and forming the imaging section and the image processing circuit on the same semiconductor substrate, the size of the motion detection imaging apparatus can be significantly reduced.

[0029]

Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) The first embodiment is an embodiment corresponding to the first to third and seventh aspects of the present invention. FIG. 1 is a diagram illustrating a circuit configuration of the first embodiment. In FIG. 1, a motion detection solid-state imaging device 10 includes:
The unit pixels 1 are arranged in a matrix of n rows and m columns. The outputs of these unit pixels 1 are commonly connected for each vertical column, and form m vertical read lines 2.

The motion detecting solid-state imaging device 10 includes:
Vertical scanning circuit 3 for determining timing of vertical transfer
Is arranged. The vertical scanning circuit 3 supplies three types of control pulses φTG1 and φPX to the unit pixel 1 in the first row.
1 and φRG1 are supplied. Similarly, the vertical scanning circuit 3 is applied to the remaining unit pixels 1 in the second to n-th rows.
Control pulses φTG2-n, φP output from
X2 to n and φRG2 to n are supplied.

A current source 4 for supplying a bias current, a difference processing circuit 5 (correlated double sampling circuit), and an outlier detection circuit 6 are connected to the m vertical read lines 2 respectively. Is done. A control pulse φV is commonly supplied to the sample control terminals of these m difference processing circuits 5. Note that such a control pulse φV is output from, for example, the vertical scanning circuit 3 or the like. All the output terminals of the m difference processing circuits 5 are commonly connected to form a horizontal readout line 7 for image signals. The image signal output on the horizontal read line 7 is supplied to a signal input terminal of the switch circuit 12 via a video amplifier circuit 7a and the like.

The motion detecting solid-state imaging device 10 includes:
Horizontal scanning circuit 8 for determining timing of horizontal transfer
Is arranged. The horizontal scanning circuit 8 supplies a control pulse φH to the scanning control terminal of the difference processing circuit 5 in the first column.
1 is supplied. Similarly, the control pulses φH2 to φHm output from the horizontal scanning circuit 8 are supplied to the scanning control terminals of the remaining difference processing circuits 5 in the second to mth columns, respectively.

The horizontal read line 7 is connected to a reset MOS switch QRSH. These MOs
The control pulse φRSH for reset is supplied to the gate of the S switch QRSH. Such a control pulse φR
SH is output from, for example, the horizontal scanning circuit 8 or the like.
On the other hand, two types of control pulses φSA and φSB are commonly supplied to the sample control terminals of the m different value detection circuits 6. Such control pulses φSA and φSB are output from, for example, the vertical scanning circuit 3 or the like. The output terminals Q1 to Qm of the m different value detection circuits 6 are connected to the parallel inputs of the shift register 9, respectively. The shift register 9 is supplied with a control pulse φLD for determining the timing for taking in parallel data and a transfer clock φCK for serial transfer. These pulses φLD, φCK
Is supplied from, for example, the horizontal scanning circuit 8 or the like. Also,
The moving object signal Vo output from the serial output of the shift register 9 is input to a switch control terminal of the switch circuit 12.

(Circuit Configuration of Unit Pixel 1) Next, a specific circuit configuration and connection relationship of the unit pixel 1 located in the first row and the first column will be described with reference to FIG. The circuit configuration of the other unit pixels 1 is the same as that of the unit pixels 1 in the first row and the first column, except for the subscript of the control pulse.

First, a photodiode PD is arranged in the unit pixel 1. The anode of the photodiode PD is connected to the gate of an amplifying element QA composed of a junction field effect transistor via a charge transfer MOS switch QT. The gate of this MOS switch QT
A control pulse φTG1 output from the vertical scanning circuit 3 is supplied.

The gate of the amplifying element QA is connected to a wiring layer maintained at a constant reset potential VRD via a MOS switch QP for resetting signal charges. This M
The control pulse φRG1 output from the vertical scanning circuit 3 is supplied to the gate of the OS switch QP. On the other hand, the source of the amplification element QA is connected to the vertical read line 2 via the vertical transfer MOS switch QX. This MO
The control pulse φPX1 output from the vertical scanning circuit 3 is supplied to the gate of the S switch QX.

(Circuit Configuration of the Difference Processing Circuit 5) Next, FIG.
The specific circuit configuration of the difference processing circuit 5 provided in the vertical readout line 2 in the first column will be described based on FIG.
The circuit configuration of the difference processing circuits 5 in the second and subsequent columns is the same as that of the difference processing circuits 5 in the first column, except that the subscripts of the control pulses are partially different.

First, one end of a capacitor CV for holding a dark signal is connected to the vertical read line 2. The other end of the capacitor CV has a MOS switch QV for applying a constant potential such as a ground potential, and an M switch for horizontal transfer.
OS switch QH is connected. The other side of the MOS switch QH is connected to the horizontal read line 7. Here, the control pulse φV is applied to the gate of the MOS switch QV.
Is supplied. A control pulse φH1 output from the horizontal scanning circuit 8 is connected to the gate of the MOS switch QH.

(Circuit Configuration of Outlier Detection Circuit 6) Next, FIG.
The specific circuit configuration of the outlier detection circuit 6 provided in the first column of the vertical readout line 2 will be described based on FIG.
The outlier detection circuits 6 in the second and subsequent columns have the same circuit configuration as the outlier detection circuits 6 in the first column, except for the subscripts of the output signals.

First, one ends of the two capacitors CCA and CCB are connected to the vertical read line 2 respectively. The other end of the capacitor CCA is connected to NAN via three inverters INV1, INV3, and INV5 in series.
Connected to one input terminal of D circuit NA. Further, a voltage VR1 (= VT−Vt) for determining a threshold is connected to the other end of the capacitor CCA via a MOS switch QB1.
h) is supplied. The control pulse φSA is supplied to the gate of the MOS switch QB1. Further, the other end of the capacitor CCA is connected to the output of the inverter INV3 via the MOS switch QB3 which interrupts the positive feedback loop. The control pulse φSB is supplied to the gate of the MOS switch QB3.

On the other hand, the other end of the capacitor CCB is connected to the NAN via two inverters INV2 and INV4 in series.
Connected to the other input terminal of D circuit NA. A voltage VR2 (= VT + Vt) for determining a threshold value is provided on the other end side of the capacitor CCB via a MOS switch QB2.
h) is supplied. Note that the voltage VT here is a value corresponding to the threshold voltage of the inverters INV1 and INV2. The voltage Vth is a threshold value for determining whether or not the difference between frames is significant.

The control pulse φSA is supplied to the gate of the MOS switch QB2. Furthermore, the capacitor CC
The other end of B is connected to the output of the inverter INV4 via the MOS switch QB4 that interrupts the positive feedback loop. The control pulse φSB is supplied to the gate of the MOS switch QB4.

The output of the NAND circuit NA is supplied to the parallel input terminal Q1 of the shift register 9. (Circuit Configuration of Switch Circuit 12) Next, a specific circuit configuration of the switch circuit 12 provided on the output side of the video amplifier circuit 7a will be described with reference to FIG.

The output of the video amplifier circuit 7a is connected to an image output terminal via an n-channel MOS switch 12a. Also, this image output terminal is an n-channel MO
Connected to the ground potential via S switch 12b. On the other hand, the moving object signal output from the serial output of the shift register 9 is supplied to the gate of the MOS switch 12a and the input terminal of the inverter 12c. The output of 12c is given to the gate of MOS switch 12b.

(Correspondence between the present invention and the first embodiment)
Here, the correspondence between the present invention and the first embodiment will be described. First, the invention described in claims 1, 3, and 7 and the first
Regarding the correspondence with the embodiment, the image pickup unit includes (unit pixel 1, vertical readout line 2, vertical scan circuit 3, difference processing circuit 5, outlier detection circuit 6, horizontal read line 7, horizontal scan circuit 8, shift The image processing circuit corresponds to the switch circuit 12 corresponding to the register 9).

As for the correspondence between the invention described in claim 2 and the first embodiment, the light receiving section corresponds to the photodiode PD, the vertical read line corresponds to the vertical read line 2,
The vertical transfer circuit is composed of a vertical scanning circuit 3, an amplifying element QA, a vertical transfer MOS switch QX, a charge transfer MOS switch QT, and a signal charge reset MOS switch Q.
P, the comparison circuit corresponds to the outlier detection circuit 6, the horizontal transfer circuit corresponds to the shift register 9, and the image signal output circuit corresponds to the difference processing circuit 5, the horizontal readout line 7, and the horizontal scanning circuit 8. I do.

(Operation of the First Embodiment) FIG. 3 is a diagram showing the drive timing of the vertical transfer in the first embodiment. This figure shows the vertical transfer of the i-th row. Hereinafter, the operation of the first embodiment will be described with reference to FIG. First, at the timing of the period t10 shown in FIG. 3, the control pulse φSB falls to a low level. As a result, the MOS switches QB3, QB
4 is shut off, and the other ends of the capacitors CCA and CCB are set in a floating state.

Next, at the timing of the period t11 shown in FIG. 3, the control pulse φPXi is held at a low level,
Further, the control pulse φSA is raised to a high level. The fall of the control pulse φPXi causes the MOS in the i-th row
Switch QX conducts. At this time, the signal charge accumulated at the time of reading the previous frame is held in the gate region of the amplification element QA. Therefore, the amplification element QA
Outputs the pixel output Vold of the previous frame and the i-th row onto the vertical readout line 2.

On the other hand, on the side of the different value detection circuit 6, the rise of the control pulse φSA causes the MOS switch QB
1 and QB2 conduct. As a result, the capacitors CCA,
Each of the charging paths passing through the CCB is formed. As a result, (Vold−VT + V) is applied to both ends of the capacitor CCA.
The voltage of th) is charged.

On the other hand, (V
old-VT-Vth). This period t
Immediately before the end of 11, the control pulse φSA falls. Therefore, the other ends of the capacitors CCA and CCB enter a floating state again. As a result, the above voltage is held as the voltage between both ends of the capacitors CCA and CCB.

Next, at the timing of the period t12 shown in FIG. 3, the control pulse φRGi falls to a low level. Then, in the unit pixel 1 in the i-th row, the MOS switch QP is turned on, and the signal charges of the previous frame held in the gate region of the amplification element QA are discharged. As a result, the gate region is initialized to the reset voltage VRD via the wiring layer.

Immediately before the end of the period t12, the control pulse φ
RGi is returned to a high level. As a result, the MOS switch QP is shut off, and the gate region of the amplifier element QA holds the voltage at the time of reset, while remaining in a floating state.
In the subsequent period t13, the control pulse φ
PXi is still maintained at a low level. Therefore, the dark signal Vd is output to the vertical read line 2 via the source follower circuit of the amplification element QA. This dark signal Vd is a reset noise (so-called kTC noise) during a reset operation.
And a signal containing "a voltage variation between the gate and the source of the amplifier element QA" which is a main cause of the fixed pattern noise.

On the other hand, in this period t13, the control pulse φV rises to a high level. Difference processing circuit 5
On the side, the rise of the control pulse φV turns on the MOS switch QV. As a result, a charging path passing through the capacitor CV is formed, and the dark signal Vd in the i-th row is charged in the capacitor CV in the difference processing circuit 5. This period t1
Just before the end of 3, the control pulse φV falls. Therefore, one end of the capacitor CV is again in a floating state, and the dark signal Vd in the i-th row is held as a voltage across the capacitor CV group.

Next, at the timing of the period t14 shown in FIG. 3, the control pulse φTGi falls to a low level. Then, in the unit pixel 1 in the i-th row, the MOS
The switch QT is turned on, and the signal charges of the current frame accumulated in the photodiode PD in the i-th row are transferred to the gate region of the amplification element QA.

Just before the end of the period t14, the control pulse φ
TGi is returned to a high level. As a result, the MOS switch QT is shut off, and the gate region of the amplifier element QA maintains a state in which the potential has increased in accordance with the transferred signal charge while the gate region is in a floating state. At the timing of the subsequent period t15, the control pulse φPXi is still at the low level. Therefore, the pixel output Vnow of the i-th row in the current frame is newly output from the vertical read line 2 via the source follower circuit of the amplification element QA.

In this period t15, the difference processing circuit 5
At one end of the capacitor CV, a difference voltage obtained by subtracting the dark signal Vd of the i-th row from the pixel output Vnow of the i-th row in the current frame appears. This difference voltage is the “pixel output of the current frame” from which the dark signal component has been removed. On the other hand, during this period t15, (Vnow−Vold + VT−) is applied to the other end of the capacitor CCA on the different value detection circuit 6 side.
Vth). Further, a voltage of (Vnow-Vold + VT + Vth) appears on the other end of the capacitor CCB.

These voltages are applied to the inverters INV1, IV1
The signal is inverted at the threshold voltage VT via NV2. Due to the above voltage relationship, the pixel output difference (V
now-Vold) exceeds Vth, the inverter INV1
Outputs a low level. On the other hand, when the pixel output difference (Vnow-Vold) between frames falls below Vth, the inverter I
NV1 outputs a high level.

The pixel output difference between frames (Vnow-
Vold) exceeds (−Vth), the inverter INV
2 outputs a low level. On the other hand, when the pixel output difference (Vnow−Vold) between frames is smaller than (−Vth), the inverter INV2 outputs a high level. These logic outputs are passed through inverters INV3 to INV5 and then output to NAND
Each is input to the circuit NA. As a result, the pixel output difference (Vnow−Vol) between frames is output from the NAND circuit NA.
When the value of d) is within the allowable range of (−Vth) to Vth, a low level is output. When the value of the pixel output difference (Vnow−Vold) between frames is outside the allowable range of (−Vth) to Vth, a high level is output. By such an operation, the NAND circuit NA outputs a binarized signal indicating whether or not the pixel output between frames matches within an allowable range.

In the state of the period t15, the control pulse φLD rises to a high level. As a result, the binary signal output from each of the m NAND circuits NA is output to the parallel input terminal Q of the shift register 9.
1 to Qm, and are held as internal values D1 to Dm of the shift register 9, respectively. Next, at the timing of the period t16, by raising the control pulse φSB, the MOS switches QB3 and QB4 are turned on. As a result, the capacitors CCA and CCB are recharged in the positive feedback direction via the inverters INV3 and INV4, and the output of the NAND circuit NA is stabilized.

FIG. 4 is a diagram showing the drive timing of the horizontal transfer during the period t16. First, at the timing of the period t16, the horizontal scanning circuit 8 outputs the control pulse φ
H1 to φHm are sequentially set to the high level instead.
Therefore, one end of the capacitor CV for m columns is 1 to m
The horizontal read lines 7 are connected in the order of the columns. as a result,
Image signals (Ao in FIG. 4) of the current frame and the i-th row are sequentially output on the horizontal read line 7.

Note that while the control pulses φH1 to φHm are set to the high level, φRSH is temporarily set to the high level. By such an operation, the residual charges on the horizontal read line 7 are discharged every time via the MOS switch QRSH. Therefore, there is no possibility that extra residual charges are mixed in the image signal to be horizontally transferred. In addition, such a MOS
By the reset operation of the switch QRSH, the output image signal becomes an intermittent signal. So in some cases,
The video amplifier circuit 7a and the like execute a zero-order hold operation and the like.

On the other hand, at the timing of this period t16, transfer pulse φCK is sequentially applied to shift register 9. In synchronization with the rise of the transfer pulse φCK, the serial value of the shift register 9 outputs the internal value D
1 to Dm are sequentially output as a moving object signal (Vo in FIG. 4). Here, the transfer pulse φCK and the control pulse φ
By aligning the rising time points of H1 to φHm, the phases of the image signal Ao and the moving object signal Vo can be accurately synchronized with an accuracy within one pixel.

The image signal Ao and the moving object signal Vo output simultaneously in this way are processed in the switch circuit 12 as follows. First, when the moving object signal Vo is at a high level, the MOS switch 12a is turned on and the MOS switch 12b is turned off. As a result, from the image output terminal,
The image signal Ao is output as it is.

On the other hand, when the moving object signal Vo is at a low level,
The MOS switch 12a is shut off and the MOS switch 12
b conducts. As a result, a ground potential (black as a luminance level) is output from the image output terminal. When the composite image signal Bo output from the image output terminal is input to the monitor device (after processing such as addition of a synchronization signal),
The portion of the stationary body is replaced with the black level, and the image of the moving body is displayed as if it were raised.

With such a series of operations, in the first embodiment, it is not necessary to look at a plurality of monitor screens, and the position, size, and the like of a moving object portion can be easily determined on a single monitor screen. It becomes possible. Also, the first
In the embodiment, since the image signal Ao and the moving object signal Vo are generated simultaneously and in parallel, there is no need to separately provide peripheral circuits such as an AD conversion circuit, an image memory and an image processing circuit as in the conventional example (FIG. 10). . Therefore, size reduction and cost reduction of the entire apparatus can be easily achieved.

Further, in the first embodiment, the image signal A
o and the moving object signal Vo are output in synchronization with an accuracy within one pixel. Therefore, it is possible to omit the delay compensation circuit between the two signals. In addition, in the first embodiment, since the synchronization signal only needs to be given to the synthesized image signal, there is no need to provide two synchronization signal synthesizing circuits as in the conventional example (FIG. 10). For these reasons, it is possible to further reduce the size and cost of the entire apparatus.

Further, in the first embodiment, a moving object signal Vo is generated by comparing image signals (analog signals) in the image pickup section. Therefore, the AD conversion circuit does not particularly intervene in the process of generating the moving object signal Vo, and the D range of the image signal Ao is not limited. Therefore, the wide D of the image signal Ao
The moving object signal Vo can be generated by utilizing the range. In the first embodiment, in the process of generating the moving object signal Vo, the pixel outputs of the preceding and succeeding frames are directly compared for each vertical read line. Therefore, no phase shift occurs at the pixel position to be compared, and no difference between frames occurs at an edge portion of the stationary body or the like. Therefore, it is possible to generate the moving object signal Vo with higher accuracy.

In the above-described first embodiment, a part of the image signal Ao is replaced with the black level according to the moving object signal Vo. However, the present invention is not limited to this. Generally, a part of the image signal Ao may be replaced with a predetermined luminance level according to the moving object signal Vo. For example, the moving object signal V
A part of the image signal Ao may be replaced with a white level or the like according to o.

In the first embodiment, when the moving object signal Vo goes low, the luminance level of the image signal Ao is switched. However, the present invention is not limited to this. For example, when the moving object signal Vo becomes high level, the luminance level of the image signal Ao may be switched. In such a configuration, on one monitor screen, the moving part is replaced with a predetermined luminance level (for example, white level), and the non-moving part is displayed as an image.

Next, another embodiment will be described. (Second Embodiment) A second embodiment is described in claims 1 to 4,
This is an embodiment corresponding to the invention described in FIG. FIG. 5 is a diagram illustrating a circuit configuration of the motion detection solid-state imaging device 20 according to the second embodiment.

In FIG. 5, the structural features of the second embodiment are as follows. First, the moving object signal Vo output from the serial output terminal of the shift register 9 is
The signal is supplied to one input terminal of the OR circuit 21 via the inverter 21a. A control pulse φRSH for resetting the horizontal read line 7 is applied to the other input terminal of the OR circuit 21. The output terminal of the OR circuit 21 is connected to the gate of the MOS switch QRSH.

On the other hand, the output of the video amplifier circuit 7a is directly taken out of the motion detecting solid-state imaging device 20. Note that the other components are the same as those of the first embodiment (FIG. 1), and thus the same reference numerals are given to them and shown in FIG. 5, and the description thereof will be omitted. (Correspondence between the present invention and the second embodiment) Here, the correspondence between the present invention and the second embodiment will be described.

First, as for the correspondence between the first and third aspects of the present invention and the second embodiment, the image pickup section includes (a unit pixel 1, a vertical readout line 2, a vertical scanning circuit 3, and a difference processing circuit). 5, the different value detection circuit 6, the horizontal read line 7, the horizontal scanning circuit 8, and the shift register 9), and the image processing circuit corresponds to the OR circuit 21 and the inverter 21a. Regarding the correspondence between the invention described in claim 2 and the second embodiment, the light receiving section corresponds to the photodiode PD, the vertical read line corresponds to the vertical read line 2, and the vertical transfer circuit corresponds to the (vertical scan circuit 3). , Amplifying element QA, MOS for vertical transfer
Switch QX, a charge transfer MOS switch QT, and a signal charge reset MOS switch QP).
The comparison circuit corresponds to the different value detection circuit 6, the horizontal transfer circuit corresponds to the shift register 9, and the image signal output circuit corresponds to the difference processing circuit 5, the horizontal readout line 7, and the horizontal scanning circuit 8.

As for the correspondence between the invention described in claim 4 and the second embodiment, the horizontal read line corresponds to the horizontal read line 7, and the reset circuit is the MOS switch QRSH.
, And the image processing circuit corresponds to the OR circuit 21 and the inverter 21a. (Operation of Second Embodiment) First, in the second embodiment,
The vertical transfer operation of the pixel output and the operation of generating the moving object signal Vo are performed. Note that details of these operations are the same as in the first embodiment (FIG. 3), and thus description thereof will be omitted.

Subsequently, in parallel with the horizontal transfer operation of the pixel output, the switching operation of the MOS switch QRSH is executed as follows. First, while the moving object signal Vo is at a high level, the gate of the MOS switch QRSH is
Control pulse φRSH is applied via circuit 21. As a result, the horizontal transfer operation and the reset operation of the pixel output are performed similarly to the first embodiment. In such a state, the image signal is directly output from the image output terminal.

On the other hand, while the moving object signal Vo is at a low level,
The gate of the MOS switch QRSH is forcibly set to a high level, and the MOS switch QRSH is turned on. As a result, the horizontal read line 7 is connected to the ground potential, and the ground potential (black as a luminance level) is output from the image output terminal. Such a MOS switch QRS
By the switching operation of H, image synthesis of the image signal and the moving object signal is performed, and the synthesized image signal B is output from the image output terminal.
o is output. When this synthesized image signal Bo is input to the monitor device (after processing such as addition of a synchronization signal),
The stationary body part is replaced with a black level, and the image of the moving body part is displayed as if it were raised.

As described above, in the second embodiment, the same composite image signal as in the first embodiment can be output to the outside. Therefore, also in the second embodiment, the first
The same operation and effect as those of the embodiment can be obtained. In particular, as an effect peculiar to such a second embodiment,
Since the MOS switch QRSH is used for both the reset operation of the horizontal read line 7 and the luminance level switching, the overall circuit configuration can be simplified.

Next, another embodiment will be described. (Third Embodiment) A third embodiment is an embodiment corresponding to the first and fifth aspects of the present invention. FIG. 6 is a diagram illustrating a circuit configuration of the motion detection imaging device 30 according to the third embodiment.

In FIG. 6, a motion detection imaging device 30 is provided with a motion detection solid-state imaging device 31 capable of simultaneously outputting a moving object signal Vo and an image signal Ao. The circuit configuration of the solid-state imaging device 31 for motion detection is such that the switch circuit 12 is omitted from the first embodiment (FIG. 1). The image signal Ao output from the motion detection solid-state imaging device 31 is supplied to one input terminal of a signal synthesis circuit 37 via a buffer 33 and a clamp circuit 34.

The output Bo of the signal synthesizing circuit 37 is supplied to one input terminal of the synchronizing signal synthesizing circuit 38. The output Co of the synchronizing signal synthesizing circuit 38 is input to a monitor device (not shown). On the other hand, the solid-state imaging device 31 for motion detection
Is output to the other input terminal of the signal synthesis circuit 37 via the latch circuit 35 and the level conversion circuit 36.

Further, the motion detection imaging device 30 is provided with a signal generation circuit 32. Timing signals such as control signals and synchronization signals output from the signal generation circuit 32 are:
The above-described solid-state imaging device 31 for motion detection, latch circuit 3
5, respectively, to the clamp circuit 34 and the synchronizing signal synthesizing circuit 38. (Correspondence between the present invention and the third embodiment) Here, the correspondence between the present invention and the third embodiment will be described.

First, regarding the correspondence between the first and fifth aspects of the present invention and the third embodiment, the imaging section corresponds to the solid-state imaging device 31 for motion detection, the image processing circuit corresponds to the clamp circuit 34, and the level It corresponds to the conversion circuit 36 and the signal synthesis circuit 37. (Operation of Third Embodiment) FIG. 7 is a diagram showing operation waveforms of respective units in the third embodiment.

The operation of the third embodiment will be described below.
First, the signal generation circuit 32 outputs the motion detection solid-state imaging device 3.
The control signals for controlling the imaging operation and the scanning operation are sequentially applied to 1. In synchronization with this control signal, the motion detection solid-state imaging device 31 outputs an image signal Ao and a moving object signal Vo simultaneously.

The image signal Ao is input to the clamp circuit 34 after passing through the buffer 33. Clamp circuit 3
Reference numeral 4 clamps the image signal Ao in accordance with the timing of the synchronization signal provided from the signal generation circuit 32. On the other hand, the moving object signal Vo is input to the latch circuit 35. The latch circuit 35 adjusts the phase of the image signal Ao and the phase of the moving object signal Vo at the time of input to the signal combining circuit 37 by slightly shifting the holding timing of the moving object signal Vo.

The moving object signal Vo output from the latch circuit 35 is converted into a signal level (for example, 0.5 Vpp) suitable for signal synthesis via a level conversion circuit 36.
Here, the moving object signal Vo may be peak-clamped to reproduce the DC level of the moving object signal Vo.

The signal synthesizing circuit 37 adds the image signal Ao and the moving object signal Vo processed as described above to generate an output Bo as shown in FIG. Synchronous signal synthesis circuit 38
Adds a synchronization signal input from the signal generation circuit 32 to the output Bo to generate a composite image signal Co. As shown in FIG. 7, the composite image signal Co is a signal in which the luminance level of the moving body portion is raised. For this reason, on the monitor screen, the moving body portion is highlighted relatively brighter than the non-moving body portion.

Therefore, it is not necessary to look at a plurality of monitor screens, and it is possible to easily and reliably determine the position and size of the moving object portion on a single screen display. In the third embodiment, when the moving object signal Vo becomes high level, the luminance level of the image signal Ao is raised. However, the present invention is not limited to this. For example, when the moving object signal Vo becomes low level, the luminance level of the image signal Ao may be increased. In such a configuration, the non-moving object portion can be displayed lightly on the white side on one monitor screen.

In the third embodiment, the moving object signal Vo
, The brightness level of the image signal Ao is raised, but the invention is not limited to this. For example, the luminance level of the image signal Ao may be reduced according to the moving object signal Vo. Furthermore, in the above-described third embodiment, the brightness level of the image signal Ao is raised according to the moving object signal Vo, but the present invention is not limited to this. Generally, the brightness of the image signal may be modulated according to the moving object signal. For example, the signal combining circuit 37 may be replaced with an analog multiplier or the like, and the luminance of the image signal may be amplitude-modulated according to the moving object signal. With such a configuration, it is possible to highlight the image contrast of either the moving object portion or the non-moving object portion.

Next, another embodiment will be described. (Fourth Embodiment) The fourth embodiment is an embodiment corresponding to the first and sixth aspects of the present invention.

FIG. 8 is a diagram showing a circuit configuration of a motion detection imaging device 40 according to the fourth embodiment. In FIG. 8, a motion detection imaging device 40 is provided with a motion detection solid-state imaging device 41 capable of simultaneously outputting a moving object signal Vo and an image signal Ao. The circuit configuration of the motion detection solid-state imaging device 41 is the same as that of the first embodiment (FIG. 1) except that the switch circuit 12 is omitted.

The image signal Ao output from the motion detecting solid-state imaging device 41 is supplied to one input terminal of a signal synthesizing circuit 46 via a buffer 43, a clamp circuit 44, and a YC shift adjusting delay circuit 45. . The output Bo of the signal synthesizing circuit 46 is supplied to one input terminal of the synchronizing signal synthesizing circuit 47. This synchronizing signal synthesizing circuit 4
7 is input to a monitor device (not shown).

On the other hand, the moving object signal Vo output from the motion detection solid-state imaging device 41 is supplied to the R input of the matrix calculator 50 via the latch circuit 48 and the level conversion circuit 49. Outputs I and Q of the matrix calculator 50
Is converted into a color signal C via the quadrature modulator 51,
The signal is supplied to the other input terminal of the signal synthesis circuit 46. The motion detection imaging device 40 includes a signal generation circuit 42. A timing signal such as a control signal or a synchronization signal output from the signal generation circuit 42 is provided to the motion detection solid-state imaging device 41, the latch circuit 48, the clamp circuit 44, and the synchronization signal synthesis circuit 47, respectively.

(Correspondence between the present invention and the fourth embodiment)
Here, the correspondence between the present invention and the fourth embodiment will be described. First, regarding the correspondence between the first and sixth aspects of the invention and the fourth embodiment, the imaging unit corresponds to the solid-state imaging device 41 for motion detection, and the image processing circuit is a clamp circuit 44 and a level conversion circuit 49. , Matrix operation unit 50, quadrature modulator 51, and signal synthesis circuit 46.

(Operation of the Fourth Embodiment) FIG. 9 is a diagram showing operation waveforms of each part in the fourth embodiment. Hereinafter, the operation of the fourth embodiment will be described. First, a control signal for controlling the imaging operation and the scanning operation is given from the signal generation circuit 42 to the solid-state imaging device 41 for motion detection.
In synchronization with this control signal, the solid-state imaging device 41 for motion detection
Outputs the image signal Ao and the moving object signal Vo at the same time.

The image signal Ao is input to the YC shift adjusting delay circuit 45 after passing through the buffer 43 and the clamp circuit 44. The YC shift adjusting delay circuit 45 delays the image signal Ao so as to match the phases of the image signal Ao and the pseudo color signal C at the time of input to the signal combining circuit 46. On the other hand, the moving object signal Vo passes through the latch circuit 48 and the level conversion circuit 49,
Entered in the input. A constant potential such as a ground potential is applied to the B input and the G input of the matrix calculator 50.

The matrix calculator 50 performs a matrix calculation based on the known YIQ color system as shown in the following equations (1) and (2), and outputs color difference signals I and Q. I = 0.596R−0.274G−0.322B (1) Q = 0.221R−0.522G + 0.311B (2) These color difference signals I and Q are supplied to the quadrature modulator 51. Is entered. The quadrature modulator 51 performs quadrature modulation represented by the following equation (3) based on the color subcarrier having the frequency fsc, and generates a pseudo color signal C.

C = I cos (2πfsc · t + 33 °) + Qsin (2πfsc · t + 33 °) (3) As shown in FIG. 9, when performing the quadrature modulation, a color burst signal is added to the pseudo color signal C. Is also given.

The signal synthesizing circuit 46 adds the image signal Ao and the pseudo color signal C processed as described above to generate an output Bo as shown in FIG. Synchronous signal synthesis circuit 38
Adds a synchronization signal input from the signal generation circuit 42 to the output Bo to generate a composite image signal Co. As shown in FIG. 9, the composite image signal Co is a signal obtained by adding a red pseudo-color signal C to a moving body portion. Therefore, the moving object portion is displayed in red on the monitor screen.

Therefore, it is not necessary to look at a plurality of monitor screens, and it is possible to easily and reliably determine the position, size, and the like of a moving object portion on a single screen display. In the fourth embodiment, when the moving object signal Vo becomes high level, the pseudo color synthesis is performed on the image signal Ao. However, the present invention is not limited to this. For example, when the moving object signal Vo becomes low level, pseudo color synthesis may be performed on the image signal Ao. In addition, pseudo color synthesis may be performed such that the color changes between the moving part and the non-moving part in accordance with the moving object signal Vo.

In the first and second embodiments described above,
Although a junction field-effect transistor is used as the amplifying element QA, the present invention is not particularly limited to this configuration.
Generally, an element having an amplifying function can be used as the amplifying element QA. For example, a MOS transistor, a bipolar transistor, or the like may be used as the amplifying element QA, or a functional element using a mixture of these elements may be used. Further, signal charges may be held in parasitic capacitances generated at the gates and bases of these amplifying elements, or capacitors and the like for holding signal charges may be provided at the gates and bases of these amplifying elements in an auxiliary manner. Good.

Further, in the first and second embodiments, the vertical transfer MOS switch Q is used as the connection / separation unit.
Although X is provided, it is not limited to this. For example, even if a capacitor for accumulating signal charges is provided at the gate or base of the amplification element, and the voltage at the other end of the capacitor is increased or decreased, the connection / disconnection between the amplification element and the vertical read line may be controlled. Good.

In the first and second embodiments described above,
Although the case where the signal charge generated in the photodiode PD is directly transferred to the control region of the amplifying element has been described, the present invention is not limited to this. For example, the signal charge may be temporarily transferred to the diffusion region and held, and then the potential of the diffusion region may be detected at the gate of the MOS transistor via the signal line. As an example of such a pixel, for example, a document “Acti
ve Pixel Sensors: AreCCD's Dinosaurs? '', Fossum E.
R., Proceeding of SPIE: Charge-Coupled Device and S
olid State Optical SensorsIII, Vol.1900, pp2-14 (19
93).

Further, in the first and second embodiments described above, the case where the unit pixels 1 are arranged in a two-dimensional matrix has been described, but the present invention is not limited to this.
For example, it goes without saying that the present invention can be similarly applied to a line imaging device arranged in a one-dimensional matrix. In the third and fourth embodiments described above,
The circuit for performing image synthesis is configured as an external circuit of the solid-state imaging devices 31 and 41 for motion detection, but is not limited to this. For example, a circuit for synthesizing images may be incorporated on the same semiconductor substrate as the solid-state imaging devices 31 and 41 for motion detection.

[0105]

As described above, according to the first aspect of the present invention, a synthesized image signal is generated by synthesizing a moving object signal and an image signal which are simultaneously output from the imaging unit. By displaying the composite image signal on the monitor, it is possible to display both the moving object signal and the image signal together on one monitor screen. Therefore, it is not necessary to look at a plurality of monitor devices, and it is possible to easily and accurately determine information on a moving object signal.

Further, according to the first aspect of the present invention, the moving object signal is generated by comparing the image signal in the time axis direction in parallel with the generation or scanning of the image signal. Therefore, the conventional example (FIG. 1)
It is not necessary to separately provide peripheral circuits such as an A / D conversion circuit and an image memory and an image processing circuit as in 0), and the size and cost of the entire device can be reduced. Further, according to the first aspect of the present invention, the AD conversion circuit, the image memory, and the image processing circuit do not intervene as described above. Therefore, the time lag between the image signal and the moving object signal is reduced, and the delay compensation circuit between the two signals can be simplified or omitted.

In addition, according to the first aspect of the present invention, it is only necessary to provide a synchronizing signal to at least the synthesized image signal, so that it is not necessary to provide two synchronizing signal synthesizing circuits as in the conventional example (FIG. 10). Further, according to the first aspect of the present invention, a moving object signal is generated by comparing an image signal (analog signal) in the imaging unit. Therefore, the AD conversion circuit does not particularly intervene in the process of generating the moving object signal, and the D range of the image signal is not limited. Therefore, a moving object signal can be generated by utilizing a wide D range of the image signal.

(Claim 2) As described above, according to the invention of claim 2, a moving object signal is generated by comparing pixel outputs of preceding and succeeding frames which are time-divisionally output on a vertical read line. On the other hand, by selectively sampling one of the pixel outputs of the previous and next frames from the vertical readout line,
Generate an image signal. Generation of such a moving object signal and an image signal is performed simultaneously and in parallel while sharing a vertical readout line and the like. Therefore, according to the second aspect of the present invention, the simultaneous output operation of the moving object signal and the image signal can be smoothly realized.

In the operation of generating the moving object signal, the pixel outputs of the preceding and succeeding frames are directly compared for each vertical read line. Therefore, compared to the conventional example (FIG. 10) in which a difference between frames is obtained through external AD conversion or the like, there is no deviation in the pixel position to be compared. Therefore, there is very little possibility that a difference between frames occurs at an edge portion of the stationary body, and the motion can be detected with higher accuracy.

(Claim 3) In the invention according to claim 3,
A composite image signal is generated by replacing the image signal with a predetermined luminance level for a portion where the moving object signal indicates one logical value. By displaying the composite image signal on the monitor, it is possible to display both the moving object signal and the image signal together on one monitor screen. At this time, on the monitor screen, by observing the position and size of a portion indicating a predetermined luminance level together with the image information of the image signal, it is easy to understand the information on the moving object or the non-moving object, and accurately. It is possible to make a judgment.

(Claim 4) In the invention according to claim 4,
The image signal is switched to a predetermined luminance level by also using the reset circuit of the horizontal read line. Therefore, there is no need to separately provide a switch circuit for switching the luminance level of the image signal, and the entire circuit configuration can be simplified.

(Claim 5) In the invention according to claim 5,
By luminance modulating the image signal according to the moving object signal,
Generate a composite image signal. By displaying the composite image signal on the monitor, it is possible to display both the moving object signal and the image signal together on one monitor screen.
At this time, on the monitor screen, by observing the position and the size of the luminance-modulated portion together with the image information of the image signal, the information on the moving object or the non-moving object can be understood easily and accurately. It becomes possible.

In particular, since the luminance of the image signal is modulated,
As long as the image signal after the modulation does not exceed the D range, the image information at the position where the luminance is modulated is not lost. Therefore, it is possible to more easily understand and more accurately determine the position of the moving body portion or the non-moving body portion based on the image information of the location where the luminance is modulated. (Claim 6) In the invention according to claim 6, a synthesized image signal is generated by synthesizing a moving object signal as an image signal as a pseudo color component. By displaying the composite image signal on the monitor, it is possible to display both the moving object signal and the image signal together on one monitor screen. At this time, by observing the position and size of the colored portion on the monitor screen together with the image information of the image signal, it is easy to understand the information on the moving object or the non-moving object, and it is possible to make an accurate determination. It becomes possible.

In particular, since pseudo color synthesis is performed on an image signal, image information based on luminance gradation is not lost. Therefore, based on the image information based on the luminance gradation, the position of the colored moving body portion or the non-moving body portion and the like can be more easily understood and more accurately determined. (Claim 7) In the invention according to claim 7, since the imaging section and the image processing circuit are formed on the same semiconductor substrate, it is possible to significantly reduce the size of the motion detection imaging apparatus.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a circuit configuration of a first embodiment.

FIG. 2 is a diagram illustrating a circuit example of an outlier detection circuit 6;

FIG. 3 is a diagram illustrating drive timing of vertical transfer according to the first embodiment.

FIG. 4 is a diagram illustrating driving timing of horizontal transfer according to the first embodiment.

FIG. 5 is a diagram illustrating a circuit configuration of a second embodiment.

FIG. 6 is a diagram illustrating a circuit configuration of a third embodiment.

FIG. 7 is a diagram showing operation waveforms of each unit according to the third embodiment.

FIG. 8 is a diagram illustrating a circuit configuration of a fourth embodiment.

FIG. 9 is a diagram illustrating operation waveforms of respective units according to the fourth embodiment.

FIG. 10 is a diagram showing a configuration of a conventional motion detection image processing apparatus 100.

[Explanation of symbols]

 Reference Signs List 1 unit pixel 2 vertical readout line 3 vertical scanning circuit 4 current source 5 difference processing circuit 6 outlier detection circuit 7 horizontal readout line 7a video amplifier circuit 8 horizontal scanning circuit 9 shift register 10 motion detection solid-state imaging device 12 switch circuit 12a MOS Switch 12b MOS switch 12c Inverter 20 Motion detection solid-state imaging device 21 OR circuit 21a Inverter 30 Motion detection imaging device 31 Motion detection solid-state imaging device 32 Signal generation circuit 33 Buffer 34 Clamp circuit 35 Latch circuit 36 Level conversion circuit 37 Signal synthesis Circuit 38 Synchronization signal synthesis circuit 40 Motion detection imaging device 41 Motion detection solid-state imaging device 42 Signal generation circuit 43 Buffer 44 Clamp circuit 45 YC shift adjustment delay circuit 46 Signal synthesis circuit 47 Synchronization signal synthesis circuit 48 Latch Path 49 Level conversion circuit 50 Matrix arithmetic unit 51 Quadrature modulator 100 Motion detection image processing device 101 Solid-state imaging device 102 A / D conversion circuit 105 Image processing circuit 106 Clamp circuit 107 Synchronous signal synthesizing circuit 109 Clamp circuit 110 Synchronous signal synthesizing circuit PD photodiode QRSH MOS switch QT MOS switch for charge transfer QA Amplifying element QP MOS switch for resetting signal charge QX MOS switch for vertical transfer CV Capacitor for holding dark signal QV MOS switch QH MOS switch for horizontal transfer CCA, CCB Capacitor NA NAND circuit

Claims (7)

[Claims] An image signal obtained by imaging an object scene,
An imaging unit that simultaneously outputs a moving body signal obtained based on a comparison of the image signals in the time axis direction; a moving body signal and an image signal sequentially output from the imaging unit; An imaging device for motion detection, comprising: an image processing circuit. 2. The imaging device for motion detection according to claim 1, wherein the imaging units are arranged in a matrix, and a plurality of light receiving units that generate pixel outputs according to incident light; and the plurality of light receiving units. A plurality of vertical read lines provided for each column of, and while sequentially selecting a specific row of the plurality of light receiving units, the pixel output of the previous frame previously held from the light receiving unit of the specific row,
A vertical transfer circuit for sequentially outputting the pixel output of the current frame newly held from the light receiving unit of the specific row to the vertical read line; and a vertical transfer circuit provided for each of the vertical read lines and time-division via the vertical read line. A comparison circuit that compares the pixel output of the previous frame and the pixel output of the current frame, which are transferred to the vertical transfer line; and a horizontal transfer that horizontally transfers the comparison result of the comparison circuit output for each of the vertical read lines and outputs the result as a moving object signal. An image signal output circuit for selectively taking in either one of the pixel output of the previous frame or the pixel output of the current frame which is time-divisionally transferred via the vertical readout line, horizontally transferring the image output, and outputting as an image signal An imaging device for motion detection, comprising: 3. The imaging device for motion detection according to claim 1, wherein the image processing circuit converts the image signal to a predetermined luminance level when the moving object signal indicates one logical value. A motion detection imaging device, characterized in that it is a circuit for switching to and outputting a signal. 4. The imaging device for motion detection according to claim 3, wherein the imaging unit comprises: a horizontal readout line for horizontally transferring the image signal; and a readout unit for reading the image signal to the horizontal readout line. A reset circuit for connecting a horizontal read line to a predetermined voltage source to perform reset, wherein the image processing circuit controls the reset circuit when the moving object signal indicates one logical value, and performs the horizontal read. An imaging device for motion detection, which is a circuit for connecting a wire to a predetermined voltage source. 5. The imaging device for motion detection according to claim 1, wherein the image processing circuit is a circuit that modulates luminance of the image signal according to the moving object signal. Imaging device for motion detection. 6. The imaging device for motion detection according to claim 1, wherein the image processing circuit performs pseudo color synthesis using the image signal as a luminance signal and the moving object signal as a pseudo color signal. An imaging device for motion detection, which is a circuit. 7. The motion detection imaging apparatus according to claim 1, wherein the imaging unit and the image processing circuit are formed on a same semiconductor substrate. A motion detection imaging device characterized by the following.